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LLVM backend for 6502
* BPA and BPN do not take a %cc register as a parameter * SLL/SRL/SRA{r,i}5 are there for a reason - they are ONLY 32-bit instructions * Likewise, SLL/SRL/SRAX{r,i}6 are only 64-bit * Added WRCCR{r,i} opcodes git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6655 91177308-0d34-0410-b5e6-96231b3b80d8 |
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include | ||
lib | ||
runtime | ||
support | ||
test | ||
tools | ||
utils | ||
LICENSE.TXT | ||
Makefile | ||
Makefile.common | ||
Makefile.config | ||
Makefile.Linux | ||
Makefile.rules | ||
Makefile.SunOS |