Misha Brukman d36e30e623 * Changed Bcc instructions to behave like BPcc instructions
* BPA and BPN do not take a %cc register as a parameter
* SLL/SRL/SRA{r,i}5 are there for a reason - they are ONLY 32-bit instructions
* Likewise, SLL/SRL/SRAX{r,i}6 are only 64-bit
* Added WRCCR{r,i} opcodes


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6655 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-06 09:52:23 +00:00
2003-06-03 04:40:06 +00:00
2003-06-04 08:03:57 +00:00
2003-05-29 22:12:35 +00:00
2003-06-05 20:51:10 +00:00
2003-06-04 19:46:36 +00:00
2003-05-25 16:52:41 +00:00
2003-05-25 16:52:41 +00:00
Description
LLVM backend for 6502
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