Andrew Trick d4486ebd5f mi-sched: Force bottom up scheduling for generic targets. ... Fast register pressure tracking currently only takes effect during bottom up scheduling. Forcing this is a bit faster and simpler for targets that don't have many scheduling constraints and don't need top-down scheduling. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190014 91177308-0d34-0410-b5e6-96231b3b80d8		2013-09-04 23:54:00 +00:00
..
AArch64	Inplement aarch64 neon instructions in AdvSIMD(shift). About 24 shift instructions:	2013-09-04 09:28:24 +00:00
ARM	Expand and rewrite comment.	2013-09-04 21:23:23 +00:00
CPP
Generic
Hexagon	Debug Info: add an identifier field to DICompositeType.	2013-08-26 22:39:55 +00:00
Inputs	Debug Info: add an identifier field to DICompositeType.	2013-08-26 22:39:55 +00:00
Mips	Make sure we don't generate stubs for any of these functions because they	2013-09-01 04:12:59 +00:00
MSP430
NVPTX	[NVPTX] Re-enable assembly printing support for inline assembly	2013-08-24 01:17:23 +00:00
PowerPC	[PowerPC] Call support for fast-isel.	2013-08-30 22:18:55 +00:00
R600	R600: Use shared op optimization when checking cycle compatibility	2013-09-04 19:53:54 +00:00
SPARC	[Sparc] Fix an assertion failure while lowering fcmp on long double.	2013-09-04 15:15:20 +00:00
SystemZ	[SystemZ] Add support for TMHH, TMHL, TMLH and TMLL	2013-09-03 15:38:35 +00:00
Thumb	ARM: Use "dmb sy" for barriers on M-class CPUs	2013-08-28 14:39:19 +00:00
Thumb2
X86	mi-sched: Force bottom up scheduling for generic targets.	2013-09-04 23:54:00 +00:00
XCore