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LLVM backend for 6502
d498c8f2c8
%reg1028<def> = EXTRACT_SUBREG %reg1027<kill>, 1 %reg1029<def> = MOV8rr %reg1028 %reg1029<def> = SHR8ri %reg1029, 7, %EFLAGS<imp-def,dead> insert => %reg1030<def> = MOV8rr %reg1028 %reg1030<def> = ADD8rr %reg1028<kill>, %reg1029<kill>, %EFLAGS<imp-def,dead> In this case, it might not be possible to coalesce the second MOV8rr instruction if the first one is coalesced. So it would be profitable to commute it: %reg1028<def> = EXTRACT_SUBREG %reg1027<kill>, 1 %reg1029<def> = MOV8rr %reg1028 %reg1029<def> = SHR8ri %reg1029, 7, %EFLAGS<imp-def,dead> insert => %reg1030<def> = MOV8rr %reg1029 %reg1030<def> = ADD8rr %reg1029<kill>, %reg1028<kill>, %EFLAGS<imp-def,dead> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62954 91177308-0d34-0410-b5e6-96231b3b80d8 |
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