Chris Lattner d55e1ca5ef Add [reg+reg] integer stores ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24789 91177308-0d34-0410-b5e6-96231b3b80d8		2005-12-17 20:44:36 +00:00
..
Alpha	fix FP selects	2005-12-12 20:30:09 +00:00
CBackend
IA64	Add some explicit type casts so that tblgen knows the type of the shiftamount, which is not necessarily the same as the type being shifted.	2005-12-05 02:34:29 +00:00
PowerPC	Added source file/line correspondence for dwarf (PowerPC only at this point.)	2005-12-16 22:45:29 +00:00
Skeleton	Support multiple ValueTypes per RegisterClass, needed for upcoming vector	2005-12-01 04:51:06 +00:00
Sparc	Add [reg+reg] integer stores	2005-12-17 20:44:36 +00:00
SparcV8	Add [reg+reg] integer stores	2005-12-17 20:44:36 +00:00
SparcV9	Support multiple ValueTypes per RegisterClass, needed for upcoming vector	2005-12-01 04:51:06 +00:00
X86	eliminate some redundancy	2005-12-17 19:47:05 +00:00
Makefile
MRegisterInfo.cpp
SubtargetFeature.cpp
Target.td	Added support to specify predicates.	2005-12-14 22:02:59 +00:00
TargetData.cpp
TargetFrameInfo.cpp
TargetInstrInfo.cpp
TargetMachine.cpp
TargetMachineRegistry.cpp
TargetSchedInfo.cpp
TargetSchedule.td
TargetSelectionDAG.td	add truncstore	2005-12-17 20:42:29 +00:00
TargetSubtarget.cpp