Preston Gurd 2e2efd9600 Generic Bypass Slow Div ... - CodeGenPrepare pass for identifying div/rem ops - Backend specifies the type mapping using addBypassSlowDivType - Enabled only for Intel Atom with O2 32-bit -> 8-bit - Replace IDIV with instructions which test its value and use DIVB if the value is positive and less than 256. - In the case when the quotient and remainder of a divide are used a DIV and a REM instruction will be present in the IR. In the non-Atom case they are both lowered to IDIVs and CSE removes the redundant IDIV instruction, using the quotient and remainder from the first IDIV. However, due to this optimization CSE is not able to eliminate redundant IDIV instructions because they are located in different basic blocks. This is overcome by calculating both the quotient (DIV) and remainder (REM) in each basic block that is inserted by the optimization and reusing the result values when a subsequent DIV or REM instruction uses the same operands. - Test cases check for the presents of the optimization when calculating either the quotient, remainder, or both. Patch by Tyler Nowicki! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163150 91177308-0d34-0410-b5e6-96231b3b80d8		2012-09-04 18:22:17 +00:00
..
CMakeLists.txt	llvm/lib: [CMake] Add explicit dependency to intrinsics_gen.	2012-06-24 13:32:01 +00:00
DAGCombiner.cpp	Teach DAG combine a number of tricks to simplify FMA expressions in fast-math mode.	2012-09-01 06:04:27 +00:00
FastISel.cpp	Try to reduce the compile time impact of r161232.	2012-08-03 21:26:24 +00:00
FunctionLoweringInfo.cpp	Move lib/Analysis/DebugInfo.cpp to lib/VMCore/DebugInfo.cpp and	2012-06-28 00:05:13 +00:00
InstrEmitter.cpp	Add MachineInstr::tieOperands, remove setIsTied().	2012-08-31 20:50:53 +00:00
InstrEmitter.h	Allow trailing physreg RegisterSDNode operands on non-variadic instructions.	2012-07-04 23:53:23 +00:00
LegalizeDAG.cpp	Fix bug 13532.	2012-08-28 02:12:42 +00:00
LegalizeFloatTypes.cpp
LegalizeIntegerTypes.cpp	Revert "Take account of boolean vector contents when promoting a build vector from i1 to some other type. rdar://problem/12210060"	2012-09-01 17:37:55 +00:00
LegalizeTypes.cpp	Change interface for TargetLowering::LowerCallTo and TargetLowering::LowerCall	2012-05-25 16:35:28 +00:00
LegalizeTypes.h	Add support for FMA to WidenVectorResult.	2012-08-30 07:13:41 +00:00
LegalizeTypesGeneric.cpp	The result type of EXTRACT_VECTOR_ELT doesn't have to match the element type of	2012-07-12 09:01:35 +00:00
LegalizeVectorOps.cpp	Fix a typo.	2012-09-02 12:21:50 +00:00
LegalizeVectorTypes.cpp	Add support for FMA to WidenVectorResult.	2012-08-30 07:13:41 +00:00
LLVMBuild.txt
Makefile
ResourcePriorityQueue.cpp	I'm introducing a new machine model to simultaneously allow simple	2012-07-07 04:00:00 +00:00
ScheduleDAGFast.cpp	Simplify some more getAliasSet callers.	2012-06-01 22:38:17 +00:00
ScheduleDAGRRList.cpp	Fix a typo (the the => the)	2012-07-23 08:51:15 +00:00
ScheduleDAGSDNodes.cpp
ScheduleDAGSDNodes.h	Add SelectionDAG::getTargetIndex.	2012-08-07 22:37:05 +00:00
ScheduleDAGVLIW.cpp
SDNodeDbgValue.h
SDNodeOrdering.h
SelectionDAG.cpp	Remove extra MayLoad/MayStore flags from atomic_load/store.	2012-08-28 03:11:32 +00:00
SelectionDAGBuilder.cpp	BranchProb: modify the definition of an edge in BranchProbabilityInfo to handle	2012-08-24 18:14:27 +00:00
SelectionDAGBuilder.h	BranchProb: modify the definition of an edge in BranchProbabilityInfo to handle	2012-08-24 18:14:27 +00:00
SelectionDAGDumper.cpp	Add SelectionDAG::getTargetIndex.	2012-08-07 22:37:05 +00:00
SelectionDAGISel.cpp	BranchProb: modify the definition of an edge in BranchProbabilityInfo to handle	2012-08-24 18:14:27 +00:00
SelectionDAGPrinter.cpp	Add a getName function to MachineFunction. Use it in places that previously did getFunction()->getName(). Remove includes of Function.h that are no longer needed.	2012-08-22 06:07:19 +00:00
TargetLowering.cpp	Generic Bypass Slow Div	2012-09-04 18:22:17 +00:00
TargetSelectionDAGInfo.cpp