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dda4a07cd818fdfe2b49412e32e0e12d9e566e31
llvm-6502/test/CodeGen
T
History
Akira Hatanaka dda4a07cd8 Add support for 64-bit divide instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141024 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-03 21:06:13 +00:00
..
Alpha
Convert more tests over to the new atomic instructions.
2011-09-26 21:30:17 +00:00
ARM
ARM Darwin default relocation model is PIC.
2011-09-30 17:41:35 +00:00
Blackfin
…
CBackend
Only run tests in test/CodeGen/CBackend/X86 when both X86 and CBackend are supported
2011-09-26 06:44:27 +00:00
CellSPU
Pass signed (not unsigned) 10 bit field to SPU 'ori' instruction.
2011-09-02 10:05:01 +00:00
CPP
…
Generic
PR11004: Inline memcpy to avoid generating nested call sequence. Un-XFAIL 2011-06-09-TailCallByVal and 2010-11-04-BigByval
2011-09-26 06:13:20 +00:00
MBlaze
…
Mips
Add support for 64-bit divide instructions.
2011-10-03 21:06:13 +00:00
MSP430
…
PowerPC
Convert more tests over to the new atomic instructions.
2011-09-26 21:30:17 +00:00
PTX
PTX: Add new patterns for bitconvert and any_extend
2011-09-29 01:13:12 +00:00
SPARC
…
SystemZ
…
Thumb
Convert more tests to new atomic instructions.
2011-09-26 21:36:10 +00:00
Thumb2
ARM Darwin default relocation model is PIC.
2011-09-30 17:41:35 +00:00
X86
Filecheck-ize.
2011-09-30 23:40:29 +00:00
XCore
Associate a MemOperand with LDWCP nodes introduced during ISel.
2011-09-12 14:43:23 +00:00
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