Matheus Almeida 95f1fa7ec3 [mips] SYNC $stype instruction was added in Mips32 ... but SYNC with an implied operand ($stype = 0) is valid since Mips2. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211185 91177308-0d34-0410-b5e6-96231b3b80d8		2014-06-18 17:10:30 +00:00
..
AsmParser	[mips] Fix expansion of memory operation if destination register is not a GPR.	2014-06-18 14:49:56 +00:00
Disassembler	[mips][mips64r6] Add BLTC and BLTUC instructions	2014-06-18 14:36:00 +00:00
InstPrinter	[mips][mips64r6] Add Relocations R_MIPS_PCHI16, R_MIPS_PCLO16	2014-05-27 14:58:51 +00:00
MCTargetDesc	[mips][mips64r6] ll, sc, lld, and scd are re-encoded on MIPS32r6/MIPS64r6.	2014-06-16 13:13:03 +00:00
TargetInfo
CMakeLists.txt
LLVMBuild.txt
Makefile
MicroMipsInstrFormats.td
MicroMipsInstrFPU.td	[mips][mips64r6] bc1[tf] are not available on MIPS32r6/MIPS64r6	2014-06-12 15:00:17 +00:00
MicroMipsInstrInfo.td	[mips] Marked up instructions added in MIPS32r2 and tested that IAS for -mcpu=mips(2|32) does not accept them	2014-05-13 11:45:36 +00:00
Mips16FrameLowering.cpp
Mips16FrameLowering.h
Mips16HardFloat.cpp
Mips16HardFloat.h
Mips16HardFloatInfo.cpp
Mips16HardFloatInfo.h
Mips16InstrFormats.td
Mips16InstrInfo.cpp
Mips16InstrInfo.h
Mips16InstrInfo.td
Mips16ISelDAGToDAG.cpp
Mips16ISelDAGToDAG.h
Mips16ISelLowering.cpp	Target: change member from reference to pointer	2014-05-17 21:50:01 +00:00
Mips16ISelLowering.h
Mips16RegisterInfo.cpp
Mips16RegisterInfo.h
Mips32r6InstrFormats.td	[mips][mips64r6] cl[oz], and dcl[oz] are re-encoded in MIPS32r6/MIPS64r6	2014-06-16 13:18:59 +00:00
Mips32r6InstrInfo.td	[mips][mips64r6] Add BLTC and BLTUC instructions	2014-06-18 14:36:00 +00:00
Mips64InstrInfo.td	[mips][mips64r6] cl[oz], and dcl[oz] are re-encoded in MIPS32r6/MIPS64r6	2014-06-16 13:18:59 +00:00
Mips64r6InstrInfo.td	[mips][mips64r6] cl[oz], and dcl[oz] are re-encoded in MIPS32r6/MIPS64r6	2014-06-16 13:18:59 +00:00
Mips.h
Mips.td	[mips] Marked up instructions added in MIPS32r2 and tested that IAS for -mcpu=mips(2|32) does not accept them	2014-05-13 11:45:36 +00:00
MipsAnalyzeImmediate.cpp
MipsAnalyzeImmediate.h
MipsAsmPrinter.cpp	[mips] Optimize long branch for MIPS64 by removing %higher and %highest.	2014-05-27 18:53:06 +00:00
MipsAsmPrinter.h
MipsCallingConv.td
MipsCodeEmitter.cpp	[mips][mips64r6] Add LDPC instruction	2014-06-09 09:49:51 +00:00
MipsCondMov.td	[mips][mips64r6] c.cond.fmt, mov[fntz], and mov[fntz].[ds] are not available on MIPS32r6/MIPS64r6	2014-06-12 13:39:06 +00:00
MipsConstantIslandPass.cpp
MipsDelaySlotFiller.cpp	[mips][mips64r6] Replace m[tf]hi, m[tf]lo, mult, multu, dmult, dmultu, div, ddiv, divu, ddivu for MIPS32r6/MIPS64.	2014-06-12 10:44:10 +00:00
MipsDSPInstrFormats.td
MipsDSPInstrInfo.td
MipsFastISel.cpp	Add load/store functionality	2014-06-16 22:05:47 +00:00
MipsFrameLowering.cpp
MipsFrameLowering.h
MipsInstrFormats.td	[mips] Add cache and pref instructions	2014-06-13 13:15:59 +00:00
MipsInstrFPU.td	[mips][mips64r6] [ls][wd]c2 were re-encoded with 11-bit signed immediates rather than 16-bit in MIPS32r6/MIPS64r6	2014-06-16 10:00:45 +00:00
MipsInstrInfo.cpp
MipsInstrInfo.h
MipsInstrInfo.td	[mips] SYNC $stype instruction was added in Mips32	2014-06-18 17:10:30 +00:00
MipsISelDAGToDAG.cpp	[mips][mips64r6] [ls][dw][lr] are not available in MIPS32r6/MIPS64r6	2014-05-23 13:18:02 +00:00
MipsISelDAGToDAG.h
MipsISelLowering.cpp	[mips][mips64r6] ll, sc, lld, and scd are re-encoded on MIPS32r6/MIPS64r6.	2014-06-16 13:13:03 +00:00
MipsISelLowering.h	[mips][mips64r6] ll, sc, lld, and scd are re-encoded on MIPS32r6/MIPS64r6.	2014-06-16 13:13:03 +00:00
MipsJITInfo.cpp
MipsJITInfo.h
MipsLongBranch.cpp	[mips][mips64r6] b(ge|lt)zal are not available on MIPS32r6/MIPS64r6 and bal is a normal instruction	2014-06-13 13:02:52 +00:00
MipsMachineFunction.cpp
MipsMachineFunction.h
MipsMCInstLower.cpp	[mips] Optimize long branch for MIPS64 by removing %higher and %highest.	2014-05-27 18:53:06 +00:00
MipsMCInstLower.h	[mips] Optimize long branch for MIPS64 by removing %higher and %highest.	2014-05-27 18:53:06 +00:00
MipsModuleISelDAGToDAG.cpp
MipsModuleISelDAGToDAG.h	[C++11] Add 'override' keywords and remove 'virtual'. Additionally add 'final' and leave 'virtual' on some methods that are marked virtual without overriding anything and have no obvious overrides themselves. Mips edition	2014-04-29 07:58:02 +00:00
MipsMSAInstrFormats.td
MipsMSAInstrInfo.td	[mips][mips64r6] Add align and dalign	2014-05-15 12:06:36 +00:00
MipsOptimizePICCall.cpp
MipsOs16.cpp
MipsOs16.h
MipsRegisterInfo.cpp
MipsRegisterInfo.h
MipsRegisterInfo.td	[mips][mips64r6] c.cond.fmt, mov[fntz], and mov[fntz].[ds] are not available on MIPS32r6/MIPS64r6	2014-06-12 13:39:06 +00:00
MipsRelocations.h
MipsSchedule.td
MipsSEFrameLowering.cpp
MipsSEFrameLowering.h
MipsSEInstrInfo.cpp	[mips] Use MTHC1 when it is available (MIPS32r2 and later) for both FP32 and FP64	2014-06-12 11:55:58 +00:00
MipsSEInstrInfo.h
MipsSEISelDAGToDAG.cpp
MipsSEISelDAGToDAG.h
MipsSEISelLowering.cpp	[mips][mips64r6] bc1[tf] are not available on MIPS32r6/MIPS64r6	2014-06-12 15:00:17 +00:00
MipsSEISelLowering.h
MipsSelectionDAGInfo.cpp	Have TargetSelectionDAGInfo take a DataLayout initializer rather than	2014-06-06 19:04:48 +00:00
MipsSelectionDAGInfo.h
MipsSERegisterInfo.cpp
MipsSERegisterInfo.h
MipsSubtarget.cpp	[mips] Marked up instructions added in MIPS32r2 and tested that IAS for -mcpu=mips(2|32) does not accept them	2014-05-13 11:45:36 +00:00
MipsSubtarget.h	[mips][mips64r6] cl[oz], and dcl[oz] are re-encoded in MIPS32r6/MIPS64r6	2014-06-16 13:18:59 +00:00
MipsTargetMachine.cpp
MipsTargetMachine.h
MipsTargetObjectFile.cpp
MipsTargetObjectFile.h
MipsTargetStreamer.h
MSA.txt