llvm-6502

mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-02-23 20:29:30 +00:00

History

Amara Emerson 2f21452ba1 [AArch64] Fix NZCV reg live-in bug in F128CSEL codegen.

When generating the IfTrue basic block during the F128CSEL pseudo-instruction
handling, the NZCV live-in for the newly created BB wasn't being added. This
caused a fault during MI-sched/live range calculation when the predecessor
for the fall-through BB didn't have a live-in for phys-reg as expected.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193316 91177308-0d34-0410-b5e6-96231b3b80d8

2013-10-24 08:28:24 +00:00

AsmParser

Implement AArch64 vector load/store multiple N-element structure class SIMD(lselem).

2013-10-10 17:00:52 +00:00

Disassembler

Implement AArch64 vector load/store multiple N-element structure class SIMD(lselem).

2013-10-10 17:00:52 +00:00

InstPrinter

Implement AArch64 vector load/store multiple N-element structure class SIMD(lselem).

2013-10-10 17:00:52 +00:00

MCTargetDesc

Add a MCAsmInfoELF class and factor some code into it.

2013-10-16 01:34:32 +00:00

TargetInfo

…

Utils

Implement AArch64 vector load/store multiple N-element structure class SIMD(lselem).

2013-10-10 17:00:52 +00:00

AArch64.h

…

AArch64.td

…

AArch64AsmPrinter.cpp

AArch64: use RegisterOperand for NEON registers.

2013-09-13 07:26:52 +00:00

AArch64AsmPrinter.h

DebugInfo: remove target-specific Frame Index handling for DBG_VALUE MachineInstrs

2013-06-16 20:34:27 +00:00

AArch64BranchFixupPass.cpp

…

AArch64CallingConv.td

Initial support for Neon scalar instructions.

2013-09-24 02:47:27 +00:00

AArch64FrameLowering.cpp

Add const qualifier to some static arrays.

2013-07-15 07:02:45 +00:00

AArch64FrameLowering.h

Add const qualifier to some static arrays.

2013-07-15 07:02:45 +00:00

AArch64InstrFormats.td

[AArch64] Add support for NEON scalar three register different instruction

2013-10-17 18:12:29 +00:00

AArch64InstrInfo.cpp

Implement 3 AArch64 neon instructions : umov smov ins.

2013-09-17 02:21:02 +00:00

AArch64InstrInfo.h

DebugInfo: remove target-specific Frame Index handling for DBG_VALUE MachineInstrs

2013-06-16 20:34:27 +00:00

AArch64InstrInfo.td

Initial support for Neon scalar instructions.

2013-09-24 02:47:27 +00:00

AArch64InstrNEON.td

[AArch64] Add the constraint to NEON scalar mla/mls instructions.

2013-10-21 20:11:47 +00:00

AArch64ISelDAGToDAG.cpp

Implement AArch64 vector load/store multiple N-element structure class SIMD(lselem).

2013-10-10 17:00:52 +00:00

AArch64ISelLowering.cpp

[AArch64] Fix NZCV reg live-in bug in F128CSEL codegen.

2013-10-24 08:28:24 +00:00

AArch64ISelLowering.h

Implement aarch64 neon instruction set AdvSIMD (copy).

2013-10-11 02:33:55 +00:00

AArch64MachineFunctionInfo.cpp

…

AArch64MachineFunctionInfo.h

…

AArch64MCInstLower.cpp

AArch64: add initial NEON support

2013-08-01 09:20:35 +00:00

AArch64RegisterInfo.cpp

Don't cache the instruction info and register info objects.

2013-06-07 05:00:11 +00:00

AArch64RegisterInfo.h

Don't cache the instruction info and register info objects.

2013-06-07 05:00:11 +00:00

AArch64RegisterInfo.td

Implement AArch64 vector load/store multiple N-element structure class SIMD(lselem).

2013-10-10 17:00:52 +00:00

AArch64Schedule.td

…

AArch64SelectionDAGInfo.cpp

…

AArch64SelectionDAGInfo.h

…

AArch64Subtarget.cpp

AArch64: add initial NEON support

2013-08-01 09:20:35 +00:00

AArch64Subtarget.h

AArch64: enable MISched by default.

2013-10-09 07:53:57 +00:00

AArch64TargetMachine.cpp

…

AArch64TargetMachine.h

…

AArch64TargetObjectFile.cpp

…

AArch64TargetObjectFile.h

…

CMakeLists.txt

Target/*/CMakeLists.txt: Add the dependency to CommonTableGen explicitly for each corresponding CodeGen.

2013-08-06 06:38:37 +00:00

LLVMBuild.txt

…

Makefile

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README.txt

…

README.txt

This file will contain changes that need to be made before AArch64 can become an
officially supported target. Currently a placeholder.