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llvm-6502/test/MC/Disassembler
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Amaury de la Vieuville ebc3938ae7 ARM: check predicate bits for thumb instructions 
When encoded to thumb, VFP instruction and VMOV/VDUP between scalar and
core registers, must have their predicate bit to 0b1110.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184707 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-24 09:15:01 +00:00
..
AArch64
ARM ARM: check predicate bits for thumb instructions 2013-06-24 09:15:01 +00:00
MBlaze
Mips [mips] DSP-ASE move from HI/LO register instructions. 2013-04-18 00:52:44 +00:00
SystemZ [SystemZ] Immediate compare-and-branch support 2013-05-29 11:58:52 +00:00
X86 Update the X86 disassembler to use xacquire and xrelease when appropriate. 2013-06-20 22:32:18 +00:00
XCore [XCore] Add LDAPB instructions. 2013-05-05 13:36:53 +00:00