Chris Lattner e70da20f9a implement a readme entry, compiling the code into: ... _foo: movl $12, %eax andl 4(%esp), %eax movl _array(%eax), %eax ret instead of: _foo: movl 4(%esp), %eax shrl $2, %eax andl $3, %eax movl _array(,%eax,4), %eax ret As it turns out, this triggers all the time, in a wide variety of situations, for example, I see diffs like this in various programs: - movl 8(%eax), %eax - shll $2, %eax - andl $1020, %eax - movl (%esi,%eax), %eax + movzbl 8(%eax), %eax + movl (%esi,%eax,4), %eax - shll $2, %edx - andl $1020, %edx - movl (%edi,%edx), %edx + andl $255, %edx + movl (%edi,%edx,4), %edx Unfortunately, I also see stuff like this, which can be fixed in the X86 backend: - andl $85, %ebx - addl _bit_count(,%ebx,4), %ebp + shll $2, %ebx + andl $340, %ebx + addl _bit_count(%ebx), %ebp git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44656 91177308-0d34-0410-b5e6-96231b3b80d8		2007-12-06 07:33:36 +00:00
..
CallingConvLower.cpp
DAGCombiner.cpp	implement a readme entry, compiling the code into:	2007-12-06 07:33:36 +00:00
LegalizeDAG.cpp	Implement expand support for MERGE_VALUEs that only produces one result.	2007-11-24 19:12:15 +00:00
LegalizeDAGTypes.cpp	implement the rest of the functionality from SelectionDAGLegalize::ScalarizeVectorOp	2007-12-06 05:53:43 +00:00
Makefile
ScheduleDAG.cpp	Make labels work in asm blocks; allow labels as	2007-11-05 21:20:28 +00:00
ScheduleDAGList.cpp	Make CalcLatency() non-recursive.	2007-10-15 21:33:22 +00:00
ScheduleDAGRRList.cpp	Bug fix. Passive nodes are not in SUnitMap.	2007-11-09 01:27:11 +00:00
SelectionDAG.cpp	Implement necessary bits for flt_rounds gcc builtin.	2007-11-15 23:25:33 +00:00
SelectionDAGISel.cpp	Rather than having special rules like "intrinsics cannot	2007-12-03 20:06:50 +00:00
SelectionDAGPrinter.cpp
TargetLowering.cpp	Support returning non-power-of-2 vectors to unblock some work	2007-11-27 19:28:48 +00:00