Evan Cheng ec52aaa12f Some ARM implementaions, e.g. A-series, does return stack prediction. That is, ... the processor keeps a return addresses stack (RAS) which stores the address and the instruction execution state of the instruction after a function-call type branch instruction. Calling a "noreturn" function with normal call instructions (e.g. bl) can corrupt RAS and causes 100% return misprediction so LLVM should use a unconditional branch instead. i.e. mov lr, pc b _foo The "mov lr, pc" is issued in order to get proper backtrace. rdar://8979299 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151623 91177308-0d34-0410-b5e6-96231b3b80d8		2012-02-28 06:42:03 +00:00
..
CMakeLists.txt	fix cmake	2012-02-01 22:28:29 +00:00
DAGCombiner.cpp	Teach the DAGCombiner that certain loadext nodes followed by ANDs can be converted to zeroexts.	2012-02-20 12:02:38 +00:00
FastISel.cpp	Properly emit _fltused with FastISel. Refactor to share code with SDAG.	2012-02-22 19:06:13 +00:00
FunctionLoweringInfo.cpp	Tabs, formatting and long lines oh my!	2012-02-24 01:59:01 +00:00
InstrEmitter.cpp	Don't crash when a glue node contains an internal CopyToReg	2012-02-24 17:53:59 +00:00
InstrEmitter.h	Simplify EXTRACT_SUBREG emission.	2011-10-05 20:26:40 +00:00
LegalizeDAG.cpp	Some ARM implementaions, e.g. A-series, does return stack prediction. That is,	2012-02-28 06:42:03 +00:00
LegalizeFloatTypes.cpp	Convert assert(0) to llvm_unreachable	2012-02-05 08:31:47 +00:00
LegalizeIntegerTypes.cpp	Some ARM implementaions, e.g. A-series, does return stack prediction. That is,	2012-02-28 06:42:03 +00:00
LegalizeTypes.cpp	Some ARM implementaions, e.g. A-series, does return stack prediction. That is,	2012-02-28 06:42:03 +00:00
LegalizeTypes.h	1. Fix the widening of SETCC in WidenVecOp_SETCC. Use the correct return CC type.	2011-10-21 11:42:07 +00:00
LegalizeTypesGeneric.cpp	Remove unnecessary default cases in switches that cover all enum values.	2012-01-10 16:47:17 +00:00
LegalizeVectorOps.cpp	Convert assert(0) to llvm_unreachable	2012-02-05 08:31:47 +00:00
LegalizeVectorTypes.cpp	Added hook to let targets custom lower splitting of illegal vectors	2012-02-15 00:55:31 +00:00
LLVMBuild.txt	LLVMBuild: Remove trailing newline, which irked me.	2011-12-12 19:48:00 +00:00
Makefile	make -fno-rtti the default unless a directory builds with REQUIRES_RTTI.	2010-01-24 20:43:08 +00:00
ResourcePriorityQueue.cpp	VLIW specific scheduler framework that utilizes deterministic finite automaton (DFA).	2012-02-01 22:13:57 +00:00
ScheduleDAGFast.cpp	- Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and	2011-06-28 19:10:37 +00:00
ScheduleDAGRRList.cpp	Add register mask support to ScheduleDAGRRList.	2012-02-13 23:25:24 +00:00
ScheduleDAGSDNodes.cpp	Rename TargetSubtarget to TargetSubtargetInfo for consistency.	2011-07-01 21:01:15 +00:00
ScheduleDAGSDNodes.h	Add a RegisterMaskSDNode class.	2012-01-18 23:52:12 +00:00
ScheduleDAGVLIW.cpp	VLIW specific scheduler framework that utilizes deterministic finite automaton (DFA).	2012-02-01 22:13:57 +00:00
SDNodeDbgValue.h	Do not lose debug info of an inlined function argument even if the argument is only used through GEPs.	2011-02-18 22:43:42 +00:00
SDNodeOrdering.h
SelectionDAG.cpp	Some ARM implementaions, e.g. A-series, does return stack prediction. That is,	2012-02-28 06:42:03 +00:00
SelectionDAGBuilder.cpp	Some ARM implementaions, e.g. A-series, does return stack prediction. That is,	2012-02-28 06:42:03 +00:00
SelectionDAGBuilder.h	[unwind removal] Remove all of the code for the dead 'unwind' instruction. There	2012-02-06 21:44:22 +00:00
SelectionDAGISel.cpp	Rename getExceptionAddressRegister() to getExceptionPointerRegister() for consistency with setExceptionPointerRegister(...).	2012-02-14 04:45:49 +00:00
SelectionDAGPrinter.cpp	drop unneeded config.h includes	2011-12-22 23:04:07 +00:00
TargetLowering.cpp	Use the correct ShiftAmtTy for creating shifts after legalization. PR11881. Not committing a testcase because I think it will be too fragile.	2012-01-31 01:08:03 +00:00
TargetSelectionDAGInfo.cpp