Sanjay Patel ec60318bf5 Improve test to actually check for a folded load. ...

This test was checking for lack of a "movaps" (an aligned load)
rather than a "movups" (an unaligned load). It also included
a store which complicated the checking.

Add specific CPU runs to prevent subtarget feature flag overrides
from inhibiting this optimization.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227972 91177308-0d34-0410-b5e6-96231b3b80d8

2015-02-03 15:37:18 +00:00

..

AArch64

[AArch64] Prefer DUP/MOV ("CPY") to INS for vector_extract.

2015-02-02 17:55:57 +00:00

ARM

Fix ARM peephole optimizeCompare to avoid optimizing unsigned cmp to 0.

2015-02-02 16:56:50 +00:00

BPF

bpf: add missing lit.local.cfg

2015-01-24 18:20:52 +00:00

CPP

…

Generic

overloaded-intrinsic-name: exercise anyptr on struct

2015-01-27 20:03:08 +00:00

Hexagon

[Hexagon] Deleting old variants of intrinsics and adding missing tests.

2015-01-29 17:26:56 +00:00

Inputs

IR: Move MDLocation into place

2015-01-14 22:27:36 +00:00

Mips

Move the Mips target to storing the ABI in the TargetMachine rather

2015-01-26 17:33:46 +00:00

MSP430

…

NVPTX

[NVPTX] Emit .pragma "nounroll" for loops marked with nounroll

2015-02-01 02:27:45 +00:00

PowerPC

[PowerPC] VSX stores don't also read

2015-02-01 19:07:41 +00:00

R600

R600/SI: 64-bit and larger memory access must be at least 4-byte aligned

2015-02-02 18:02:28 +00:00

SPARC

Use the integrated assembler by default on SPARC.

2015-01-14 07:53:39 +00:00

SystemZ

Use the integrated assembler as default on SystemZ

2015-01-13 19:45:16 +00:00

Thumb

IR: Move MDLocation into place

2015-01-14 22:27:36 +00:00

Thumb2

[ARM] Fix a bug in constant island pass that was triggering an assertion.

2015-01-08 20:44:50 +00:00

X86

Improve test to actually check for a folded load.

2015-02-03 15:37:18 +00:00

XCore

IR: Move MDLocation into place

2015-01-14 22:27:36 +00:00