Evan Cheng ec693f77c0 * Added intelligence to X86 LEA addressing mode matching routine so it returns ... false if the match is not profitable. e.g. leal 1(%eax), %eax. * Added patterns for X86 integer loads and LEA32. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24635 91177308-0d34-0410-b5e6-96231b3b80d8		2005-12-08 02:01:35 +00:00
..
Alpha	fix divide and remainder	2005-12-06 23:27:39 +00:00
CBackend
IA64	Add some explicit type casts so that tblgen knows the type of the shiftamount, which is not necessarily the same as the type being shifted.	2005-12-05 02:34:29 +00:00
PowerPC	Silence another annoying GCC warning	2005-12-06 20:56:18 +00:00
Skeleton	Support multiple ValueTypes per RegisterClass, needed for upcoming vector	2005-12-01 04:51:06 +00:00
Sparc	Support multiple ValueTypes per RegisterClass, needed for upcoming vector	2005-12-01 04:51:06 +00:00
SparcV8	Support multiple ValueTypes per RegisterClass, needed for upcoming vector	2005-12-01 04:51:06 +00:00
SparcV9	Support multiple ValueTypes per RegisterClass, needed for upcoming vector	2005-12-01 04:51:06 +00:00
X86	* Added intelligence to X86 LEA addressing mode matching routine so it returns	2005-12-08 02:01:35 +00:00
Makefile
MRegisterInfo.cpp
SubtargetFeature.cpp
Target.td	* Added instruction property hasCtrlDep for those which r/w control-flow	2005-12-04 08:13:17 +00:00
TargetData.cpp
TargetFrameInfo.cpp
TargetInstrInfo.cpp
TargetMachine.cpp
TargetMachineRegistry.cpp
TargetSchedInfo.cpp
TargetSchedule.td
TargetSelectionDAG.td	On some targets (e.g. X86), shift amounts are not the same as the value	2005-12-05 02:37:26 +00:00
TargetSubtarget.cpp