Tim Northover ca396e391e IR: add a second ordering operand to cmpxhg for failure ... The syntax for "cmpxchg" should now look something like: cmpxchg i32* %addr, i32 42, i32 3 acquire monotonic where the second ordering argument gives the required semantics in the case that no exchange takes place. It should be no stronger than the first ordering constraint and cannot be either "release" or "acq_rel" (since no store will have taken place). rdar://problem/15996804 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203559 91177308-0d34-0410-b5e6-96231b3b80d8		2014-03-11 10:48:52 +00:00
..
64abi.ll	The SPARCv9 ABI returns a float in %f0.	2014-01-12 04:13:17 +00:00
64bit.ll	Clean up the Legal/Expand logic for SPARC popc.	2014-01-26 08:12:34 +00:00
64cond.ll	The SPARCv9 ABI returns a float in %f0.	2014-01-12 04:13:17 +00:00
64spill.ll	[SparcV9] Use separate instruction patterns for 64 bit arithmetic instructions instead of reusing 32 bit instruction patterns.	2013-12-29 07:15:09 +00:00
2006-01-22-BitConvertLegalize.ll
2007-05-09-JumpTables.ll
2007-07-05-LiveIntervalAssert.ll
2008-10-10-InlineAsmMemoryOperand.ll
2008-10-10-InlineAsmRegOperand.ll
2009-08-28-PIC.ll	[SparcV9] Use correct register class (I64RegClass) to hold the address of _GLOBAL_OFFSET_TABLE_ in sparcv9.	2014-01-29 03:35:08 +00:00
2009-08-28-WeakLinkage.ll
2011-01-11-Call.ll	[Sparc] Emit retl/ret instead of jmp instruction. It improves the readability of the assembly generated.	2014-01-10 02:55:27 +00:00
2011-01-11-CC.ll
2011-01-11-FrameAddr.ll	[Sparc] Emit 'restore' instead of 'restore %g0, %g0, %g0'. This improves the readability of the generated code.	2014-03-01 01:04:26 +00:00
2011-01-19-DelaySlot.ll	[Sparc] Emit 'restore' instead of 'restore %g0, %g0, %g0'. This improves the readability of the generated code.	2014-03-01 01:04:26 +00:00
2011-01-21-ByValArgs.ll
2011-01-22-SRet.ll
2011-12-03-TailDuplication.ll
2012-05-01-LowerArguments.ll
2013-05-17-CallFrame.ll	[SPARCV9]: Adjust the resultant pointer of DYNAMIC_STACKALLOC with the stack BIAS on sparcV9.	2013-12-09 05:13:25 +00:00
atomics.ll	IR: add a second ordering operand to cmpxhg for failure	2014-03-11 10:48:52 +00:00
basictest.ll
blockaddr.ll
constpool.ll	The SPARCv9 ABI returns a float in %f0.	2014-01-12 04:13:17 +00:00
ctpop.ll	Only generate the popc instruction for SPARC CPUs that implement it.	2014-01-26 06:09:59 +00:00
DbgValueOtherTargets.test
exception.ll	[Sparc] Set %o7 as the return address register instead of %i7 in MCRegisterInfo. Also, add CFI instructions to initialize the frame correctly.	2014-02-01 18:54:16 +00:00
float.ll
fp128.ll	Lower FNEG just like FABS to fneg[ds] and fmov[ds], thus avoiding	2014-02-27 19:26:29 +00:00
globals.ll	[Sparc] Emit retl/ret instead of jmp instruction. It improves the readability of the assembly generated.	2014-01-10 02:55:27 +00:00
inlineasm.ll	[Sparc] Add support for inline assembly constraints which specify registers by their aliases.	2014-01-22 03:18:42 +00:00
leafproc.ll	[Sparc] Emit retl/ret instead of jmp instruction. It improves the readability of the assembly generated.	2014-01-10 02:55:27 +00:00
lit.local.cfg
mature-mc-support.ll	[Sparc] Add support for parsing directives in SparcAsmParser.	2014-03-01 02:18:04 +00:00
missinglabel.ll	Handle bundled terminators in isBlockOnlyReachableByFallthrough.	2014-01-12 19:24:08 +00:00
mult-alt-generic-sparc.ll
obj-relocs.ll	[Sparc] Remove spurious checks from a testcase.	2014-02-19 15:57:49 +00:00
parts.ll	Expand 64bit {SHL,SHR,SRA}_PARTS on sparcv9.	2014-02-19 21:35:39 +00:00
private.ll
rem.ll	[Sparc] Emit retl/ret instead of jmp instruction. It improves the readability of the assembly generated.	2014-01-10 02:55:27 +00:00
setjmp.ll
spillsize.ll	Always let value types influence register classes.	2014-01-14 06:18:38 +00:00
tls.ll	[Sparc] Emit relocations for Thread Local Storage (TLS) when integrated assembler is used.	2014-02-07 05:54:20 +00:00
trap.ll	SPARC: Implement TRAP lowering. Matches what GCC emits.	2014-02-23 21:43:52 +00:00
varargs.ll