Chris Lattner edab1b9133 Constant fold all of the vector binops. This allows us to compile this: ... "vector unsigned char mergeLowHigh = (vector unsigned char) ( 8, 9, 10, 11, 16, 17, 18, 19, 12, 13, 14, 15, 20, 21, 22, 23 ); vector unsigned char mergeHighLow = vec_xor( mergeLowHigh, vec_splat_u8(8));" aka: void %test2(<16 x sbyte>* %P) { store <16 x sbyte> cast (<4 x int> xor (<4 x int> cast (<16 x ubyte> < ubyte 8, ubyte 9, ubyte 10, ubyte 11, ubyte 16, ubyte 17, ubyte 18, ubyte 19, ubyte 12, ubyte 13, ubyte 14, ubyte 15, ubyte 20, ubyte 21, ubyte 22, ubyte 23 > to <4 x int>), <4 x int> cast (<16 x sbyte> < sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8 > to <4 x int>)) to <16 x sbyte>), <16 x sbyte> * %P ret void } into this: _test2: mfspr r2, 256 oris r4, r2, 32768 mtspr 256, r4 li r4, lo16(LCPI2_0) lis r5, ha16(LCPI2_0) lvx v0, r5, r4 stvx v0, 0, r3 mtspr 256, r2 blr instead of this: _test2: mfspr r2, 256 oris r4, r2, 49152 mtspr 256, r4 li r4, lo16(LCPI2_0) lis r5, ha16(LCPI2_0) vspltisb v0, 8 lvx v1, r5, r4 vxor v0, v1, v0 stvx v0, 0, r3 mtspr 256, r2 blr ... which occurs here: http://developer.apple.com/hardware/ve/calcspeed.html git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27343 91177308-0d34-0410-b5e6-96231b3b80d8		2006-04-02 03:25:57 +00:00
..
SelectionDAG	Constant fold all of the vector binops. This allows us to compile this:	2006-04-02 03:25:57 +00:00
AsmPrinter.cpp	Use "llvm.metadata" section for debug globals. Filter out these globals in the	2006-03-07 22:00:35 +00:00
BranchFolding.cpp	Remove trailing whitespace	2005-04-21 22:36:52 +00:00
DwarfWriter.cpp	Refactor address attributes. Add base register to frame info.	2006-03-28 14:58:32 +00:00
ELFWriter.cpp	add these so I can be less naughty	2005-12-28 06:29:02 +00:00
IntrinsicLowering.cpp	Handle new forms of llvm.dbg intrinsics.	2006-03-23 18:06:46 +00:00
LiveInterval.cpp	Fix LiveInterval::getOverlapingRanges to take things in the right order	2005-10-21 06:41:30 +00:00
LiveIntervalAnalysis.cpp	Add explicit #includes of <iostream>	2006-01-22 23:41:00 +00:00
LiveVariables.cpp	Add a LiveVariables::VarInfo::dump method	2006-01-04 05:40:30 +00:00
MachineBasicBlock.cpp	Remove trailing whitespace	2005-04-21 22:36:52 +00:00
MachineCodeEmitter.cpp	mixed-STL programs are big and nasty :(	2005-12-28 02:44:35 +00:00
MachineDebugInfo.cpp	More bulletproofing of DebugInfoDesc verify.	2006-03-28 01:30:18 +00:00
MachineFunction.cpp	Adjust to MachineConstantPool interface change: instead of keeping a	2006-02-09 04:46:04 +00:00
MachineInstr.cpp	Remove trailing whitespace	2005-04-21 22:36:52 +00:00
Makefile	Change Library Names Not To Conflict With Others When Installed	2004-10-27 23:18:45 +00:00
Passes.cpp	Alkis agrees that that iterative scan allocator isn't going to be worked on	2005-10-24 04:14:30 +00:00
PHIElimination.cpp	Add support for targets (like Alpha) that have terminator instructions which	2006-01-04 07:12:21 +00:00
PhysRegTracker.h	Improved PhysRegTracker interface. RegAlloc lazily allocates the register tracker using a std::auto_ptr	2004-02-23 06:10:13 +00:00
PrologEpilogInserter.cpp	Always compute max align.	2005-11-06 17:43:20 +00:00
RegAllocLinearScan.cpp	Add some comments.	2006-03-25 23:00:56 +00:00
RegAllocLocal.cpp	Add explicit #includes of <iostream>	2006-01-22 23:41:00 +00:00
RegAllocSimple.cpp	Add explicit #includes of <iostream>	2006-01-22 23:41:00 +00:00
TwoAddressInstructionPass.cpp	Add explicit #includes of <iostream>	2006-01-22 23:41:00 +00:00
UnreachableBlockElim.cpp	Remove trailing whitespace	2005-04-21 22:36:52 +00:00
VirtRegMap.cpp	Fix a bug that Evan exposed with some changes he's making, and that was	2006-02-25 02:17:31 +00:00
VirtRegMap.h	Remove trailing whitespace	2005-04-21 22:36:52 +00:00