Jyotsna Verma ee0ef13eba Hexagon: Add encoding bits to the TFR64 instructions. ... Set imMoveImm, isAsCheapAsAMove flags for TFRI instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176499 91177308-0d34-0410-b5e6-96231b3b80d8		2013-03-05 18:42:28 +00:00
..
absaddr-store.ll
args.ll	Hexagon: Add encoding bits to the TFR64 instructions.	2013-03-05 18:42:28 +00:00
cext-check.ll	Hexagon: Move HexagonMCInst.h to MCTargetDesc/HexagonMCInst.h.	2013-02-20 16:13:27 +00:00
cext-valid-packet1.ll	Hexagon: Add constant extender support framework.	2013-03-01 17:37:13 +00:00
cext-valid-packet2.ll	Hexagon: Add constant extender support framework.	2013-03-01 17:37:13 +00:00
cmp_pred_reg.ll
cmp_pred.ll
cmp-to-genreg.ll
cmp-to-predreg.ll
cmpb_pred.ll
combine_ir.ll
combine.ll
convertdptoint.ll
convertdptoll.ll
convertsptoint.ll
convertsptoll.ll
ctlz-cttz-ctpop.ll	Hexagon: Expand cttz, ctlz, and ctpop for now.	2013-02-21 19:39:40 +00:00
dadd.ll
dmul.ll
double.ll
doubleconvert-ieee-rnd-near.ll
dsub.ll
dualstore.ll	Hexagon: Add encoding bits to the TFR64 instructions.	2013-03-05 18:42:28 +00:00
fadd.ll
fcmp.ll
float.ll
floatconvert-ieee-rnd-near.ll
fmul.ll
frame.ll
fsub.ll
fusedandshift.ll
gp-plus-offset-load.ll	Hexagon: Use absolute addressing mode loads/stores for global+offset	2013-02-13 21:38:46 +00:00
gp-plus-offset-store.ll	Hexagon: Use absolute addressing mode loads/stores for global+offset	2013-02-13 21:38:46 +00:00
hwloop-cleanup.ll
hwloop-const.ll
hwloop-dbg.ll
hwloop-le.ll
hwloop-lt1.ll
hwloop-lt.ll
hwloop-ne.ll
idxload-with-zero-offset.ll
lit.local.cfg
macint.ll
mpy.ll
newvaluejump2.ll
newvaluejump.ll
newvaluestore.ll
opt-fabs.ll
opt-fneg.ll
postinc-load.ll
postinc-store.ll
pred-absolute-store.ll	Hexagon: Add support to generate predicated absolute addressing mode	2013-02-12 16:06:23 +00:00
predicate-copy.ll	Hexagon: add support for predicate-GPR copies.	2013-02-13 22:56:34 +00:00
remove_lsr.ll
simpletailcall.ll
static.ll
struct_args_large.ll
struct_args.ll
vaddh.ll
validate-offset.ll