Evan Cheng f0701842f7 Add more X86 ISel patterns. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24520 91177308-0d34-0410-b5e6-96231b3b80d8		2005-11-29 19:38:52 +00:00
..
Alpha	No targets support line number info yet.	2005-11-29 06:16:21 +00:00
CBackend	do not allow '.' in symbol names	2005-11-10 21:39:29 +00:00
IA64	No targets support line number info yet.	2005-11-29 06:16:21 +00:00
PowerPC	Hook up one type, v4f32, to the VR RegisterClass for now.	2005-11-29 08:17:20 +00:00
Skeleton	Add a new option to indicate we want the code generator to emit code quickly,not spending tons of time microoptimizing it. This is useful for an -O0style of build.	2005-11-08 02:11:51 +00:00
Sparc	Add a new option to indicate we want the code generator to emit code quickly,not spending tons of time microoptimizing it. This is useful for an -O0style of build.	2005-11-08 02:11:51 +00:00
SparcV8	Add a new option to indicate we want the code generator to emit code quickly,not spending tons of time microoptimizing it. This is useful for an -O0style of build.	2005-11-08 02:11:51 +00:00
SparcV9	Add a new option to indicate we want the code generator to emit code quickly,not spending tons of time microoptimizing it. This is useful for an -O0style of build.	2005-11-08 02:11:51 +00:00
X86	Add more X86 ISel patterns.	2005-11-29 19:38:52 +00:00
Makefile	DONT_BUILD_RELINKED is gone and implied by BUILD_ARCHIVE now	2005-10-24 02:26:13 +00:00
MRegisterInfo.cpp	Rename MRegisterDesc -> TargetRegisterDesc for consistency	2005-09-30 17:49:27 +00:00
SubtargetFeature.cpp	Preparation of supporting scheduling info. Need to find info based on selected	2005-10-25 15:15:28 +00:00
Target.td	Add the majority of the vector machien value types we expect to support,	2005-11-29 05:45:29 +00:00
TargetData.cpp	Update to use the new MathExtras.h support for log2 computation.	2005-08-02 19:26:06 +00:00
TargetFrameInfo.cpp	Eliminate all remaining tabs and trailing spaces.	2005-07-27 06:12:32 +00:00
TargetInstrInfo.cpp
TargetMachine.cpp	Remove the X86 and PowerPC Simple instruction selectors; their time has	2005-08-18 23:53:15 +00:00
TargetMachineRegistry.cpp	1. Use SubtargetFeatures in llc/lli.	2005-09-01 21:38:21 +00:00
TargetSchedInfo.cpp
TargetSchedule.td	add a marker	2005-10-23 22:07:20 +00:00
TargetSelectionDAG.td	Add globaladdress and targetglobaladdress nodes for dag patterns	2005-11-17 07:20:15 +00:00
TargetSubtarget.cpp	Eliminate all remaining tabs and trailing spaces.	2005-07-27 06:12:32 +00:00