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llvm-6502/test/CodeGen
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Mon P Wang f0fcdd8e26 Expand insert/extract of a <4 x i32> with a variable index. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62281 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-15 21:10:20 +00:00
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Alpha
Add the private linkage.
2009-01-15 20:18:42 +00:00
ARM
Add the private linkage.
2009-01-15 20:18:42 +00:00
CBackend
…
CellSPU
Add the private linkage.
2009-01-15 20:18:42 +00:00
CPP
…
Generic
The list-td and list-tdrr schedulers don't yet support physreg
2009-01-13 20:24:13 +00:00
IA64
Add the private linkage.
2009-01-15 20:18:42 +00:00
Mips
Add the private linkage.
2009-01-15 20:18:42 +00:00
PowerPC
Add the private linkage.
2009-01-15 20:18:42 +00:00
SPARC
Add the private linkage.
2009-01-15 20:18:42 +00:00
X86
Expand insert/extract of a <4 x i32> with a variable index.
2009-01-15 21:10:20 +00:00
XCore
Add the private linkage.
2009-01-15 20:18:42 +00:00