Jim Grosbach f1f16c832f ARM updating VST2 pseudo-lowering fixed vs. register update. ... rdar://10663487 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147876 91177308-0d34-0410-b5e6-96231b3b80d8		2012-01-10 21:11:12 +00:00
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ARM	ARM updating VST2 pseudo-lowering fixed vs. register update.	2012-01-10 21:11:12 +00:00
CBackend	Upgrade syntax of tests using volatile instructions to use 'load volatile' instead of 'volatile load', which is archaic.	2011-11-27 06:54:59 +00:00
CellSPU
CPP
Generic	Manually upgrade the test suite to specify the flag to cttz and ctlz.	2011-12-12 11:59:10 +00:00
Hexagon	Hexagon: Fix a nasty order-of-initialization bug.	2011-12-16 19:08:59 +00:00
MBlaze
Mips	Have getRegForInlineAsmConstraint return the correct register class when target	2012-01-04 02:45:01 +00:00
MSP430	Upgrade syntax of tests using volatile instructions to use 'load volatile' instead of 'volatile load', which is archaic.	2011-11-27 06:54:59 +00:00
PowerPC	Cleanup stack/frame register define/kill states. This fixes two bugs:	2011-12-30 00:34:00 +00:00
PTX	PTX: Continue to fix up the register mess.	2011-12-06 17:39:48 +00:00
SPARC	Sparc CodeGen: Fix AnalyzeBranch for PR 10282. Removing addSuccessor() since	2011-12-03 21:24:48 +00:00
Thumb	Fix more places which should be checking for iOS, not darwin.	2012-01-04 01:55:04 +00:00
Thumb2	Allow machine-cse to look across MBB boundary when cse'ing instructions that	2012-01-10 02:02:58 +00:00
X86	Fix a bug in the legalization of shuffle vectors. When we emulate shuffles using BUILD_VECTORS we may be using a BV of different type. Make sure to cast it back.	2012-01-10 14:28:46 +00:00
XCore	FileCheck hygiene.	2012-01-05 00:43:34 +00:00