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f28a29b776
llvm-6502/lib/CodeGen/SelectionDAG
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Arnold Schwaighofer f28a29b776 Merge load/store sequences with adresses: base + index + offset 
We would also like to merge sequences that involve a variable index like in the
example below.

    int index = *idx++
    int i0 = c[index+0];
    int i1 = c[index+1];
    b[0] = i0;
    b[1] = i1;

By extending the parsing of the base pointer to handle dags that contain a
base, index, and offset we can handle examples like the one above.

The dag for the code above will look something like:

 (load (i64 add (i64 copyfromreg %c)
                (i64 signextend (i8 load %index))))

 (load (i64 add (i64 copyfromreg %c)
                (i64 signextend (i32 add (i32 signextend (i8 load %index))
                                         (i32 1)))))

The code that parses the tree ignores the intermediate sign extensions. However,
if there is a sign extension it needs to be on all indexes.

 (load (i64 add (i64 copyfromreg %c)
                (i64 signextend (add (i8 load %index)
                                     (i8 1))))
 vs

 (load (i64 add (i64 copyfromreg %c)
                (i64 signextend (i32 add (i32 signextend (i8 load %index))
                                         (i32 1)))))
radar://13536387

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178483 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-01 18:12:58 +00:00
..
CMakeLists.txt llvm/lib: [CMake] Add explicit dependency to intrinsics_gen. 2012-06-24 13:32:01 +00:00
DAGCombiner.cpp Merge load/store sequences with adresses: base + index + offset 2013-04-01 18:12:58 +00:00
FastISel.cpp [fast-isel] Add a preemptive fix for the case where we fail to materialize an 2013-03-28 23:04:47 +00:00
FunctionLoweringInfo.cpp Revert 172027 and 174336. Remove diagnostics about over-aligned stack objects. 2013-02-08 20:35:15 +00:00
InstrEmitter.cpp Move all of the header files which are involved in modelling the LLVM IR 2013-01-02 11:36:10 +00:00
InstrEmitter.h Use MachineInstrBuilder in InstrEmitter. 2012-12-20 18:08:09 +00:00
LegalizeDAG.cpp Remove default from fully covered switch. 2013-03-08 17:03:19 +00:00
LegalizeFloatTypes.cpp Set properties for f128 type. 2013-03-01 21:11:44 +00:00
LegalizeIntegerTypes.cpp Fix PR10475 2013-03-01 18:40:30 +00:00
LegalizeTypes.cpp Move SDNode order propagation to SDNodeOrdering, which also fixes a missed 2013-03-20 14:51:01 +00:00
LegalizeTypes.h Move SDNode order propagation to SDNodeOrdering, which also fixes a missed 2013-03-20 14:51:01 +00:00
LegalizeTypesGeneric.cpp Move all of the header files which are involved in modelling the LLVM IR 2013-01-02 11:36:10 +00:00
LegalizeVectorOps.cpp SelectionDAG compile time improvement. 2013-02-22 23:33:30 +00:00
LegalizeVectorTypes.cpp SDAG: Handle scalarizing an extend of a <1 x iN> vector. 2013-03-07 05:47:54 +00:00
LLVMBuild.txt LLVMBuild: Remove trailing newline, which irked me. 2011-12-12 19:48:00 +00:00
Makefile
ResourcePriorityQueue.cpp Change TargetLowering::getRegClassFor to take an MVT, instead of EVT. 2012-12-13 06:34:11 +00:00
ScheduleDAGFast.cpp Move all of the header files which are involved in modelling the LLVM IR 2013-01-02 11:36:10 +00:00
ScheduleDAGRRList.cpp Revert "pre-RA-sched: fix TargetOpcode usage" 2013-03-20 15:43:00 +00:00
ScheduleDAGSDNodes.cpp Change TargetLowering::getRepRegClassFor to take an MVT, instead of 2012-12-13 18:45:35 +00:00
ScheduleDAGSDNodes.h Fix #includes, so we include only what we really need. 2013-02-20 00:26:25 +00:00
ScheduleDAGVLIW.cpp Move all of the header files which are involved in modelling the LLVM IR 2013-01-02 11:36:10 +00:00
SDNodeDbgValue.h Sort includes for all of the .h files under the 'lib' tree. These were 2012-12-04 07:12:27 +00:00
SDNodeOrdering.h Make variable name more explicit and eliminate redundant lookup in SDNodeOrdering 2013-03-20 23:10:59 +00:00
SelectionDAG.cpp When computing the demanded bits of Load SDNodes, make sure that we are looking at the loaded-value operand and not the ptr result (in case of pre-inc loads). 2013-03-20 22:53:44 +00:00
SelectionDAGBuilder.cpp Remove the type legality check from the SelectionDAGBuilder when it lowers @llvm.fmuladd to ISD::FMA nodes. 2013-03-23 08:26:53 +00:00
SelectionDAGBuilder.h Move all of the header files which are involved in modelling the LLVM IR 2013-01-02 11:36:10 +00:00
SelectionDAGDumper.cpp Teach SDISel to combine fsin / fcos into a fsincos node if the following 2013-01-29 02:32:37 +00:00
SelectionDAGISel.cpp Move SDNode order propagation to SDNodeOrdering, which also fixes a missed 2013-03-20 14:51:01 +00:00
SelectionDAGPrinter.cpp Move all of the header files which are involved in modelling the LLVM IR 2013-01-02 11:36:10 +00:00
TargetLowering.cpp Add static cast to unsigned char whenever a character classification function is called with a signed char argument, in order to avoid assertions in Windows Debug configuration. 2013-02-12 21:21:59 +00:00
TargetSelectionDAGInfo.cpp Move TargetData to DataLayout. 2012-10-08 16:38:25 +00:00