Jyotsna Verma f6563427c4 Hexagon: Use absolute addressing mode loads/stores for global+offset ... instead of redefining separate instructions for them. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175086 91177308-0d34-0410-b5e6-96231b3b80d8		2013-02-13 21:38:46 +00:00
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AArch64	Implement external weak (ELF) symbols on AArch64	2013-02-06 16:43:33 +00:00
ARM	PR14992 - Tablegen incorrectly converts ARM tLDMIA_UPD pseudo to tLDMIA	2013-02-13 19:21:47 +00:00
CPP
Generic
Hexagon	Hexagon: Use absolute addressing mode loads/stores for global+offset	2013-02-13 21:38:46 +00:00
MBlaze
Mips	For Mips 16, add the optimization where the 16 bit form of addiu sp can be used	2013-02-13 20:28:27 +00:00
MSP430
NVPTX	[NVPTX] Disable vector registers	2013-02-12 14:18:49 +00:00
PowerPC	DAGCombiner: Constant folding around pre-increment loads/stores	2013-02-08 21:35:47 +00:00
R600	R600: Add support for SET*_DX10 instructions	2013-02-07 14:02:35 +00:00
SI
SPARC
Thumb
Thumb2
X86	[ms-inline-asm] Add support for memory references that have non-immediate	2013-02-13 21:33:44 +00:00
XCore