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llvm-6502/test/CodeGen/Hexagon
Jyotsna Verma f6563427c4 Hexagon: Use absolute addressing mode loads/stores for global+offset
instead of redefining separate instructions for them.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175086 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-13 21:38:46 +00:00
..
absaddr-store.ll Hexagon: Use multiclass for absolute addressing mode stores. 2013-02-05 18:15:34 +00:00
args.ll
cmp_pred_reg.ll Hexagon: Use TFR_cond with cmpb.[eq,gt,gtu] to handle 2013-02-05 19:20:45 +00:00
cmp_pred.ll Hexagon: Use TFR_cond with cmpb.[eq,gt,gtu] to handle 2013-02-05 19:20:45 +00:00
cmp-to-genreg.ll Hexagon: Add V4 compare instructions. Enable relationship mapping 2013-02-05 16:42:24 +00:00
cmp-to-predreg.ll Hexagon: Add V4 compare instructions. Enable relationship mapping 2013-02-05 16:42:24 +00:00
cmpb_pred.ll Hexagon: Use TFR_cond with cmpb.[eq,gt,gtu] to handle 2013-02-05 19:20:45 +00:00
combine_ir.ll Hexagon: Add V4 combine instructions and some more Def Pats for V2. 2013-02-04 15:52:56 +00:00
combine.ll Enable all Hexagon tests. 2012-05-15 16:13:12 +00:00
convertdptoint.ll
convertdptoll.ll
convertsptoint.ll
convertsptoll.ll
dadd.ll
dmul.ll
double.ll
doubleconvert-ieee-rnd-near.ll
dsub.ll
dualstore.ll
fadd.ll
fcmp.ll
float.ll
floatconvert-ieee-rnd-near.ll
fmul.ll
frame.ll
fsub.ll
fusedandshift.ll
gp-plus-offset-load.ll Hexagon: Use absolute addressing mode loads/stores for global+offset 2013-02-13 21:38:46 +00:00
gp-plus-offset-store.ll Hexagon: Use absolute addressing mode loads/stores for global+offset 2013-02-13 21:38:46 +00:00
hwloop-cleanup.ll Extend Hexagon hardware loop generation to handle various additional cases: 2013-02-11 21:37:55 +00:00
hwloop-const.ll Extend Hexagon hardware loop generation to handle various additional cases: 2013-02-11 21:37:55 +00:00
hwloop-dbg.ll Extend Hexagon hardware loop generation to handle various additional cases: 2013-02-11 21:37:55 +00:00
hwloop-le.ll Extend Hexagon hardware loop generation to handle various additional cases: 2013-02-11 21:37:55 +00:00
hwloop-lt1.ll Extend Hexagon hardware loop generation to handle various additional cases: 2013-02-11 21:37:55 +00:00
hwloop-lt.ll Extend Hexagon hardware loop generation to handle various additional cases: 2013-02-11 21:37:55 +00:00
hwloop-ne.ll Extend Hexagon hardware loop generation to handle various additional cases: 2013-02-11 21:37:55 +00:00
idxload-with-zero-offset.ll
lit.local.cfg
macint.ll
mpy.ll
newvaluejump2.ll
newvaluejump.ll
newvaluestore.ll
opt-fabs.ll
opt-fneg.ll
postinc-load.ll
postinc-store.ll Hexagon: Add testcase for post-increment store instructions. 2013-02-05 18:23:51 +00:00
pred-absolute-store.ll Hexagon: Add support to generate predicated absolute addressing mode 2013-02-12 16:06:23 +00:00
remove_lsr.ll
simpletailcall.ll
static.ll
struct_args_large.ll
struct_args.ll Hexagon: Add V4 combine instructions and some more Def Pats for V2. 2013-02-04 15:52:56 +00:00
vaddh.ll
validate-offset.ll