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llvm-6502/lib/Target/Alpha
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Anton Korobeynikov b74ed07bfd Adding dllimport, dllexport and external weak linkage types. 
DLL* linkages got full (I hope) codegeneration support in C & both x86
assembler backends.
External weak linkage added for future use, we don't provide any
codegeneration, etc. support for it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30374 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-14 18:23:27 +00:00
..
.cvsignore ignore generated files 2005-09-07 23:47:44 +00:00
Alpha.h - Refactor the code that resolve basic block references to a TargetJITInfo 2006-07-25 20:40:54 +00:00
Alpha.td getCalleeSaveRegs and getCalleeSaveRegClasses are no long TableGen'd. 2006-05-18 00:12:58 +00:00
AlphaAsmPrinter.cpp Adding dllimport, dllexport and external weak linkage types. 2006-09-14 18:23:27 +00:00
AlphaCodeEmitter.cpp Resolve BB references with relocation. 2006-07-27 18:21:10 +00:00
AlphaInstrFormats.td Let the alpha breakage begin. First Formals and RET. next Calls 2006-06-12 18:09:24 +00:00
AlphaInstrInfo.cpp these are copies too 2006-03-09 18:18:51 +00:00
AlphaInstrInfo.h isStoreToStackSlot 2006-02-03 03:07:37 +00:00
AlphaInstrInfo.td CALLSEQ_* produces chain even if that's not needed. 2006-08-11 09:03:33 +00:00
AlphaISelDAGToDAG.cpp Do not use getTargetNode() and SelectNodeTo() which takes more than 3 2006-08-27 08:14:06 +00:00
AlphaISelLowering.cpp Reflects MachineConstantPoolEntry changes. 2006-09-12 21:04:05 +00:00
AlphaISelLowering.h inline asm, at least for floats 2006-06-21 13:37:27 +00:00
AlphaJITInfo.cpp Resolve BB references with relocation. 2006-07-27 18:21:10 +00:00
AlphaJITInfo.h Completely rearchitect the interface between targets and the pass manager. 2006-09-04 04:14:57 +00:00
AlphaRegisterInfo.cpp Completely eliminate def&use operands. Now a register operand is EITHER a 2006-09-05 02:31:13 +00:00
AlphaRegisterInfo.h getCalleeSaveRegs and getCalleeSaveRegClasses are no long TableGen'd. 2006-05-18 00:12:58 +00:00
AlphaRegisterInfo.td Constify some methods. Patch provided by Anton Vayvod, thanks! 2006-08-17 22:00:08 +00:00
AlphaRelocations.h Patches to make the LLVM sources more -pedantic clean. Patch provided 2006-05-24 17:04:05 +00:00
AlphaSchedule.td Alpha Scheduling classes 2006-03-09 17:16:45 +00:00
AlphaSubtarget.cpp Give full control of subtarget features over to table generated code. 2005-10-26 17:30:34 +00:00
AlphaSubtarget.h Alpha Scheduling classes 2006-03-09 17:16:45 +00:00
AlphaTargetAsmInfo.cpp Break out target asm info into separate files. 2006-09-07 22:05:02 +00:00
AlphaTargetAsmInfo.h Break out target asm info into separate files. 2006-09-07 22:05:02 +00:00
AlphaTargetMachine.cpp 1. Remove condition on delete. 2006-09-07 23:39:26 +00:00
AlphaTargetMachine.h 1. Remove condition on delete. 2006-09-07 23:39:26 +00:00
Makefile Autogen subtarget information from .td files. 2005-10-23 22:15:34 +00:00
README.txt ignore ordered/unordered for now 2006-06-04 00:25:51 +00:00

README.txt 

%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
Fix Ordered/Unordered FP stuff


%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
improve bytezap opertunities
ulong %foo(ulong %y) {
entry:
        %tmp = and ulong %y,  65535
        %tmp2 = shr ulong %tmp,  ubyte 3
        ret ulong %tmp2
}


compiles to a 3 instruction sequence without instcombine
        zapnot $16,3,$0
        srl $0,3,$0
        ret $31,($26),1
 
After instcombine you get
ulong %foo(ulong %y) {
entry:
        %tmp = shr ulong %y, ubyte 3            ; <ulong> [#uses=1]
        %tmp2 = and ulong %tmp, 8191            ; <ulong> [#uses=1]
        ret ulong %tmp2
}

which compiles to
        lda $0,8191($31)
        srl $16,3,$1
        and $1,$0,$0
        ret $31,($26),1