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InstrSched
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Changes to allow explicit physical register arguments that have been
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2003-05-31 07:37:05 +00:00 |
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InstrSelection
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Added MachineCodeForInstruction object as an argument to
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2003-05-31 07:41:24 +00:00 |
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LiveVar
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Renamed MachienOperand::opIsDef to MachineOperand::opIsDefOnly()
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2003-05-27 00:06:48 +00:00 |
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ModuloScheduling
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so far everything compiles
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2003-05-30 00:17:09 +00:00 |
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RegAlloc
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Minor changes.
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2003-05-31 07:41:54 +00:00 |
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.cvsignore
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Since there is now another derived .inc file, ignore them all.
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2003-05-29 20:15:27 +00:00 |
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EmitBytecodeToAssembly.cpp
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changed implementation of LLVM BYTECODE Length
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2002-07-25 17:22:48 +00:00 |
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MachineCodeForInstruction.h
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Move annotation to support library
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2003-01-14 21:29:58 +00:00 |
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MachineFunctionInfo.h
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State for frame and constant pool information pulled out of MachineFunction
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2002-12-28 20:07:33 +00:00 |
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MachineInstrAnnot.h
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Renamed a variable.
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2003-05-31 07:43:41 +00:00 |
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Makefile
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Make the .inc file depend on $(TBLGEN), so that changes to TableGen followed
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2003-06-01 04:52:51 +00:00 |
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MappingInfo.cpp
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MappingInfo.h
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SparcV9_F2.td
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* Broke up SparcV9.td into separate files as it was getting unmanageable
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2003-05-29 03:31:43 +00:00 |
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SparcV9_F3.td
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The 'rd' register is consistently mentioned last in instruction definitions.
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2003-05-31 06:25:19 +00:00 |
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SparcV9_F4.td
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* Broke up SparcV9.td into separate files as it was getting unmanageable
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2003-05-29 03:31:43 +00:00 |
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SparcV9_Reg.td
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* Broke up SparcV9.td into separate files as it was getting unmanageable
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2003-05-29 03:31:43 +00:00 |
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SparcV9.burg.in
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Add support for compiling varargs functions.
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2003-05-25 15:59:47 +00:00 |
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SparcV9.td
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* Put back into action SLL/SRL/SRA{r,i}6 instructions
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2003-05-31 06:24:29 +00:00 |
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SparcV9AsmPrinter.cpp
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Reverting previous beautification changes.
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2003-05-31 07:27:17 +00:00 |
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SparcV9CodeEmitter.cpp
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Merged in tools/lli/JIT/SparcEmitter.cpp, coupled with the JITResolver taken
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2003-06-02 04:12:39 +00:00 |
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SparcV9CodeEmitter.h
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Merged in tools/lli/JIT/SparcEmitter.cpp, coupled with the JITResolver taken
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2003-06-02 04:12:39 +00:00 |
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SparcV9Instr.def
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Made the register and immediate versions of instructions consecutive.
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2003-05-30 19:14:01 +00:00 |
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SparcV9InstrInfo.cpp
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Extensive changes to the way code generation occurs for function
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2003-05-31 07:32:01 +00:00 |
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SparcV9InstrSelection.cpp
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Extensive changes to the way code generation occurs for function
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2003-05-31 07:32:01 +00:00 |
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SparcV9InstrSelectionSupport.h
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Moved and expanded convertOpcodeFromRegToImm() to conver more opcodes.
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2003-05-30 20:11:56 +00:00 |
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SparcV9Internals.h
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Extensive changes to the way code generation occurs for function
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2003-05-31 07:32:01 +00:00 |
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SparcV9PeepholeOpts.cpp
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Cleaned up code layout; no functional changes.
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2003-05-23 19:20:57 +00:00 |
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SparcV9PreSelection.cpp
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Several bug fixes: globals in call operands were not being pulled out;
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2003-05-31 07:34:57 +00:00 |
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SparcV9PrologEpilogInserter.cpp
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Added 'r' or 'i' annotations to instructions, as SparcInstr.def has changed.
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2003-05-27 22:35:43 +00:00 |
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SparcV9RegClassInfo.cpp
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Fixed `volatile' typo.
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2003-05-21 19:34:28 +00:00 |
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SparcV9RegClassInfo.h
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Added special register class containing (for now) %fsr.
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2003-05-27 00:02:22 +00:00 |
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SparcV9RegInfo.cpp
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Add map info for arguments to call (copies)
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2003-06-01 02:48:23 +00:00 |
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SparcV9SchedInfo.cpp
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Added entries for each of the instructions with annotations ('r' or 'i').
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2003-05-27 22:33:39 +00:00 |
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SparcV9StackSlots.cpp
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Rename MachineInstrInfo -> TargetInstrInfo
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2003-01-14 22:00:31 +00:00 |
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SparcV9TargetMachine.cpp
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Enabling some of these passes causes lli to break
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2003-05-31 04:23:04 +00:00 |
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