Arnaud A. de Grandmaison 8ee1b65836 [PBQP] Cautiously update edge costs in the solver ... The NodeMetadata are maintained in an incremental way. When an edge between 2 nodes has its cost updated, in the course of graph reduction for example, the NodeMetadata need first to have the old edge cost removed, then the new edge cost added. Only once the NodeMetadata have been fully updated, it becomes safe to consider promoting the nodes to the ConservativelyAllocatable or OptimallyReducible sets. Previously, this promotion was occuring right after the removing the old cost, and this was breaking the assumption that a ConservativelyAllocatable should not be spilled. This patch also adds asserts to: - enforces the invariant that a node's reduction can not be downgraded, - only not provably allocatable or optimally reducible nodes can be spilled. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228816 91177308-0d34-0410-b5e6-96231b3b80d8		2015-02-11 08:25:36 +00:00
..
AsmParser	Fix some unnoticed/unwanted behavior change from r222319.	2015-02-04 03:10:03 +00:00
Disassembler	unique_ptrify the RelInfo parameter to TargetRegistry::createMCSymbolizer	2015-01-18 20:45:48 +00:00
InstPrinter
MCTargetDesc	Fix a problem where the AArch64 ELF assembler was failing with	2015-01-26 06:32:17 +00:00
TargetInfo
Utils
AArch64.h	[PM] Remove a bunch of stale TTI creation method declarations. I nuked	2015-02-01 00:22:15 +00:00
AArch64.td	Adding support to LLVM for targeting Cortex-A72	2015-02-04 13:31:29 +00:00
AArch64A53Fix835769.cpp	Clean up some uses of getSubtarget in AArch64.	2015-01-30 01:10:24 +00:00
AArch64A57FPLoadBalancing.cpp	[AArch64] Make AArch64A57FPLoadBalancing output stable.	2015-01-30 19:55:40 +00:00
AArch64AddressTypePromotion.cpp
AArch64AdvSIMDScalarPass.cpp	This only needs TargetInstrInfo, not the specialized one.	2015-01-30 01:10:18 +00:00
AArch64AsmPrinter.cpp	Migrate away from using a Subtarget except for the one place we want	2015-02-03 06:40:19 +00:00
AArch64BranchRelaxation.cpp	Migrate AArch64 except for TTI and AsmPrinter away from getSubtargetImpl.	2015-01-28 03:51:33 +00:00
AArch64CallingConvention.h	Move DataLayout back to the TargetMachine from TargetSubtargetInfo	2015-01-26 19:03:15 +00:00
AArch64CallingConvention.td	Move DataLayout back to the TargetMachine from TargetSubtargetInfo	2015-01-26 19:03:15 +00:00
AArch64CleanupLocalDynamicTLSPass.cpp	Clean up some uses of getSubtarget in AArch64.	2015-01-30 01:10:24 +00:00
AArch64CollectLOH.cpp	Clean up some uses of getSubtarget in AArch64.	2015-01-30 01:10:24 +00:00
AArch64ConditionalCompares.cpp	The subtarget is cached on the MachineFunction. Access it directly.	2015-01-27 07:31:29 +00:00
AArch64ConditionOptimizer.cpp	Migrate AArch64 except for TTI and AsmPrinter away from getSubtargetImpl.	2015-01-28 03:51:33 +00:00
AArch64DeadRegisterDefinitionsPass.cpp
AArch64ExpandPseudoInsts.cpp
AArch64FastISel.cpp	Clean up some uses of getSubtarget in AArch64.	2015-01-30 01:10:24 +00:00
AArch64FrameLowering.cpp	Move DataLayout back to the TargetMachine from TargetSubtargetInfo	2015-01-26 19:03:15 +00:00
AArch64FrameLowering.h
AArch64InstrAtomics.td
AArch64InstrFormats.td
AArch64InstrInfo.cpp	Migrate AArch64 except for TTI and AsmPrinter away from getSubtargetImpl.	2015-01-28 03:51:33 +00:00
AArch64InstrInfo.h	[cleanup] Re-sort all the #include lines in LLVM using	2015-01-14 11:23:27 +00:00
AArch64InstrInfo.td	[AArch64] Prefer DUP/MOV ("CPY") to INS for vector_extract.	2015-02-02 17:55:57 +00:00
AArch64ISelDAGToDAG.cpp	Avoid using the cast and use the templated accessor function.	2015-01-30 23:46:40 +00:00
AArch64ISelLowering.cpp	ARM & AArch64: teach LowerVSETCC that output type size may differ from input.	2015-02-08 00:50:47 +00:00
AArch64ISelLowering.h	Remove getSubtargetImpl from AArch64ISelLowering and cache the	2015-01-29 00:19:42 +00:00
AArch64LoadStoreOptimizer.cpp	Migrate AArch64 except for TTI and AsmPrinter away from getSubtargetImpl.	2015-01-28 03:51:33 +00:00
AArch64MachineCombinerPattern.h
AArch64MachineFunctionInfo.h
AArch64MCInstLower.cpp
AArch64MCInstLower.h
AArch64PBQPRegAlloc.cpp	[PBQP] Cautiously update edge costs in the solver	2015-02-11 08:25:36 +00:00
AArch64PBQPRegAlloc.h
AArch64PerfectShuffle.h
AArch64PromoteConstant.cpp	AArch64PromoteConstant: Modernize and resolve some Use<->User confusion.	2015-02-06 14:43:55 +00:00
AArch64RegisterInfo.cpp	AArch64: add backend option to reserve x18 (platform register)	2015-01-21 15:43:31 +00:00
AArch64RegisterInfo.h
AArch64RegisterInfo.td
AArch64SchedA53.td
AArch64SchedA57.td
AArch64SchedA57WriteRes.td
AArch64SchedCyclone.td
AArch64Schedule.td
AArch64SelectionDAGInfo.cpp
AArch64SelectionDAGInfo.h
AArch64StorePairSuppress.cpp	Clean up the AArch64 store pair suppression pass initialization	2015-01-27 07:54:36 +00:00
AArch64Subtarget.cpp	Remove getSubtargetImpl from AArch64ISelLowering and cache the	2015-01-29 00:19:42 +00:00
AArch64Subtarget.h	Move DataLayout back to the TargetMachine from TargetSubtargetInfo	2015-01-26 19:03:15 +00:00
AArch64TargetMachine.cpp	[multiversion] Switch all of the targets over to use the	2015-02-01 13:20:00 +00:00
AArch64TargetMachine.h	[multiversion] Switch all of the targets over to use the	2015-02-01 13:20:00 +00:00
AArch64TargetObjectFile.cpp
AArch64TargetObjectFile.h
AArch64TargetTransformInfo.cpp	[multiversion] Remove the function parameter from the unrolling	2015-02-01 14:31:23 +00:00
AArch64TargetTransformInfo.h	[multiversion] Remove the function parameter from the unrolling	2015-02-01 14:31:23 +00:00
CMakeLists.txt
LLVMBuild.txt
Makefile