Joe Abbey b78821d380 Patch by Gordon Keiser! ... If PC or SP is the destination, the disassembler erroneously failed with the invalid encoding, despite the manual saying that both are fine. This patch addresses failure to decode encoding T4 of LDR (A8.8.62) which is a postindexed load, where the offset 0xc is applied to SP after the load occurs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178017 91177308-0d34-0410-b5e6-96231b3b80d8		2013-03-26 13:58:53 +00:00
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AArch64
ARM
AsmParser
COFF
Disassembler	Patch by Gordon Keiser!	2013-03-26 13:58:53 +00:00
ELF
MachO
Markup
MBlaze
Mips	Fix the invalid opcode for Mips branch instructions in the assembler	2013-03-22 00:29:10 +00:00
PowerPC
X86	x86 -- add the XTEST instruction	2013-03-25 18:59:43 +00:00