6502
/
ossc
mirror of https://github.com/marqs85/ossc.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

fix clamp and ALC position

This commit is contained in:
marqs 2016-08-23 00:52:46 +03:00
parent 2dee0a2eb5
commit 9f7a30bea9
6 changed files with 845 additions and 840 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1618
software/sys_controller/mem_init/sys_onchip_memory2_0.hex
View File

File diff suppressed because it is too large Load Diff

17
software/sys_controller/ossc/av_controller.c
View File

@ -101,7 +101,7 @@ void set_lpf(alt_u8 lpf)
{
alt_u32 pclk;
pclk = (clkrate[REFCLK_EXT27]/cm.clkcnt)*video_modes[cm.id].h_total;
printf("PCLK: %luHz\n", pclk);
printf("PCLK_in: %luHz\n", pclk);
//Auto
if (lpf == 0) {
@ -327,8 +327,8 @@ void set_videoinfo()
// Configure TVP7002 and scan converter logic based on the video mode
void program_mode()
{
alt_u32 data1, data2;
alt_u32 h_hz, v_hz_x100;
alt_u8 h_syncinlen, v_syncinlen;
alt_u32 h_hz, v_hz_x100, h_synclen_px;
// Mark as stable (needed after sync up to avoid unnecessary mode switch)
stable_frames = STABLE_THOLD;
@ -344,9 +344,9 @@ void program_mode()
printf("\nLines: %u %c\n", (unsigned)cm.totlines, cm.progressive ? 'p' : 'i');
printf("Clocks per line: %u : HS %u.%.3u kHz VS %u.%.2u Hz\n", (unsigned)cm.clkcnt, (unsigned)(h_hz/1000), (unsigned)(h_hz%1000), (unsigned)(v_hz_x100/100), (unsigned)(v_hz_x100%100));
data1 = tvp_readreg(TVP_HSINWIDTH);
data2 = tvp_readreg(TVP_VSINWIDTH);
printf("Hswidth: %u Vswidth: %u Macrovision: %u\n", (unsigned)data1, (unsigned)(data2 & 0x1F), (unsigned)cm.macrovis);
h_syncinlen = tvp_readreg(TVP_HSINWIDTH);
v_syncinlen = tvp_readreg(TVP_VSINWIDTH);
printf("Hswidth: %u Vswidth: %u Macrovision: %u\n", (unsigned)h_syncinlen, (unsigned)(v_syncinlen & 0x1F), (unsigned)cm.macrovis);
sniprintf(row1, LCD_ROW_LEN+1, "%s %u%c", avinput_str[cm.avinput], (unsigned)cm.totlines, cm.progressive ? 'p' : 'i');
sniprintf(row2, LCD_ROW_LEN+1, "%u.%.2ukHz %u.%.2uHz", (unsigned)(h_hz/1000), (unsigned)((h_hz%1000)/10), (unsigned)(v_hz_x100/100), (unsigned)(v_hz_x100%100));
@ -363,10 +363,11 @@ void program_mode()
vm_sel = cm.id;
target_type = target_typemask & video_modes[cm.id].type;
h_synclen_px = ((alt_u32)h_syncinlen * (alt_u32)video_modes[cm.id].h_total) / cm.clkcnt;
printf("Mode %s selected\n", video_modes[cm.id].name);
printf("Mode %s selected - hsync width: %upx\n", video_modes[cm.id].name, (unsigned)h_synclen_px);
tvp_source_setup(cm.id, target_type, (cm.progressive ? cm.totlines : cm.totlines/2), v_hz_x100/100, cm.cc.pre_coast, cm.cc.post_coast, cm.cc.vsync_thold);
tvp_source_setup(cm.id, target_type, (cm.progressive ? cm.totlines : cm.totlines/2), v_hz_x100/100, (alt_u8)h_synclen_px, cm.cc.pre_coast, cm.cc.post_coast, cm.cc.vsync_thold);
set_lpf(cm.cc.video_lpf);
set_videoinfo();
}

12
software/sys_controller/ossc/menu.c
View File

@ -70,12 +70,12 @@ MENU(menu_advtiming, P99_PROTECT({ \
MENU(menu_vinputproc, P99_PROTECT({ \
{ "Video LPF", OPT_AVCONFIG_SELECTION, { .sel = { &tc.video_lpf, OPT_WRAP, SETTING_ITEM(video_lpf_desc) } } },
{ "YPbPr in ColSpa", OPT_AVCONFIG_SELECTION, { .sel = { &tc.ypbpr_cs, OPT_WRAP, SETTING_ITEM(ypbpr_cs_desc) } } },
{ "R. offset", OPT_AVCONFIG_NUMVALUE, { .num = { &tc.col.r_f_off, OPT_NOWRAP, 0, 0xFF, value_disp } } },
{ "G. offset", OPT_AVCONFIG_NUMVALUE, { .num = { &tc.col.g_f_off, OPT_NOWRAP, 0, 0xFF, value_disp } } },
{ "B. offset", OPT_AVCONFIG_NUMVALUE, { .num = { &tc.col.b_f_off, OPT_NOWRAP, 0, 0xFF, value_disp } } },
{ "R. gain", OPT_AVCONFIG_NUMVALUE, { .num = { &tc.col.r_f_gain, OPT_NOWRAP, 0, 0xFF, value_disp } } },
{ "G. gain", OPT_AVCONFIG_NUMVALUE, { .num = { &tc.col.g_f_gain, OPT_NOWRAP, 0, 0xFF, value_disp } } },
{ "B. gain", OPT_AVCONFIG_NUMVALUE, { .num = { &tc.col.b_f_gain, OPT_NOWRAP, 0, 0xFF, value_disp } } },
{ "R/Pr offset", OPT_AVCONFIG_NUMVALUE, { .num = { &tc.col.r_f_off, OPT_NOWRAP, 0, 0xFF, value_disp } } },
{ "G/Y offset", OPT_AVCONFIG_NUMVALUE, { .num = { &tc.col.g_f_off, OPT_NOWRAP, 0, 0xFF, value_disp } } },
{ "B/Pb offset", OPT_AVCONFIG_NUMVALUE, { .num = { &tc.col.b_f_off, OPT_NOWRAP, 0, 0xFF, value_disp } } },
{ "R/Pr gain", OPT_AVCONFIG_NUMVALUE, { .num = { &tc.col.r_f_gain, OPT_NOWRAP, 0, 0xFF, value_disp } } },
{ "G/Y gain", OPT_AVCONFIG_NUMVALUE, { .num = { &tc.col.g_f_gain, OPT_NOWRAP, 0, 0xFF, value_disp } } },
{ "B/Pb gain", OPT_AVCONFIG_NUMVALUE, { .num = { &tc.col.b_f_gain, OPT_NOWRAP, 0, 0xFF, value_disp } } },
}))
MENU(menu_sampling, P99_PROTECT({ \

28
software/sys_controller/tvp7002/tvp7002.c
View File

@ -57,22 +57,22 @@ static void tvp_set_clamp(video_format fmt)
}
}
static void tvp_set_clamp_position(video_type type)
static void tvp_set_clamp_position(video_type type, alt_u8 h_syncinlen)
{
switch (type) {
case VIDEO_LDTV:
tvp_writereg(TVP_CLAMPSTART, 0x2);
tvp_writereg(TVP_CLAMPSTART, h_syncinlen+0x2);
tvp_writereg(TVP_CLAMPWIDTH, 0x6);
break;
case VIDEO_HDTV:
tvp_writereg(TVP_CLAMPSTART, 0x32);
tvp_writereg(TVP_CLAMPSTART, h_syncinlen+0x32);
tvp_writereg(TVP_CLAMPWIDTH, 0x20);
break;
case VIDEO_SDTV:
case VIDEO_EDTV:
case VIDEO_PC:
default:
tvp_writereg(TVP_CLAMPSTART, 0x6);
tvp_writereg(TVP_CLAMPSTART, h_syncinlen+0x6);
tvp_writereg(TVP_CLAMPWIDTH, 0x10);
break;
}
@ -165,6 +165,10 @@ void tvp_init()
// Increase line length tolerance
tvp_writereg(TVP_LINELENTOL, 0x06);
// Use HSYNC leading edge as fine clamp reference
// Allows minimizing HSYNC window
//tvp_writereg(TVP_OUTFORMAT, 0x0C);
// Minimize HSYNC window for best sync stability
tvp_writereg(TVP_MVSWIDTH, 0x03);
@ -212,7 +216,7 @@ void tvp_setup_hpll(alt_u16 h_samplerate, alt_u16 v_lines, alt_u8 hz, alt_u8 pll
pclk_est = ((alt_u32)h_samplerate * v_lines * hz) / 1000; //in kHz
printf("Estimated PCLK: %lu.%.3lu MHz\n", pclk_est/1000, pclk_est%1000);
printf("Estimated PCLK_out: %lu.%.3lu MHz\n", pclk_est/1000, pclk_est%1000);
if (pclk_est < 36000) {
vco_range = 0;
@ -300,7 +304,7 @@ void tvp_set_sog_thold(alt_u8 val)
printf("SOG thold set to 0x%x\n", val);
}
void tvp_set_alc(alt_u8 en_alc, video_type type)
void tvp_set_alc(alt_u8 en_alc, video_type type, alt_u8 h_syncinlen)
{
if (en_alc) {
tvp_writereg(TVP_ALCEN, 0x80); //enable ALC
@ -308,16 +312,16 @@ void tvp_set_alc(alt_u8 en_alc, video_type type)
//select ALC placement
switch (type) {
case VIDEO_LDTV:
tvp_writereg(TVP_ALCPLACE, 0x9);
tvp_writereg(TVP_ALCPLACE, h_syncinlen+0x9);
break;
case VIDEO_HDTV:
tvp_writereg(TVP_ALCPLACE, 0x5A);
tvp_writereg(TVP_ALCPLACE, h_syncinlen+0x5A);
break;
case VIDEO_SDTV:
case VIDEO_EDTV:
case VIDEO_PC:
default:
tvp_writereg(TVP_ALCPLACE, 0x18);
tvp_writereg(TVP_ALCPLACE, h_syncinlen+0x18);
break;
}
} else {
@ -325,11 +329,11 @@ void tvp_set_alc(alt_u8 en_alc, video_type type)
}
}
void tvp_source_setup(alt_8 modeid, video_type type, alt_u32 vlines, alt_u8 hz, alt_u8 pre_coast, alt_u8 post_coast, alt_u8 vsync_thold)
void tvp_source_setup(alt_8 modeid, video_type type, alt_u32 vlines, alt_u8 hz, alt_u8 h_syncinlen, alt_u8 pre_coast, alt_u8 post_coast, alt_u8 vsync_thold)
{
// Clamp position and ALC
tvp_set_clamp_position(type);
tvp_set_alc(1, type);
tvp_set_clamp_position(type, h_syncinlen);
tvp_set_alc(1, type, h_syncinlen);
tvp_set_ssthold(vsync_thold);

4
software/sys_controller/tvp7002/tvp7002.h
View File

@ -100,9 +100,9 @@ void tvp_set_hpll_phase(alt_u8 val);
void tvp_set_sog_thold(alt_u8 val);
void tvp_set_alc(alt_u8 en_alc, video_type type);
void tvp_set_alc(alt_u8 en_alc, video_type type, alt_u8 h_syncinlen);
void tvp_source_setup(alt_8 modeid, video_type type, alt_u32 vlines, alt_u8 hz, alt_u8 pre_coast, alt_u8 post_coast, alt_u8 vsync_thold);
void tvp_source_setup(alt_8 modeid, video_type type, alt_u32 vlines, alt_u8 hz, alt_u8 h_syncinlen, alt_u8 pre_coast, alt_u8 post_coast, alt_u8 vsync_thold);
void tvp_source_sel(tvp_input_t input, video_format fmt);

6
software/sys_controller_bsp/settings.bsp
View File

@ -2,9 +2,9 @@
<sch:Settings xmlns:sch="http://www.altera.com/embeddedsw/bsp/schema">
<BspType>hal</BspType>
<BspVersion>default</BspVersion>
<BspGeneratedTimeStamp>Aug 18, 2016 11:17:40 PM</BspGeneratedTimeStamp>
<BspGeneratedUnixTimeStamp>1471551460381</BspGeneratedUnixTimeStamp>
<BspGeneratedLocation>./</BspGeneratedLocation>
<BspGeneratedTimeStamp>Aug 22, 2016 11:41:13 PM</BspGeneratedTimeStamp>
<BspGeneratedUnixTimeStamp>1471898473341</BspGeneratedUnixTimeStamp>
<BspGeneratedLocation>/home/markus/Code/ossc/software/sys_controller_bsp</BspGeneratedLocation>
<BspSettingsFile>settings.bsp</BspSettingsFile>
<SopcDesignFile>../../sys.sopcinfo</SopcDesignFile>
<JdiFile>default</JdiFile>