When describing the CPU's reset pin, the W65C02S data sheet says:
> All Registers are initialized by software except the Decimal and Interrupt
> disable mode select bits of the Processor Status Register (P) are initialized
> by hardware.
It then has a diagram of the power-on state of the processor status register:
> 7 6 5 4 3 2 1 0
> * * 1 1 0 1 * *
> N V - B D I Z C
>
> * = software initialized
Confusingly the text indicates that only the D and I flags are initialised by
hardware, while the diagram indicates that the B flag is initialised too.
Meanwhile, https://www.nesdev.org/wiki/CPU_power_up_state says that
the power-on state of the NES CPU is $34 (exactly matching the diagram above)
but https://www.nesdev.org/wiki/Status_flags#The_B_flag says that the B flag
does not physically exist within P register, it's only relevant in the copy
of P that gets pushed to the stack by BRK (set), PHP (set), or an interrupt
signal (cleared).
As a result, the most sensible power-on state for the processor status register
is with the "interrupt disable" flag set and everything else cleared.
This is something of a "Work in Progress" checkpoint of several features
that are all half baked:
1. Allow loading of 16KB ROM files at address $C000 at run-time, not
just at startup. See the "Load ROM..." File menu item.
2. Introduces the notion of "CPU Behaviors", so the core 6502 CPU
implementation can match the behavior of either an early NMOS 6502, late
NMOS 6502, or CMOS 65C02. Very little of this is actually implemented so
far.
3. Adds a completely bogus implementation of the 6522 VIA (it
does absolutely nothing right now).
4. Changes the address of the ACIA in the simulated system to match a
real hardware implementation I put together.
Bug Fixes:
- Fixed several bugs in the CPU that caused processor status flags to
be set incorrectly. Instructions affected were: STA, STX, STY, CMP,
CPX, CPY, BIT.
- Made some internal-use-only methods on the CPU class private.
- Fixed incorrect disassembly of (Indirect,X) and (Indirect),Y
instructions. Although this didn't affect behavior, it certainly
caused me some confusion in debugging.
- Added missing "BCS" instruction to instruction table.
Enhancements:
- Now includes a full version of Lee Davison's Enhanced 6502 BASIC
bundled as source code and a ROM image. Get that REAL COMPUTER
EXPERIENCE!(tm)
- If a file named "rom.bin" exists in the same directory where the
simulator is executed, it will be loaded at addresses $d000-$ffff.
- Gave the CPU an idle loop to make simulated timing a little more
realistic (but this is still an area needing major improvement)
- Changed the CPU's toString() method to give better debugging output.
- Added a small typeahead buffer to the Console.
- Better exception messaging.
Misc:
- Bumped version to 0.5, updated README.
