verilog-apple-one/.gitignore

mirror of https://github.com/alangarf/apple-one.git
*_Implmnt
*.xcf
*.log
synlog.tcl
*~
*.bak
*.swp
*_tb
*.vcd
build
Added basic ROM and fiddled things Clock now runs at 6MHz while I try to simplify things to figure out a CPU bug 2018-01-10 05:39:18 +00:00			`*_Implmnt`
			`*.xcf`
			`*.log`
Fixed issue with basic ROM 2018-01-11 14:01:34 +00:00			`synlog.tcl`
			`*~`
			`*.bak`
			`*.swp`
updated gitignore to ignore testbench files and vcds 2018-01-28 04:07:05 +00:00			`*_tb`
			`*.vcd`
Added yosys support again, yay for FOSS! 2018-01-29 06:45:01 +00:00			`build`