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https://github.com/alangarf/apple-one.git
synced 2024-06-13 02:29:31 +00:00
fixed dumb error with uart setup
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99fc3e6ef5
commit
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@ -9,8 +9,8 @@ set_io vga_h_sync B7
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set_io vga_v_sync A8
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set_io vga_v_sync A8
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## UART
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## UART
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set_io uart_tx B1
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set_io uart_rx B1
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set_io uart_rx C2
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set_io uart_tx C2
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## Lighthouse
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## Lighthouse
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set_io lt_dat H1
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set_io lt_dat H1
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@ -35,7 +35,6 @@ module apple1 #(
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// I/O interface to computer
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// I/O interface to computer
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input uart_rx, // asynchronous serial data input from computer
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input uart_rx, // asynchronous serial data input from computer
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output uart_tx, // asynchronous serial data output to computer
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output uart_tx, // asynchronous serial data output to computer
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output uart_cts, // clear to send flag to computer
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// I/O interface to keyboard
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// I/O interface to keyboard
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input ps2_clk, // PS/2 keyboard serial clock input
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input ps2_clk, // PS/2 keyboard serial clock input
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@ -177,7 +176,6 @@ module apple1 #(
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.uart_rx(uart_rx),
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.uart_rx(uart_rx),
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.uart_tx(uart_tx),
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.uart_tx(uart_tx),
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.uart_cts(uart_cts),
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.address(ab[1:0]), // for uart
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.address(ab[1:0]), // for uart
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.w_en(we & uart_cs),
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.w_en(we & uart_cs),
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@ -79,6 +79,7 @@ module apple1_top #(
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.D_OUT_0(lt_env_out)
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.D_OUT_0(lt_env_out)
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);
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);
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wire pc_monitor;
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// apple one main system
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// apple one main system
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apple1 #(
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apple1 #(
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@ -92,16 +93,15 @@ module apple1_top #(
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.rst_n(1'b1),
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.rst_n(1'b1),
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//.ps2_clk(),
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//.ps2_clk(),
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//.ps2_din(),
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//.ps2_din(),
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.ps2_select(1'b1),
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.ps2_select(1'b0),
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.uart_rx(uart_tx),
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.uart_rx(uart_rx),
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.uart_tx(uart_rx),
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.uart_tx(uart_tx),
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//.uart_cts(),
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.vga_h_sync(vga_h_sync),
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.vga_h_sync(vga_h_sync),
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.vga_v_sync(vga_v_sync),
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.vga_v_sync(vga_v_sync),
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.vga_red(vga_red),
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.vga_red(vga_red),
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.vga_grn(vga_grn),
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.vga_grn(vga_grn),
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.vga_blu(vga_blu)
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.vga_blu(vga_blu),
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//.pc_monitor(pc_monitor)
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.pc_monitor(pc_monitor)
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);
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);
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endmodule
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endmodule
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@ -32,8 +32,7 @@ module uart(
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output reg [7:0] dout, // 8-bit data bus (output)
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output reg [7:0] dout, // 8-bit data bus (output)
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input uart_rx, // asynchronous serial data input from computer
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input uart_rx, // asynchronous serial data input from computer
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output uart_tx, // asynchronous serial data output to computer
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output uart_tx // asynchronous serial data output to computer
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output uart_cts // clear to send flag to computer
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);
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);
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parameter ClkFrequency = 25000000; // 25MHz
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parameter ClkFrequency = 25000000; // 25MHz
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@ -91,8 +90,6 @@ module uart(
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end
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end
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end
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end
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assign uart_cts = ~rx_idle || uart_rx_status;
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localparam UART_RX = 2'b00;
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localparam UART_RX = 2'b00;
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localparam UART_RXCR = 2'b01;
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localparam UART_RXCR = 2'b01;
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localparam UART_TX = 2'b10;
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localparam UART_TX = 2'b10;
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