Apple-1-HW/verilog-apple-one
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9bf7d101cc
verilog-apple-one/rtl
History
Niels Moseley 9bf7d101cc Light maintenance.
2018-02-12 01:57:15 +01:00
..
boards Fixed paths on upduino build 2018-02-12 09:35:44 +11:00
cpu added license headers and tidied up 2018-01-29 22:15:21 +11:00
led_and_key move things around. 2018-01-27 00:21:05 +11:00
ps2keyboard Light maintenance. 2018-02-12 01:57:15 +01:00
uart Initial VGA working with the apple one output. YAY! 2018-01-31 00:48:47 +11:00
vga updated ROM paths to handle new board/buildenv structure 2018-02-12 08:26:57 +11:00
apple1.v Light maintenance. 2018-02-12 01:57:15 +01:00
clock.v VGA module works. Still no hardware scrolling though 2018-02-06 00:29:56 +11:00
pwr_reset.v added license headers and tidied up 2018-01-29 22:15:21 +11:00
ram.v updated ROM paths to handle new board/buildenv structure 2018-02-12 08:26:57 +11:00
rom_basic.v updated ROM paths to handle new board/buildenv structure 2018-02-12 08:26:57 +11:00
rom_wozmon.v updated ROM paths to handle new board/buildenv structure 2018-02-12 08:26:57 +11:00