idk
This commit is contained in:
Zane Kaminski
parent
fc2e875ac2
commit
d8a5dc069d
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@ -1,37 +0,0 @@
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GR8RAM/LibraryCard flash memory map
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-----------------------------
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FF FFFF | |
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.. .... | reserved (12 MB) |
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40 0000 | |
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-----------------------------
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3F FFFF | |
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.. .... | firmware 3 (1 MB) |
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30 0000 | |
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-----------------------------
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2F FFFF | |
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.. .... | firmware 2 (1 MB) |
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20 0000 | |
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-----------------------------
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1F FFFF | |
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.. .... | firmware 1 (1 MB) |
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10 0000 | |
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-----------------------------
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0F FFFF | |
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.. .... | firmware 0 (1 MB) |
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00 0000 | |
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-----------------------------
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Firmware area map (X == 0, 1, 2, or 3)
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-----------------------------
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XF FFFF | |
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.. .... | reserved (510 kB) |
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X8 0800 | |
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-----------------------------
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X8 07FF | |
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.. .... | IOSEL area (2 kB) |
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X8 0000 | |
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-----------------------------
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X7 FFFF | |
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.. .... | 256x IOSTRB area (512 kB) |
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X0 0000 | |
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-----------------------------
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@ -0,0 +1,38 @@
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GR8RAM flash memory map
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.... -----------------------------
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7FFF | |
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.... | firmware 3 (8 kB) |
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6000 | |
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-----------------------------
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5FFF | |
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.... | firmware 2 (8 kB) |
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4000 | |
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-----------------------------
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3FFF | |
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.... | firmware 1 (8 kB) |
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2000 | |
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-----------------------------
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1FFF | |
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.... | firmware 0 (8 kB) |
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0000 | |
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-----------------------------
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Firmware area map (N=$0000, $2000, $4000, $6000)
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-----------------------------
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N+1FFF | |
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.... | IOSTRB bank 1 (2 kB) |
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N+1800 | |
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-----------------------------
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N+17FF | |
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.... | IOSEL bank 1 (2 kB) |
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N+1000 | |
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-----------------------------
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N+0FFF | |
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.... | IOSTRB bank 0 (2 kB) |
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N+0800 | |
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-----------------------------
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N+07FF | |
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.... | IOSEL bank 0 (2 kB) |
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N+0000 | |
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-----------------------------
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@ -1,45 +0,0 @@
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Addr Slinky GR8RAM TimeMachine
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$0 RAddrL RAddrL RAddrL
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$1 RAddrM RAddrM RAddrM
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$2 RAddrH RAddrH RAddrH
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$3 RData RData RData
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$4 DMAAddrL
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$5 DMAAddrH
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$6
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$7
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$8
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$9
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$A
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$B
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$C
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$D Readin/out Readin/out
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$E Command Command
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$F Bank Bank Bank
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GR8RAM commands
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CmdNum Description Argument
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$00 SetReadinout RiNum/RoNum
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$EF CFGPrgmEN don't care
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$EE CFGEraseEN don't care
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GR8RAM Readin
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RiNum Description Data
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$10 SPI flash { MOSI(1), X(6), CS(1) }
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$11 SPI flash + clk pulse { MOSI(1), X(6), CS(1) }
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$13 CFG flash + clk pulse { CFGDin(1), X(7) }
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$20 Mode { RF/nSlinky(1), X(4), Size(3) }
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$21 RAddrHH { X(7), RAddr[24](1) }
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GR8RAM Readout
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RoNum Description
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$00 Magic $C1
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$01 Card ID $00
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$10 SPI flash { MISO(1), X(7) }
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$20 Mode { RF/nSlinky(1), X(4), Size(3) }
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TimeMachine commands
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$XX DMA into Apple RAM Length
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$XX DMA into Slinky RAM Length
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$XX DMA into Apple RAM Length-256
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$XX DMA into Slinky RAM Length-256
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@ -1,6 +0,0 @@
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GR8RAM Settings (not applicable to Library Card!)
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Settings[15] SetValid (1 = invalid, 0 = valid)
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Settings[14] SetFW (1 = RAMFactor, 0 = Slinky)
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Settings[13] SetLim8M
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Settings[12:0] Reserved
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@ -1,107 +0,0 @@
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UFM Load
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LState ARCLK ARShft DRCLK DRShft UFM
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--------------------------------------------------------------------------------
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$0000 0 1 0 0
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$0FBF 0 1 0 0
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...
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$0FC0 1 1 0 0
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$0FC1 1 1 0 0
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$0FC2 0 1 0 0
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$0FC3 0 1 0 0
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$0FC4 1 1 0 0
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$0FC5 1 1 0 0
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$0FC6 0 1 0 0
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$0FC7 0 1 0 0
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$0FC8 1 1 0 0
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$0FC9 1 1 0 0
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$0FCA 0 1 0 0
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$0FCB 0 1 0 0
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$0FCC 1 1 0 0
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$0FCD 1 1 0 0
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$0FCE 0 1 0 0
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$0FCF 0 1 0 0
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$0FD0 1 1 0 0
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$0FD1 1 1 0 0
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$0FD2 0 1 0 0
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$0FD3 0 1 0 0
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$0FD4 1 1 0 0
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$0FD5 1 1 0 0
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$0FD6 0 1 0 0
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$0FD7 0 1 0 0
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$0FD8 1 1 0 0
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$0FD9 1 1 0 0
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$0FDA 0 1 0 0
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$0FDB 0 1 0 0
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$0FDC 1 1 0 0
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$0FDD 1 1 0 0
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$0FDE 0 1 0 0
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$0FDF 0 1 0 0
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$0FE0 1 1 0 0
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$0FE1 1 1 0 0
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$0FE2 0 1 0 0
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$0FE3 0 1 0 0
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$0FE4 1 1 0 0
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$0FE5 1 1 0 0
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$0FE6 0 1 0 0
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$0FE7 0 1 0 0
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$0FE8 1 1 0 0
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$0FE9 1 1 0 0
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$0FEA 0 1 0 0
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$0FEB 0 1 0 0
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$0FEC 1 1 0 0
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$0FED 1 1 0 0
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$0FEE 0 1 0 0
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$0FEF 0 1 0 0
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$0FF0 1 1 0 0
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$0FF1 1 1 0 0
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$0FF2 0 1 0 0
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$0FF3 0 1 0 0
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$0FF4 1 1 0 0
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$0FF5 1 1 0 0
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$0FF6 0 1 0 0
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$0FF7 0 1 0 0
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$0FF8 1 1 0 0
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$0FF9 1 1 0 0
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$0FFA 0 1 0 0
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$0FFB 0 1 0 0
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$0FFC 1 1 0 0
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$0FFD 1 1 0 0
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$0FFE 0 1 0 0
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$0FFF 0 1 0 0
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$1000 0 0 1 0 parallel load into DR
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$1001 0 0 1 0
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$1002 0 0 0 1
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$1003 0 0 0 1
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$1004 0 0 1 1 SetLoaded <= Dout
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$1005 0 0 1 1
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$1006 0 0 0 1
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$1007 0 0 0 1
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$1008 0 0 1 1 latch DR[14] (SetFW)
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$1009 0 0 1 1
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$100A 0 0 0 1
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$100B 0 0 0 1
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$100C 1 0 0 1 latch DR[13] (SetLim8M)
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$100D 1 0 0 1
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$100E 0 0 0 0
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$100F 0 0 0 0
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...
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$1FF0 0 0 1 0 parallel load into DR
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$1FF1 0 0 1 0
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$1FF2 0 0 0 1
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$1FF3 0 0 0 1
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$1FF4 0 0 1 1 SetLoaded <= Dout
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$1FF5 0 0 1 1
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$1FF6 0 0 0 1
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$1FF7 0 0 0 1
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$1FF8 0 0 1 1 latch DR[14] (SetFW)
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$1FF9 0 0 1 1
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$1FFA 0 0 0 1
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$1FFB 0 0 0 1
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$1FFC 1 0 0 1 latch DR[13] (SetLim8M)
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$1FFD 1 0 0 1
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$1FFE 0 0 0 0
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$1FFF 0 0 0 0
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$2000 0 0 0 0 Everything 0, set SetLoaded
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@ -548,6 +548,31 @@ X 1 1 0 -100 100 U 50 50 1 1 I
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ENDDRAW
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ENDDEF
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#
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# Switch_SW_DIP_x02
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#
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DEF Switch_SW_DIP_x02 SW 0 0 Y N 1 F N
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F0 "SW" 0 250 50 H V C CNN
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F1 "Switch_SW_DIP_x02" 0 -150 50 H V C CNN
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F2 "" 0 0 50 H I C CNN
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F3 "" 0 0 50 H I C CNN
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$FPLIST
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SW?DIP?x2*
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$ENDFPLIST
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DRAW
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C -80 0 20 0 0 0 N
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C -80 100 20 0 0 0 N
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C 80 0 20 0 0 0 N
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C 80 100 20 0 0 0 N
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S -150 200 150 -100 0 1 10 f
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P 2 0 0 0 -60 5 93 46 N
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P 2 0 0 0 -60 105 93 146 N
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X ~ 1 -300 100 200 R 50 50 1 1 P
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X ~ 2 -300 0 200 R 50 50 1 1 P
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X ~ 3 300 0 200 L 50 50 1 1 P
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X ~ 4 300 100 200 L 50 50 1 1 P
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ENDDRAW
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ENDDEF
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#
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# power_+12V
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#
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DEF power_+12V #PWR 0 0 Y Y 1 F P
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21545
GR8RAM.kicad_pcb
21545
GR8RAM.kicad_pcb
File diff suppressed because it is too large
Load Diff
1641
GR8RAM.sch
1641
GR8RAM.sch
File diff suppressed because it is too large
Load Diff
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@ -0,0 +1,20 @@
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<?xml version="1.0" encoding="UTF-8"?>
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<pin_planner>
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<pin_info>
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<pin name="Ddor" source="Pin Planner" >
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</pin>
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<pin name="SDp1[" source="Pin Planner" >
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</pin>
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<pin name="sa[10[" source="Pin Planner" >
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</pin>
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<pin name="fw[0]" source="Pin Planner" >
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</pin>
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</pin_info>
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<buses>
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</buses>
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<group_file_association>
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</group_file_association>
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<pin_planner_file_specifies>
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</pin_planner_file_specifies>
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</pin_planner>
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@ -71,4 +71,75 @@ set_global_assignment -name SYNTHESIS_SEED 123
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set_global_assignment -name SEED 235
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set_global_assignment -name AUTO_PACKED_REGISTERS_MAXII "MINIMIZE AREA"
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set_global_assignment -name ROUTER_REGISTER_DUPLICATION OFF
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set_global_assignment -name VERILOG_FILE GR8RAM.v
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set_global_assignment -name VERILOG_FILE GR8RAM.v
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set_location_assignment PIN_1 -to RA[4]
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set_location_assignment PIN_2 -to RA[5]
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set_location_assignment PIN_3 -to RA[6]
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set_location_assignment PIN_4 -to RA[3]
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set_location_assignment PIN_5 -to nFCS
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set_location_assignment PIN_6 -to RA[7]
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set_location_assignment PIN_7 -to RA[8]
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set_location_assignment PIN_8 -to RA[9]
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set_location_assignment PIN_12 -to FCK
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set_location_assignment PIN_14 -to RA[10]
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set_location_assignment PIN_15 -to MOSI
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set_location_assignment PIN_16 -to MISO
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set_location_assignment PIN_17 -to Ddir
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set_location_assignment PIN_30 -to nRESout
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set_location_assignment PIN_34 -to RA[11]
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set_location_assignment PIN_35 -to RA[12]
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set_location_assignment PIN_36 -to RA[13]
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set_location_assignment PIN_37 -to RA[14]
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set_location_assignment PIN_38 -to RA[15]
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set_location_assignment PIN_39 -to nIOSEL
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set_location_assignment PIN_42 -to nIOSTRB
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set_location_assignment PIN_40 -to nDEVSEL
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set_location_assignment PIN_41 -to PHI0
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set_location_assignment PIN_43 -to nWE
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set_location_assignment PIN_44 -to nRES
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set_location_assignment PIN_47 -to SD[1]
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set_location_assignment PIN_50 -to SD[0]
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set_location_assignment PIN_51 -to SD[4]
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set_location_assignment PIN_100 -to RA[0]
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set_location_assignment PIN_99 -to RD[7]
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set_location_assignment PIN_52 -to SD[5]
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set_location_assignment PIN_54 -to SD[7]
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set_location_assignment PIN_55 -to SD[3]
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set_location_assignment PIN_56 -to SD[2]
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set_location_assignment PIN_53 -to SD[6]
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set_location_assignment PIN_57 -to DQMH
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set_location_assignment PIN_58 -to nSWE
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set_location_assignment PIN_62 -to nRAS
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set_location_assignment PIN_61 -to nCAS
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set_location_assignment PIN_64 -to C25M
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set_location_assignment PIN_66 -to RCKE
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set_location_assignment PIN_67 -to nRCS
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set_location_assignment PIN_68 -to SA[12]
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set_location_assignment PIN_69 -to SBA[0]
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set_location_assignment PIN_70 -to SA[11]
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set_location_assignment PIN_71 -to SBA[1]
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set_location_assignment PIN_72 -to SA[9]
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set_location_assignment PIN_73 -to SA[10]
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set_location_assignment PIN_74 -to SA[8]
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set_location_assignment PIN_75 -to SA[0]
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set_location_assignment PIN_76 -to SA[4]
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set_location_assignment PIN_77 -to SA[6]
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set_location_assignment PIN_78 -to SA[7]
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set_location_assignment PIN_81 -to SA[1]
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set_location_assignment PIN_82 -to SA[2]
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set_location_assignment PIN_83 -to SA[5]
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set_location_assignment PIN_84 -to SA[3]
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set_location_assignment PIN_85 -to DQML
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set_location_assignment PIN_86 -to RD[0]
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set_location_assignment PIN_87 -to RD[1]
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set_location_assignment PIN_88 -to RD[2]
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set_location_assignment PIN_89 -to RD[3]
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set_location_assignment PIN_90 -to RD[4]
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set_location_assignment PIN_91 -to RD[5]
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set_location_assignment PIN_92 -to RD[6]
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set_location_assignment PIN_97 -to RA[2]
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set_location_assignment PIN_98 -to RA[1]
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set_location_assignment PIN_96 -to SetFW[0]
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set_location_assignment PIN_95 -to SetFW[1]
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set_global_assignment -name IOBANK_VCCIO 3.3V -section_id 1
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set_global_assignment -name IOBANK_VCCIO 3.3V -section_id 2
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BIN
cpld/GR8RAM.qws
BIN
cpld/GR8RAM.qws
Binary file not shown.
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@ -1,6 +1,6 @@
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module GR8RAM(C25M, PHI0, nRES, nRESout,
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nIOSEL, nDEVSEL, nIOSTRB,
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SetRF, SetLim8M,
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SetFW,
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RA, nWE, RD, RDdir,
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SBA, SA, nRCS, nRAS, nCAS, nSWE, DQML, DQMH, RCKE, SD,
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nFCS, FCK, MISO, MOSI);
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@ -42,10 +42,11 @@ module GR8RAM(C25M, PHI0, nRES, nRESout,
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/* Apple select signals */
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wire ROMSpecSEL = RA[15:12]==4'hC && RA[11:8]!=4'h0;
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wire BankSpecSEL = RA[3:0]==4'hF;
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wire RAMSpecSEL = RA[15:12]==4'hC && RA[11:8]==4'h0 && RA[7] && RA[3:0]==4'h3 && REGEN;
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wire AddrHSpecSEL = RA[3:0]==4'h2;
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wire AddrMSpecSEL = RA[3:0]==4'h1;
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wire AddrLSpecSEL = RA[3:0]==4'h0;
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wire REGSpecSEL = RA[15:12]==4'hC && RA[11:8]==4'h0 && RA[7] && REGEN;
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wire RAMSpecSEL = REGSpecSEL && RA[3:0]==4'h3 && (~SetLim1M || Addr[23:20]==0) && (~SetLim8M || ~Addr[23]);
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wire AddrHSpecSEL = REGSpecSEL && RA[3:0]==4'h2;
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wire AddrMSpecSEL = REGSpecSEL && RA[3:0]==4'h1;
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wire AddrLSpecSEL = REGSpecSEL && RA[3:0]==4'h0;
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reg ROMSpecSELr, RAMSpecSELr, nWEr;
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wire BankSEL = REGEN && ~nDEVSEL && BankSpecSEL;
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wire RAMSEL = ~nDEVSEL && RAMSpecSELr;
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@ -53,12 +54,10 @@ module GR8RAM(C25M, PHI0, nRES, nRESout,
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wire AddrHSEL = REGEN && ~nDEVSEL && AddrHSpecSEL;
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wire AddrMSEL = REGEN && ~nDEVSEL && AddrMSpecSEL;
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wire AddrLSEL = REGEN && ~nDEVSEL && AddrLSpecSEL;
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always @(posedge C25M) begin
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if (PSStart) begin
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ROMSpecSELr <= ROMSpecSEL;
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RAMSpecSELr <= RAMSpecSEL;
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nWEr <= nWE;
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end
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always @(posedge PHI0) begin
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ROMSpecSELr <= ROMSpecSEL;
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RAMSpecSELr <= RAMSpecSEL;
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nWEr <= nWE;
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end
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/* IOROMEN and REGEN control */
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@ -174,7 +173,7 @@ module GR8RAM(C25M, PHI0, nRES, nRESout,
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FCK <= ~(IS==5);
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end
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endcase
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FCS <= IS==5 || IS==6;
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FCS <= IS==4 || IS==5 || IS==6;
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MOSIOE <= IS==5;
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end
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@ -183,16 +182,16 @@ module GR8RAM(C25M, PHI0, nRES, nRESout,
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1, 2: begin
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case (LS[2:0])
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3'h3: MOSIout <= 1'b0; // Command bit 7
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3'h4: MOSIout <= SetRF; // Address bit 23
|
||||
3'h4: MOSIout <= 1'b0; // Address bit 23
|
||||
3'h5: MOSIout <= 1'b0; // Address bit 15
|
||||
3'h6: MOSIout <= 1'b0; // Address bit 7
|
||||
default MOSIout <= 1'b0;
|
||||
endcase
|
||||
end 3, 4: begin
|
||||
case (LS[2:0])
|
||||
3'h3: MOSIout <= 1'b1; // Command bit 6
|
||||
3'h3: MOSIout <= 1'b0; // Command bit 6
|
||||
3'h4: MOSIout <= 1'b0; // Address bit 22
|
||||
3'h5: MOSIout <= 1'b0; // Address bit 14
|
||||
3'h5: MOSIout <= SetFW[1]; // Address bit 14
|
||||
3'h6: MOSIout <= 1'b0; // Address bit 6
|
||||
default MOSIout <= 1'b0;
|
||||
endcase
|
||||
|
|
@ -200,13 +199,13 @@ module GR8RAM(C25M, PHI0, nRES, nRESout,
|
|||
case (LS[2:0])
|
||||
3'h3: MOSIout <= 1'b1; // Command bit 5
|
||||
3'h4: MOSIout <= 1'b0; // Address bit 21
|
||||
3'h5: MOSIout <= 1'b0; // Address bit 13
|
||||
3'h5: MOSIout <= SetFW[0]; // Address bit 13
|
||||
3'h6: MOSIout <= 1'b0; // Address bit 5
|
||||
default MOSIout <= 1'b0;
|
||||
endcase
|
||||
end 7, 8: begin
|
||||
case (LS[2:0])
|
||||
3'h3: MOSIout <= 1'b0; // Command bit 4
|
||||
3'h3: MOSIout <= 1'b1; // Command bit 4
|
||||
3'h4: MOSIout <= 1'b0; // Address bit 20
|
||||
3'h5: MOSIout <= 1'b0; // Address bit 12
|
||||
3'h6: MOSIout <= 1'b0; // Address bit 4
|
||||
|
|
@ -248,8 +247,10 @@ module GR8RAM(C25M, PHI0, nRES, nRESout,
|
|||
endcase
|
||||
end
|
||||
|
||||
input SetRF;
|
||||
input SetLim8M;
|
||||
input [1:0] SetFW;
|
||||
wire SetRF = SetFW[1:0] != 2'b11;
|
||||
wire SetLim1M = SetFW[1];
|
||||
wire SetLim8M = SetFW[1:0] != 2'b00;
|
||||
|
||||
/* SDRAM data bus */
|
||||
inout [7:0] SD = SDOE ? WRD[7:0] : 8'bZ;
|
||||
|
|
@ -452,7 +453,7 @@ module GR8RAM(C25M, PHI0, nRES, nRESout,
|
|||
SBA[1:0] <= { 2'b10 };
|
||||
SA[12:0] <= { 10'b0011000100, LS[12:10] };
|
||||
end else if (RAMSpecSELr) begin
|
||||
SBA[1:0] <= { 1'b0, Addr[23] && SetLim8M && SetRF };
|
||||
SBA[1:0] <= { 1'b0, Addr[23] && SetRF };
|
||||
SA[12:0] <= { SetRF ? Addr [22:20] : 3'b000, Addr[19:10]};
|
||||
end else begin
|
||||
SBA[1:0] <= 2'b10;
|
||||
|
|
@ -460,7 +461,7 @@ module GR8RAM(C25M, PHI0, nRES, nRESout,
|
|||
end
|
||||
end 2: begin // RD
|
||||
if (RAMSpecSELr) begin
|
||||
SBA[1:0] <= { 1'b0, Addr[23] && SetLim8M && SetRF };
|
||||
SBA[1:0] <= { 1'b0, Addr[23] && SetRF };
|
||||
SA[12:0] <= { 4'b0011, Addr[9:1] };
|
||||
DQML <= Addr[0];
|
||||
DQMH <= ~Addr[0];
|
||||
|
|
|
|||
Binary file not shown.
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|
|
@ -1,6 +1,6 @@
|
|||
{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Quartus II" 0 -1 1616429543853 ""}
|
||||
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Assembler Quartus II 32-bit " "Running Quartus II 32-bit Assembler" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition " "Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition" { } { } 0 0 "%1!s!" 0 0 "Quartus II" 0 -1 1616429543868 ""} { "Info" "IQEXE_START_BANNER_TIME" "Mon Mar 22 12:12:23 2021 " "Processing started: Mon Mar 22 12:12:23 2021" { } { } 0 0 "Processing started: %1!s!" 0 0 "Quartus II" 0 -1 1616429543868 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "Assembler" 0 -1 1616429543868 ""}
|
||||
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_asm --read_settings_files=off --write_settings_files=off GR8RAM -c GR8RAM " "Command: quartus_asm --read_settings_files=off --write_settings_files=off GR8RAM -c GR8RAM" { } { } 0 0 "Command: %1!s!" 0 0 "Assembler" 0 -1 1616429543868 ""}
|
||||
{ "Info" "IASM_ASM_GENERATING_POWER_DATA" "" "Writing out detailed assembly data for power analysis" { } { } 0 115031 "Writing out detailed assembly data for power analysis" 0 0 "Assembler" 0 -1 1616429545103 ""}
|
||||
{ "Info" "IASM_ASM_GENERATING_PROGRAMMING_FILES" "" "Assembler is generating device programming files" { } { } 0 115030 "Assembler is generating device programming files" 0 0 "Assembler" 0 -1 1616429545134 ""}
|
||||
{ "Info" "IQEXE_ERROR_COUNT" "Assembler 0 s 0 s Quartus II 32-bit " "Quartus II 32-bit Assembler was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "293 " "Peak virtual memory: 293 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Quartus II" 0 -1 1616429545696 ""} { "Info" "IQEXE_END_BANNER_TIME" "Mon Mar 22 12:12:25 2021 " "Processing ended: Mon Mar 22 12:12:25 2021" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Quartus II" 0 -1 1616429545696 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:02 " "Elapsed time: 00:00:02" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Quartus II" 0 -1 1616429545696 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:02 " "Total CPU time (on all processors): 00:00:02" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Quartus II" 0 -1 1616429545696 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Assembler" 0 -1 1616429545696 ""}
|
||||
{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Quartus II" 0 -1 1618161759471 ""}
|
||||
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Assembler Quartus II 32-bit " "Running Quartus II 32-bit Assembler" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition " "Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition" { } { } 0 0 "%1!s!" 0 0 "Quartus II" 0 -1 1618161759502 ""} { "Info" "IQEXE_START_BANNER_TIME" "Sun Apr 11 13:22:38 2021 " "Processing started: Sun Apr 11 13:22:38 2021" { } { } 0 0 "Processing started: %1!s!" 0 0 "Quartus II" 0 -1 1618161759502 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "Assembler" 0 -1 1618161759502 ""}
|
||||
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_asm --read_settings_files=off --write_settings_files=off GR8RAM -c GR8RAM " "Command: quartus_asm --read_settings_files=off --write_settings_files=off GR8RAM -c GR8RAM" { } { } 0 0 "Command: %1!s!" 0 0 "Assembler" 0 -1 1618161759502 ""}
|
||||
{ "Info" "IASM_ASM_GENERATING_POWER_DATA" "" "Writing out detailed assembly data for power analysis" { } { } 0 115031 "Writing out detailed assembly data for power analysis" 0 0 "Assembler" 0 -1 1618161760940 ""}
|
||||
{ "Info" "IASM_ASM_GENERATING_PROGRAMMING_FILES" "" "Assembler is generating device programming files" { } { } 0 115030 "Assembler is generating device programming files" 0 0 "Assembler" 0 -1 1618161760971 ""}
|
||||
{ "Info" "IQEXE_ERROR_COUNT" "Assembler 0 s 0 s Quartus II 32-bit " "Quartus II 32-bit Assembler was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "293 " "Peak virtual memory: 293 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Quartus II" 0 -1 1618161761456 ""} { "Info" "IQEXE_END_BANNER_TIME" "Sun Apr 11 13:22:41 2021 " "Processing ended: Sun Apr 11 13:22:41 2021" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Quartus II" 0 -1 1618161761456 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:03 " "Elapsed time: 00:00:03" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Quartus II" 0 -1 1618161761456 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:03 " "Total CPU time (on all processors): 00:00:03" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Quartus II" 0 -1 1618161761456 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Assembler" 0 -1 1618161761456 ""}
|
||||
|
|
|
|||
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|
|
@ -1,3 +1,3 @@
|
|||
Quartus_Version = Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition
|
||||
Version_Index = 302049280
|
||||
Creation_Time = Mon Mar 22 01:13:17 2021
|
||||
Creation_Time = Sun Apr 11 00:06:29 2021
|
||||
|
|
|
|||
Binary file not shown.
File diff suppressed because one or more lines are too long
|
|
@ -76,9 +76,6 @@ C25M => Addr[22].CLK
|
|||
C25M => Addr[23].CLK
|
||||
C25M => REGEN.CLK
|
||||
C25M => IOROMEN.CLK
|
||||
C25M => nWEr.CLK
|
||||
C25M => RAMSpecSELr.CLK
|
||||
C25M => ROMSpecSELr.CLK
|
||||
C25M => nRESout~reg0.CLK
|
||||
C25M => LS[0].CLK
|
||||
C25M => LS[1].CLK
|
||||
|
|
@ -100,6 +97,9 @@ C25M => PHI0r2.CLK
|
|||
C25M => PHI0r1.CLK
|
||||
C25M => IS~7.DATAIN
|
||||
PHI0 => comb.IN1
|
||||
PHI0 => nWEr.CLK
|
||||
PHI0 => RAMSpecSELr.CLK
|
||||
PHI0 => ROMSpecSELr.CLK
|
||||
PHI0 => PHI0r1.DATAIN
|
||||
nRES => nRESr0.DATAIN
|
||||
nRESout <= nRESout~reg0.DB_MAX_OUTPUT_PORT_TYPE
|
||||
|
|
@ -110,61 +110,60 @@ nDEVSEL => RAMSEL.IN1
|
|||
nDEVSEL => comb.IN1
|
||||
nIOSTRB => comb.IN1
|
||||
nIOSTRB => always5.IN1
|
||||
SetRF => MOSIout.DATAB
|
||||
SetRF => always10.IN1
|
||||
SetRF => SA.OUTPUTSELECT
|
||||
SetRF => SA.OUTPUTSELECT
|
||||
SetRF => SA.OUTPUTSELECT
|
||||
SetRF => SBA.IN1
|
||||
SetRF => always10.IN1
|
||||
SetLim8M => SBA.IN1
|
||||
SetFW[0] => Mux1.IN10
|
||||
SetFW[0] => Equal18.IN1
|
||||
SetFW[0] => Equal19.IN1
|
||||
SetFW[1] => MOSIout.DATAB
|
||||
SetFW[1] => comb.IN1
|
||||
SetFW[1] => Equal18.IN0
|
||||
SetFW[1] => Equal19.IN0
|
||||
RA[0] => DQML.DATAA
|
||||
RA[0] => Equal6.IN3
|
||||
RA[0] => Equal9.IN1
|
||||
RA[0] => Equal10.IN3
|
||||
RA[0] => Equal11.IN0
|
||||
RA[0] => Equal12.IN3
|
||||
RA[0] => Equal13.IN10
|
||||
RA[0] => Equal11.IN3
|
||||
RA[0] => Equal12.IN0
|
||||
RA[0] => Equal13.IN3
|
||||
RA[0] => Equal14.IN10
|
||||
RA[0] => DQMH.DATAA
|
||||
RA[1] => SA.DATAA
|
||||
RA[1] => Equal6.IN2
|
||||
RA[1] => Equal9.IN0
|
||||
RA[1] => Equal10.IN0
|
||||
RA[1] => Equal11.IN3
|
||||
RA[1] => Equal12.IN2
|
||||
RA[1] => Equal13.IN9
|
||||
RA[1] => Equal11.IN0
|
||||
RA[1] => Equal12.IN3
|
||||
RA[1] => Equal13.IN2
|
||||
RA[1] => Equal14.IN9
|
||||
RA[2] => SA.DATAA
|
||||
RA[2] => Equal6.IN1
|
||||
RA[2] => Equal9.IN3
|
||||
RA[2] => Equal10.IN2
|
||||
RA[2] => Equal11.IN2
|
||||
RA[2] => Equal12.IN1
|
||||
RA[2] => Equal13.IN8
|
||||
RA[2] => Equal12.IN2
|
||||
RA[2] => Equal13.IN1
|
||||
RA[2] => Equal14.IN8
|
||||
RA[3] => SA.DATAA
|
||||
RA[3] => Equal6.IN0
|
||||
RA[3] => Equal9.IN2
|
||||
RA[3] => Equal10.IN1
|
||||
RA[3] => Equal11.IN1
|
||||
RA[3] => Equal12.IN0
|
||||
RA[3] => Equal13.IN7
|
||||
RA[3] => Equal12.IN1
|
||||
RA[3] => Equal13.IN0
|
||||
RA[3] => Equal14.IN7
|
||||
RA[4] => SA.DATAA
|
||||
RA[4] => Equal13.IN6
|
||||
RA[4] => Equal14.IN6
|
||||
RA[5] => SA.DATAA
|
||||
RA[5] => Equal13.IN5
|
||||
RA[5] => Equal14.IN5
|
||||
RA[6] => SA.DATAA
|
||||
RA[6] => Equal13.IN4
|
||||
RA[6] => Equal14.IN4
|
||||
RA[7] => comb.IN1
|
||||
RA[7] => SA.DATAA
|
||||
RA[7] => Equal13.IN3
|
||||
RA[7] => Equal14.IN3
|
||||
RA[8] => SA.DATAA
|
||||
RA[8] => Equal8.IN3
|
||||
RA[8] => Equal13.IN2
|
||||
RA[8] => Equal14.IN2
|
||||
RA[9] => SA.DATAA
|
||||
RA[9] => Equal8.IN2
|
||||
RA[9] => Equal13.IN1
|
||||
RA[9] => Equal14.IN1
|
||||
RA[10] => SA.DATAA
|
||||
RA[10] => Equal8.IN1
|
||||
RA[10] => Equal13.IN0
|
||||
RA[10] => Equal14.IN0
|
||||
RA[11] => SA.DATAA
|
||||
RA[11] => Equal8.IN0
|
||||
RA[12] => Equal7.IN3
|
||||
|
|
|
|||
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
|
|
@ -1,18 +1,18 @@
|
|||
{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Quartus II" 0 -1 1616429527039 ""}
|
||||
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II 32-bit " "Running Quartus II 32-bit Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition " "Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition" { } { } 0 0 "%1!s!" 0 0 "Quartus II" 0 -1 1616429527039 ""} { "Info" "IQEXE_START_BANNER_TIME" "Mon Mar 22 12:12:06 2021 " "Processing started: Mon Mar 22 12:12:06 2021" { } { } 0 0 "Processing started: %1!s!" 0 0 "Quartus II" 0 -1 1616429527039 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "Quartus II" 0 -1 1616429527039 ""}
|
||||
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off GR8RAM -c GR8RAM " "Command: quartus_map --read_settings_files=on --write_settings_files=off GR8RAM -c GR8RAM" { } { } 0 0 "Command: %1!s!" 0 0 "Quartus II" 0 -1 1616429527039 ""}
|
||||
{ "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS" "2 2 " "Parallel compilation is enabled and will use 2 of the 2 processors detected" { } { } 0 20030 "Parallel compilation is enabled and will use %1!i! of the %2!i! processors detected" 0 0 "Quartus II" 0 -1 1616429528633 ""}
|
||||
{ "Warning" "WVRFX_L3_VERI_XZ_EXTEND_SIGNIFICANT" "GR8RAM.v(80) " "Verilog HDL warning at GR8RAM.v(80): extended using \"x\" or \"z\"" { } { { "GR8RAM.v" "" { Text "Z:/Repos/GR8RAM/cpld/GR8RAM.v" 80 0 0 } } } 0 10273 "Verilog HDL warning at %1!s!: extended using \"x\" or \"z\"" 1 0 "Quartus II" 0 -1 1616429528805 ""}
|
||||
{ "Warning" "WVRFX_L3_VERI_XZ_EXTEND_SIGNIFICANT" "GR8RAM.v(255) " "Verilog HDL warning at GR8RAM.v(255): extended using \"x\" or \"z\"" { } { { "GR8RAM.v" "" { Text "Z:/Repos/GR8RAM/cpld/GR8RAM.v" 255 0 0 } } } 0 10273 "Verilog HDL warning at %1!s!: extended using \"x\" or \"z\"" 1 0 "Quartus II" 0 -1 1616429528805 ""}
|
||||
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "gr8ram.v 1 1 " "Found 1 design units, including 1 entities, in source file gr8ram.v" { { "Info" "ISGN_ENTITY_NAME" "1 GR8RAM " "Found entity 1: GR8RAM" { } { { "GR8RAM.v" "" { Text "Z:/Repos/GR8RAM/cpld/GR8RAM.v" 1 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1616429528805 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Quartus II" 0 -1 1616429528805 ""}
|
||||
{ "Info" "ISGN_START_ELABORATION_TOP" "GR8RAM " "Elaborating entity \"GR8RAM\" for the top level hierarchy" { } { } 0 12127 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0 "Quartus II" 0 -1 1616429528914 ""}
|
||||
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 14 GR8RAM.v(20) " "Verilog HDL assignment warning at GR8RAM.v(20): truncated value with size 32 to match size of target (14)" { } { { "GR8RAM.v" "" { Text "Z:/Repos/GR8RAM/cpld/GR8RAM.v" 20 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Quartus II" 0 -1 1616429528914 "|GR8RAM"}
|
||||
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 8 GR8RAM.v(104) " "Verilog HDL assignment warning at GR8RAM.v(104): truncated value with size 32 to match size of target (8)" { } { { "GR8RAM.v" "" { Text "Z:/Repos/GR8RAM/cpld/GR8RAM.v" 104 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Quartus II" 0 -1 1616429528914 "|GR8RAM"}
|
||||
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 8 GR8RAM.v(112) " "Verilog HDL assignment warning at GR8RAM.v(112): truncated value with size 32 to match size of target (8)" { } { { "GR8RAM.v" "" { Text "Z:/Repos/GR8RAM/cpld/GR8RAM.v" 112 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Quartus II" 0 -1 1616429528914 "|GR8RAM"}
|
||||
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 8 GR8RAM.v(119) " "Verilog HDL assignment warning at GR8RAM.v(119): truncated value with size 32 to match size of target (8)" { } { { "GR8RAM.v" "" { Text "Z:/Repos/GR8RAM/cpld/GR8RAM.v" 119 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Quartus II" 0 -1 1616429528914 "|GR8RAM"}
|
||||
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 4 GR8RAM.v(306) " "Verilog HDL assignment warning at GR8RAM.v(306): truncated value with size 32 to match size of target (4)" { } { { "GR8RAM.v" "" { Text "Z:/Repos/GR8RAM/cpld/GR8RAM.v" 306 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Quartus II" 0 -1 1616429528930 "|GR8RAM"}
|
||||
{ "Info" "ISCL_SCL_WYSIWYG_RESYNTHESIS" "0 area 0 " "Resynthesizing 0 WYSIWYG logic cells and I/Os using \"area\" technology mapper which leaves 0 WYSIWYG logic cells and I/Os untouched" { } { } 0 17026 "Resynthesizing %1!d! WYSIWYG logic cells and I/Os using \"%2!s!\" technology mapper which leaves %3!d! WYSIWYG logic cells and I/Os untouched" 0 0 "Quartus II" 0 -1 1616429530336 ""}
|
||||
{ "Info" "ISCL_SCL_LOST_FANOUT_MSG_HDR" "1 " "1 registers lost all their fanouts during netlist optimizations." { } { } 0 17049 "%1!d! registers lost all their fanouts during netlist optimizations." 0 0 "Quartus II" 0 -1 1616429531165 ""}
|
||||
{ "Info" "ICUT_CUT_TM_SUMMARY" "304 " "Implemented 304 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "26 " "Implemented 26 input pins" { } { } 0 21058 "Implemented %1!d! input pins" 0 0 "Quartus II" 0 -1 1616429531211 ""} { "Info" "ICUT_CUT_TM_OPINS" "26 " "Implemented 26 output pins" { } { } 0 21059 "Implemented %1!d! output pins" 0 0 "Quartus II" 0 -1 1616429531211 ""} { "Info" "ICUT_CUT_TM_BIDIRS" "17 " "Implemented 17 bidirectional pins" { } { } 0 21060 "Implemented %1!d! bidirectional pins" 0 0 "Quartus II" 0 -1 1616429531211 ""} { "Info" "ICUT_CUT_TM_LCELLS" "235 " "Implemented 235 logic cells" { } { } 0 21061 "Implemented %1!d! logic cells" 0 0 "Quartus II" 0 -1 1616429531211 ""} } { } 0 21057 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "Quartus II" 0 -1 1616429531211 ""}
|
||||
{ "Info" "IRDB_WROTE_SUPPRESSED_MSGS" "Z:/Repos/GR8RAM/cpld/output_files/GR8RAM.map.smsg " "Generated suppressed messages file Z:/Repos/GR8RAM/cpld/output_files/GR8RAM.map.smsg" { } { } 0 144001 "Generated suppressed messages file %1!s!" 0 0 "Quartus II" 0 -1 1616429531352 ""}
|
||||
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 5 s Quartus II 32-bit " "Quartus II 32-bit Analysis & Synthesis was successful. 0 errors, 5 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "301 " "Peak virtual memory: 301 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Quartus II" 0 -1 1616429531524 ""} { "Info" "IQEXE_END_BANNER_TIME" "Mon Mar 22 12:12:11 2021 " "Processing ended: Mon Mar 22 12:12:11 2021" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Quartus II" 0 -1 1616429531524 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:05 " "Elapsed time: 00:00:05" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Quartus II" 0 -1 1616429531524 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:05 " "Total CPU time (on all processors): 00:00:05" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Quartus II" 0 -1 1616429531524 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Quartus II" 0 -1 1616429531524 ""}
|
||||
{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Quartus II" 0 -1 1618161736158 ""}
|
||||
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II 32-bit " "Running Quartus II 32-bit Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition " "Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition" { } { } 0 0 "%1!s!" 0 0 "Quartus II" 0 -1 1618161736158 ""} { "Info" "IQEXE_START_BANNER_TIME" "Sun Apr 11 13:22:15 2021 " "Processing started: Sun Apr 11 13:22:15 2021" { } { } 0 0 "Processing started: %1!s!" 0 0 "Quartus II" 0 -1 1618161736158 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "Quartus II" 0 -1 1618161736158 ""}
|
||||
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off GR8RAM -c GR8RAM " "Command: quartus_map --read_settings_files=on --write_settings_files=off GR8RAM -c GR8RAM" { } { } 0 0 "Command: %1!s!" 0 0 "Quartus II" 0 -1 1618161736158 ""}
|
||||
{ "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS" "2 2 " "Parallel compilation is enabled and will use 2 of the 2 processors detected" { } { } 0 20030 "Parallel compilation is enabled and will use %1!i! of the %2!i! processors detected" 0 0 "Quartus II" 0 -1 1618161737908 ""}
|
||||
{ "Warning" "WVRFX_L3_VERI_XZ_EXTEND_SIGNIFICANT" "GR8RAM.v(79) " "Verilog HDL warning at GR8RAM.v(79): extended using \"x\" or \"z\"" { } { { "GR8RAM.v" "" { Text "Z:/Repos/GR8RAM/cpld/GR8RAM.v" 79 0 0 } } } 0 10273 "Verilog HDL warning at %1!s!: extended using \"x\" or \"z\"" 1 0 "Quartus II" 0 -1 1618161738205 ""}
|
||||
{ "Warning" "WVRFX_L3_VERI_XZ_EXTEND_SIGNIFICANT" "GR8RAM.v(256) " "Verilog HDL warning at GR8RAM.v(256): extended using \"x\" or \"z\"" { } { { "GR8RAM.v" "" { Text "Z:/Repos/GR8RAM/cpld/GR8RAM.v" 256 0 0 } } } 0 10273 "Verilog HDL warning at %1!s!: extended using \"x\" or \"z\"" 1 0 "Quartus II" 0 -1 1618161738205 ""}
|
||||
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "gr8ram.v 1 1 " "Found 1 design units, including 1 entities, in source file gr8ram.v" { { "Info" "ISGN_ENTITY_NAME" "1 GR8RAM " "Found entity 1: GR8RAM" { } { { "GR8RAM.v" "" { Text "Z:/Repos/GR8RAM/cpld/GR8RAM.v" 1 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1618161738205 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Quartus II" 0 -1 1618161738205 ""}
|
||||
{ "Info" "ISGN_START_ELABORATION_TOP" "GR8RAM " "Elaborating entity \"GR8RAM\" for the top level hierarchy" { } { } 0 12127 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0 "Quartus II" 0 -1 1618161738314 ""}
|
||||
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 14 GR8RAM.v(20) " "Verilog HDL assignment warning at GR8RAM.v(20): truncated value with size 32 to match size of target (14)" { } { { "GR8RAM.v" "" { Text "Z:/Repos/GR8RAM/cpld/GR8RAM.v" 20 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Quartus II" 0 -1 1618161738314 "|GR8RAM"}
|
||||
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 8 GR8RAM.v(103) " "Verilog HDL assignment warning at GR8RAM.v(103): truncated value with size 32 to match size of target (8)" { } { { "GR8RAM.v" "" { Text "Z:/Repos/GR8RAM/cpld/GR8RAM.v" 103 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Quartus II" 0 -1 1618161738314 "|GR8RAM"}
|
||||
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 8 GR8RAM.v(111) " "Verilog HDL assignment warning at GR8RAM.v(111): truncated value with size 32 to match size of target (8)" { } { { "GR8RAM.v" "" { Text "Z:/Repos/GR8RAM/cpld/GR8RAM.v" 111 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Quartus II" 0 -1 1618161738314 "|GR8RAM"}
|
||||
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 8 GR8RAM.v(118) " "Verilog HDL assignment warning at GR8RAM.v(118): truncated value with size 32 to match size of target (8)" { } { { "GR8RAM.v" "" { Text "Z:/Repos/GR8RAM/cpld/GR8RAM.v" 118 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Quartus II" 0 -1 1618161738314 "|GR8RAM"}
|
||||
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 4 GR8RAM.v(307) " "Verilog HDL assignment warning at GR8RAM.v(307): truncated value with size 32 to match size of target (4)" { } { { "GR8RAM.v" "" { Text "Z:/Repos/GR8RAM/cpld/GR8RAM.v" 307 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Quartus II" 0 -1 1618161738330 "|GR8RAM"}
|
||||
{ "Info" "ISCL_SCL_WYSIWYG_RESYNTHESIS" "0 area 0 " "Resynthesizing 0 WYSIWYG logic cells and I/Os using \"area\" technology mapper which leaves 0 WYSIWYG logic cells and I/Os untouched" { } { } 0 17026 "Resynthesizing %1!d! WYSIWYG logic cells and I/Os using \"%2!s!\" technology mapper which leaves %3!d! WYSIWYG logic cells and I/Os untouched" 0 0 "Quartus II" 0 -1 1618161740127 ""}
|
||||
{ "Info" "ISCL_SCL_LOST_FANOUT_MSG_HDR" "1 " "1 registers lost all their fanouts during netlist optimizations." { } { } 0 17049 "%1!d! registers lost all their fanouts during netlist optimizations." 0 0 "Quartus II" 0 -1 1618161740877 ""}
|
||||
{ "Info" "ICUT_CUT_TM_SUMMARY" "309 " "Implemented 309 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "26 " "Implemented 26 input pins" { } { } 0 21058 "Implemented %1!d! input pins" 0 0 "Quartus II" 0 -1 1618161740986 ""} { "Info" "ICUT_CUT_TM_OPINS" "26 " "Implemented 26 output pins" { } { } 0 21059 "Implemented %1!d! output pins" 0 0 "Quartus II" 0 -1 1618161740986 ""} { "Info" "ICUT_CUT_TM_BIDIRS" "17 " "Implemented 17 bidirectional pins" { } { } 0 21060 "Implemented %1!d! bidirectional pins" 0 0 "Quartus II" 0 -1 1618161740986 ""} { "Info" "ICUT_CUT_TM_LCELLS" "240 " "Implemented 240 logic cells" { } { } 0 21061 "Implemented %1!d! logic cells" 0 0 "Quartus II" 0 -1 1618161740986 ""} } { } 0 21057 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "Quartus II" 0 -1 1618161740986 ""}
|
||||
{ "Info" "IRDB_WROTE_SUPPRESSED_MSGS" "Z:/Repos/GR8RAM/cpld/output_files/GR8RAM.map.smsg " "Generated suppressed messages file Z:/Repos/GR8RAM/cpld/output_files/GR8RAM.map.smsg" { } { } 0 144001 "Generated suppressed messages file %1!s!" 0 0 "Quartus II" 0 -1 1618161741470 ""}
|
||||
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 5 s Quartus II 32-bit " "Quartus II 32-bit Analysis & Synthesis was successful. 0 errors, 5 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "301 " "Peak virtual memory: 301 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Quartus II" 0 -1 1618161741799 ""} { "Info" "IQEXE_END_BANNER_TIME" "Sun Apr 11 13:22:21 2021 " "Processing ended: Sun Apr 11 13:22:21 2021" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Quartus II" 0 -1 1618161741799 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:06 " "Elapsed time: 00:00:06" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Quartus II" 0 -1 1618161741799 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:06 " "Total CPU time (on all processors): 00:00:06" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Quartus II" 0 -1 1618161741799 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Quartus II" 0 -1 1618161741799 ""}
|
||||
|
|
|
|||
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|
|
@ -1,23 +1,23 @@
|
|||
{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Quartus II" 0 -1 1616429549056 ""}
|
||||
{ "Info" "IQEXE_START_BANNER_PRODUCT" "TimeQuest Timing Analyzer Quartus II 32-bit " "Running Quartus II 32-bit TimeQuest Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition " "Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition" { } { } 0 0 "%1!s!" 0 0 "Quartus II" 0 -1 1616429549071 ""} { "Info" "IQEXE_START_BANNER_TIME" "Mon Mar 22 12:12:27 2021 " "Processing started: Mon Mar 22 12:12:27 2021" { } { } 0 0 "Processing started: %1!s!" 0 0 "Quartus II" 0 -1 1616429549071 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "Quartus II" 0 -1 1616429549071 ""}
|
||||
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_sta GR8RAM -c GR8RAM " "Command: quartus_sta GR8RAM -c GR8RAM" { } { } 0 0 "Command: %1!s!" 0 0 "Quartus II" 0 -1 1616429549087 ""}
|
||||
{ "Info" "0" "" "qsta_default_script.tcl version: #1" { } { } 0 0 "qsta_default_script.tcl version: #1" 0 0 "Quartus II" 0 0 1616429549337 ""}
|
||||
{ "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS" "2 2 " "Parallel compilation is enabled and will use 2 of the 2 processors detected" { } { } 0 20030 "Parallel compilation is enabled and will use %1!i! of the %2!i! processors detected" 0 0 "Quartus II" 0 -1 1616429550197 ""}
|
||||
{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "Low junction temperature 0 degrees C " "Low junction temperature is 0 degrees C" { } { } 0 21077 "%1!s! is %2!s!" 0 0 "Quartus II" 0 -1 1616429550353 ""}
|
||||
{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "High junction temperature 85 degrees C " "High junction temperature is 85 degrees C" { } { } 0 21077 "%1!s! is %2!s!" 0 0 "Quartus II" 0 -1 1616429550353 ""}
|
||||
{ "Info" "IDAT_DAT_STARTED" "" "Started post-fitting delay annotation" { } { } 0 306004 "Started post-fitting delay annotation" 0 0 "Quartus II" 0 -1 1616429550525 ""}
|
||||
{ "Info" "IDAT_DAT_COMPLETED" "" "Delay annotation completed successfully" { } { } 0 306005 "Delay annotation completed successfully" 0 0 "Quartus II" 0 -1 1616429550962 ""}
|
||||
{ "Critical Warning" "WSTA_SDC_NOT_FOUND" "GR8RAM.sdc " "Synopsys Design Constraints File file not found: 'GR8RAM.sdc'. A Synopsys Design Constraints File is required by the TimeQuest Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design." { } { } 1 332012 "Synopsys Design Constraints File file not found: '%1!s!'. A Synopsys Design Constraints File is required by the TimeQuest Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design." 0 0 "Quartus II" 0 -1 1616429551103 ""}
|
||||
{ "Info" "ISTA_NO_CLOCK_FOUND_DERIVING" "base clocks \"derive_clocks -period 1.0\" " "No user constrained base clocks found in the design. Calling \"derive_clocks -period 1.0\"" { } { } 0 332142 "No user constrained %1!s! found in the design. Calling %2!s!" 0 0 "Quartus II" 0 -1 1616429551103 ""}
|
||||
{ "Info" "ISTA_DERIVE_CLOCKS_INFO" "Deriving Clocks " "Deriving Clocks" { { "Info" "ISTA_DERIVE_CLOCKS_INFO" "create_clock -period 1.000 -name C25M C25M " "create_clock -period 1.000 -name C25M C25M" { } { } 0 332105 "%1!s!" 0 0 "Quartus II" 0 -1 1616429551103 ""} } { } 0 332105 "%1!s!" 0 0 "Quartus II" 0 -1 1616429551103 ""}
|
||||
{ "Info" "0" "" "Found TIMEQUEST_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = ON" { } { } 0 0 "Found TIMEQUEST_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = ON" 0 0 "Quartus II" 0 0 1616429551118 ""}
|
||||
{ "Critical Warning" "WSTA_TIMING_NOT_MET" "" "Timing requirements not met" { } { } 1 332148 "Timing requirements not met" 0 0 "Quartus II" 0 -1 1616429551243 ""}
|
||||
{ "Info" "ISTA_WORST_CASE_SLACK" "setup -9.843 " "Worst-case setup slack is -9.843" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1616429551243 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= ============= ===================== " "========= ============= =====================" { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1616429551243 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -9.843 -651.483 C25M " " -9.843 -651.483 C25M " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1616429551243 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Quartus II" 0 -1 1616429551243 ""}
|
||||
{ "Info" "ISTA_WORST_CASE_SLACK" "hold 1.395 " "Worst-case hold slack is 1.395" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1616429551259 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= ============= ===================== " "========= ============= =====================" { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1616429551259 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 1.395 0.000 C25M " " 1.395 0.000 C25M " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1616429551259 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Quartus II" 0 -1 1616429551259 ""}
|
||||
{ "Info" "ISTA_WORST_CASE_SLACK" "recovery -4.404 " "Worst-case recovery slack is -4.404" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1616429551275 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= ============= ===================== " "========= ============= =====================" { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1616429551275 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -4.404 -132.120 C25M " " -4.404 -132.120 C25M " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1616429551275 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Quartus II" 0 -1 1616429551275 ""}
|
||||
{ "Info" "ISTA_WORST_CASE_SLACK" "removal 4.850 " "Worst-case removal slack is 4.850" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1616429551275 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= ============= ===================== " "========= ============= =====================" { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1616429551275 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 4.850 0.000 C25M " " 4.850 0.000 C25M " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1616429551275 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Quartus II" 0 -1 1616429551275 ""}
|
||||
{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width -2.289 " "Worst-case minimum pulse width slack is -2.289" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1616429551290 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= ============= ===================== " "========= ============= =====================" { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1616429551290 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -2.289 -2.289 C25M " " -2.289 -2.289 C25M " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1616429551290 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Quartus II" 0 -1 1616429551290 ""}
|
||||
{ "Info" "ISTA_METASTABILITY_REPORT_DISABLED" "" "The selected device family is not supported by the report_metastability command." { } { } 0 332001 "The selected device family is not supported by the report_metastability command." 0 0 "Quartus II" 0 -1 1616429551415 ""}
|
||||
{ "Info" "ISTA_UCP_NOT_CONSTRAINED" "setup " "Design is not fully constrained for setup requirements" { } { } 0 332102 "Design is not fully constrained for %1!s! requirements" 0 0 "Quartus II" 0 -1 1616429551525 ""}
|
||||
{ "Info" "ISTA_UCP_NOT_CONSTRAINED" "hold " "Design is not fully constrained for hold requirements" { } { } 0 332102 "Design is not fully constrained for %1!s! requirements" 0 0 "Quartus II" 0 -1 1616429551525 ""}
|
||||
{ "Info" "IQEXE_ERROR_COUNT" "TimeQuest Timing Analyzer 0 s 2 s Quartus II 32-bit " "Quartus II 32-bit TimeQuest Timing Analyzer was successful. 0 errors, 2 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "286 " "Peak virtual memory: 286 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Quartus II" 0 -1 1616429551712 ""} { "Info" "IQEXE_END_BANNER_TIME" "Mon Mar 22 12:12:31 2021 " "Processing ended: Mon Mar 22 12:12:31 2021" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Quartus II" 0 -1 1616429551712 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:04 " "Elapsed time: 00:00:04" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Quartus II" 0 -1 1616429551712 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:04 " "Total CPU time (on all processors): 00:00:04" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Quartus II" 0 -1 1616429551712 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Quartus II" 0 -1 1616429551712 ""}
|
||||
{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Quartus II" 0 -1 1618161764909 ""}
|
||||
{ "Info" "IQEXE_START_BANNER_PRODUCT" "TimeQuest Timing Analyzer Quartus II 32-bit " "Running Quartus II 32-bit TimeQuest Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition " "Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition" { } { } 0 0 "%1!s!" 0 0 "Quartus II" 0 -1 1618161764925 ""} { "Info" "IQEXE_START_BANNER_TIME" "Sun Apr 11 13:22:43 2021 " "Processing started: Sun Apr 11 13:22:43 2021" { } { } 0 0 "Processing started: %1!s!" 0 0 "Quartus II" 0 -1 1618161764925 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "Quartus II" 0 -1 1618161764925 ""}
|
||||
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_sta GR8RAM -c GR8RAM " "Command: quartus_sta GR8RAM -c GR8RAM" { } { } 0 0 "Command: %1!s!" 0 0 "Quartus II" 0 -1 1618161764925 ""}
|
||||
{ "Info" "0" "" "qsta_default_script.tcl version: #1" { } { } 0 0 "qsta_default_script.tcl version: #1" 0 0 "Quartus II" 0 0 1618161765159 ""}
|
||||
{ "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS" "2 2 " "Parallel compilation is enabled and will use 2 of the 2 processors detected" { } { } 0 20030 "Parallel compilation is enabled and will use %1!i! of the %2!i! processors detected" 0 0 "Quartus II" 0 -1 1618161765987 ""}
|
||||
{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "Low junction temperature 0 degrees C " "Low junction temperature is 0 degrees C" { } { } 0 21077 "%1!s! is %2!s!" 0 0 "Quartus II" 0 -1 1618161766175 ""}
|
||||
{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "High junction temperature 85 degrees C " "High junction temperature is 85 degrees C" { } { } 0 21077 "%1!s! is %2!s!" 0 0 "Quartus II" 0 -1 1618161766175 ""}
|
||||
{ "Info" "IDAT_DAT_STARTED" "" "Started post-fitting delay annotation" { } { } 0 306004 "Started post-fitting delay annotation" 0 0 "Quartus II" 0 -1 1618161766331 ""}
|
||||
{ "Info" "IDAT_DAT_COMPLETED" "" "Delay annotation completed successfully" { } { } 0 306005 "Delay annotation completed successfully" 0 0 "Quartus II" 0 -1 1618161766815 ""}
|
||||
{ "Critical Warning" "WSTA_SDC_NOT_FOUND" "GR8RAM.sdc " "Synopsys Design Constraints File file not found: 'GR8RAM.sdc'. A Synopsys Design Constraints File is required by the TimeQuest Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design." { } { } 1 332012 "Synopsys Design Constraints File file not found: '%1!s!'. A Synopsys Design Constraints File is required by the TimeQuest Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design." 0 0 "Quartus II" 0 -1 1618161767003 ""}
|
||||
{ "Info" "ISTA_NO_CLOCK_FOUND_DERIVING" "base clocks \"derive_clocks -period 1.0\" " "No user constrained base clocks found in the design. Calling \"derive_clocks -period 1.0\"" { } { } 0 332142 "No user constrained %1!s! found in the design. Calling %2!s!" 0 0 "Quartus II" 0 -1 1618161767003 ""}
|
||||
{ "Info" "ISTA_DERIVE_CLOCKS_INFO" "Deriving Clocks " "Deriving Clocks" { { "Info" "ISTA_DERIVE_CLOCKS_INFO" "create_clock -period 1.000 -name C25M C25M " "create_clock -period 1.000 -name C25M C25M" { } { } 0 332105 "%1!s!" 0 0 "Quartus II" 0 -1 1618161767018 ""} { "Info" "ISTA_DERIVE_CLOCKS_INFO" "create_clock -period 1.000 -name PHI0 PHI0 " "create_clock -period 1.000 -name PHI0 PHI0" { } { } 0 332105 "%1!s!" 0 0 "Quartus II" 0 -1 1618161767018 ""} } { } 0 332105 "%1!s!" 0 0 "Quartus II" 0 -1 1618161767018 ""}
|
||||
{ "Info" "0" "" "Found TIMEQUEST_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = ON" { } { } 0 0 "Found TIMEQUEST_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = ON" 0 0 "Quartus II" 0 0 1618161767050 ""}
|
||||
{ "Critical Warning" "WSTA_TIMING_NOT_MET" "" "Timing requirements not met" { } { } 1 332148 "Timing requirements not met" 0 0 "Quartus II" 0 -1 1618161767331 ""}
|
||||
{ "Info" "ISTA_WORST_CASE_SLACK" "setup -9.908 " "Worst-case setup slack is -9.908" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1618161767393 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= ============= ===================== " "========= ============= =====================" { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1618161767393 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -9.908 -697.920 C25M " " -9.908 -697.920 C25M " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1618161767393 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -1.302 -1.302 PHI0 " " -1.302 -1.302 PHI0 " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1618161767393 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Quartus II" 0 -1 1618161767393 ""}
|
||||
{ "Info" "ISTA_WORST_CASE_SLACK" "hold 1.012 " "Worst-case hold slack is 1.012" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1618161767409 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= ============= ===================== " "========= ============= =====================" { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1618161767409 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 1.012 0.000 PHI0 " " 1.012 0.000 PHI0 " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1618161767409 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 1.288 0.000 C25M " " 1.288 0.000 C25M " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1618161767409 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Quartus II" 0 -1 1618161767409 ""}
|
||||
{ "Info" "ISTA_WORST_CASE_SLACK" "recovery -4.389 " "Worst-case recovery slack is -4.389" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1618161767425 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= ============= ===================== " "========= ============= =====================" { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1618161767425 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -4.389 -131.670 C25M " " -4.389 -131.670 C25M " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1618161767425 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Quartus II" 0 -1 1618161767425 ""}
|
||||
{ "Info" "ISTA_WORST_CASE_SLACK" "removal 4.835 " "Worst-case removal slack is 4.835" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1618161767425 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= ============= ===================== " "========= ============= =====================" { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1618161767425 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 4.835 0.000 C25M " " 4.835 0.000 C25M " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1618161767425 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Quartus II" 0 -1 1618161767425 ""}
|
||||
{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width -2.289 " "Worst-case minimum pulse width slack is -2.289" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1618161767456 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= ============= ===================== " "========= ============= =====================" { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1618161767456 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -2.289 -2.289 C25M " " -2.289 -2.289 C25M " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1618161767456 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -2.289 -2.289 PHI0 " " -2.289 -2.289 PHI0 " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1618161767456 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Quartus II" 0 -1 1618161767456 ""}
|
||||
{ "Info" "ISTA_METASTABILITY_REPORT_DISABLED" "" "The selected device family is not supported by the report_metastability command." { } { } 0 332001 "The selected device family is not supported by the report_metastability command." 0 0 "Quartus II" 0 -1 1618161767706 ""}
|
||||
{ "Info" "ISTA_UCP_NOT_CONSTRAINED" "setup " "Design is not fully constrained for setup requirements" { } { } 0 332102 "Design is not fully constrained for %1!s! requirements" 0 0 "Quartus II" 0 -1 1618161767815 ""}
|
||||
{ "Info" "ISTA_UCP_NOT_CONSTRAINED" "hold " "Design is not fully constrained for hold requirements" { } { } 0 332102 "Design is not fully constrained for %1!s! requirements" 0 0 "Quartus II" 0 -1 1618161767815 ""}
|
||||
{ "Info" "IQEXE_ERROR_COUNT" "TimeQuest Timing Analyzer 0 s 2 s Quartus II 32-bit " "Quartus II 32-bit TimeQuest Timing Analyzer was successful. 0 errors, 2 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "278 " "Peak virtual memory: 278 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Quartus II" 0 -1 1618161768143 ""} { "Info" "IQEXE_END_BANNER_TIME" "Sun Apr 11 13:22:48 2021 " "Processing ended: Sun Apr 11 13:22:48 2021" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Quartus II" 0 -1 1618161768143 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:05 " "Elapsed time: 00:00:05" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Quartus II" 0 -1 1618161768143 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:05 " "Total CPU time (on all processors): 00:00:05" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Quartus II" 0 -1 1618161768143 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Quartus II" 0 -1 1618161768143 ""}
|
||||
|
|
|
|||
Binary file not shown.
Binary file not shown.
|
|
@ -1,6 +1,6 @@
|
|||
start_full_compilation:s:00:00:27
|
||||
start_full_compilation:s:00:00:32
|
||||
start_analysis_synthesis:s:00:00:07-start_full_compilation
|
||||
start_analysis_elaboration:s-start_full_compilation
|
||||
start_fitter:s:00:00:10-start_full_compilation
|
||||
start_assembler:s:00:00:04-start_full_compilation
|
||||
start_timing_analyzer:s:00:00:06-start_full_compilation
|
||||
start_fitter:s:00:00:12-start_full_compilation
|
||||
start_assembler:s:00:00:06-start_full_compilation
|
||||
start_timing_analyzer:s:00:00:07-start_full_compilation
|
||||
|
|
|
|||
Binary file not shown.
Binary file not shown.
File diff suppressed because one or more lines are too long
Binary file not shown.
|
|
@ -1,5 +1,5 @@
|
|||
Assembler report for GR8RAM
|
||||
Mon Mar 22 12:12:25 2021
|
||||
Sun Apr 11 13:22:41 2021
|
||||
Quartus II 32-bit Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition
|
||||
|
||||
|
||||
|
|
@ -37,7 +37,7 @@ applicable agreement for further details.
|
|||
+---------------------------------------------------------------+
|
||||
; Assembler Summary ;
|
||||
+-----------------------+---------------------------------------+
|
||||
; Assembler Status ; Successful - Mon Mar 22 12:12:25 2021 ;
|
||||
; Assembler Status ; Successful - Sun Apr 11 13:22:41 2021 ;
|
||||
; Revision Name ; GR8RAM ;
|
||||
; Top-level Entity Name ; GR8RAM ;
|
||||
; Family ; MAX II ;
|
||||
|
|
@ -90,8 +90,8 @@ applicable agreement for further details.
|
|||
; Option ; Setting ;
|
||||
+----------------+-------------------------------------------------------+
|
||||
; Device ; EPM240T100C5 ;
|
||||
; JTAG usercode ; 0x00166EAF ;
|
||||
; Checksum ; 0x0016711F ;
|
||||
; JTAG usercode ; 0x00162982 ;
|
||||
; Checksum ; 0x00162E02 ;
|
||||
+----------------+-------------------------------------------------------+
|
||||
|
||||
|
||||
|
|
@ -101,14 +101,14 @@ applicable agreement for further details.
|
|||
Info: *******************************************************************
|
||||
Info: Running Quartus II 32-bit Assembler
|
||||
Info: Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition
|
||||
Info: Processing started: Mon Mar 22 12:12:23 2021
|
||||
Info: Processing started: Sun Apr 11 13:22:38 2021
|
||||
Info: Command: quartus_asm --read_settings_files=off --write_settings_files=off GR8RAM -c GR8RAM
|
||||
Info (115031): Writing out detailed assembly data for power analysis
|
||||
Info (115030): Assembler is generating device programming files
|
||||
Info: Quartus II 32-bit Assembler was successful. 0 errors, 0 warnings
|
||||
Info: Peak virtual memory: 293 megabytes
|
||||
Info: Processing ended: Mon Mar 22 12:12:25 2021
|
||||
Info: Elapsed time: 00:00:02
|
||||
Info: Total CPU time (on all processors): 00:00:02
|
||||
Info: Processing ended: Sun Apr 11 13:22:41 2021
|
||||
Info: Elapsed time: 00:00:03
|
||||
Info: Total CPU time (on all processors): 00:00:03
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -1 +1 @@
|
|||
Mon Mar 22 12:12:32 2021
|
||||
Sun Apr 11 13:22:49 2021
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
|
|
@ -1,11 +1,11 @@
|
|||
Fitter Status : Successful - Mon Mar 22 12:12:21 2021
|
||||
Fitter Status : Successful - Sun Apr 11 13:22:34 2021
|
||||
Quartus II 32-bit Version : 13.0.1 Build 232 06/12/2013 SP 1 SJ Web Edition
|
||||
Revision Name : GR8RAM
|
||||
Top-level Entity Name : GR8RAM
|
||||
Family : MAX II
|
||||
Device : EPM240T100C5
|
||||
Timing Models : Final
|
||||
Total logic elements : 223 / 240 ( 93 % )
|
||||
Total logic elements : 227 / 240 ( 95 % )
|
||||
Total pins : 69 / 80 ( 86 % )
|
||||
Total virtual pins : 0
|
||||
UFM blocks : 0 / 1 ( 0 % )
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
Flow report for GR8RAM
|
||||
Mon Mar 22 12:12:31 2021
|
||||
Sun Apr 11 13:22:47 2021
|
||||
Quartus II 32-bit Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition
|
||||
|
||||
|
||||
|
|
@ -40,14 +40,14 @@ applicable agreement for further details.
|
|||
+-----------------------------------------------------------------------------+
|
||||
; Flow Summary ;
|
||||
+---------------------------+-------------------------------------------------+
|
||||
; Flow Status ; Successful - Mon Mar 22 12:12:25 2021 ;
|
||||
; Flow Status ; Successful - Sun Apr 11 13:22:41 2021 ;
|
||||
; Quartus II 32-bit Version ; 13.0.1 Build 232 06/12/2013 SP 1 SJ Web Edition ;
|
||||
; Revision Name ; GR8RAM ;
|
||||
; Top-level Entity Name ; GR8RAM ;
|
||||
; Family ; MAX II ;
|
||||
; Device ; EPM240T100C5 ;
|
||||
; Timing Models ; Final ;
|
||||
; Total logic elements ; 223 / 240 ( 93 % ) ;
|
||||
; Total logic elements ; 227 / 240 ( 95 % ) ;
|
||||
; Total pins ; 69 / 80 ( 86 % ) ;
|
||||
; Total virtual pins ; 0 ;
|
||||
; UFM blocks ; 0 / 1 ( 0 % ) ;
|
||||
|
|
@ -59,7 +59,7 @@ applicable agreement for further details.
|
|||
+-------------------+---------------------+
|
||||
; Option ; Setting ;
|
||||
+-------------------+---------------------+
|
||||
; Start date & time ; 03/22/2021 12:12:08 ;
|
||||
; Start date & time ; 04/11/2021 13:22:17 ;
|
||||
; Main task ; Compilation ;
|
||||
; Revision Name ; GR8RAM ;
|
||||
+-------------------+---------------------+
|
||||
|
|
@ -75,9 +75,11 @@ applicable agreement for further details.
|
|||
; ALM_REGISTER_PACKING_EFFORT ; High ; Medium ; -- ; -- ;
|
||||
; AUTO_PACKED_REGISTERS_MAXII ; Minimize Area ; Auto ; -- ; -- ;
|
||||
; AUTO_RESOURCE_SHARING ; On ; Off ; -- ; -- ;
|
||||
; COMPILER_SIGNATURE_ID ; 44085571633675.161642952802820 ; -- ; -- ; -- ;
|
||||
; COMPILER_SIGNATURE_ID ; 44085571633675.161816173700648 ; -- ; -- ; -- ;
|
||||
; FINAL_PLACEMENT_OPTIMIZATION ; Always ; Automatically ; -- ; -- ;
|
||||
; FITTER_EFFORT ; Standard Fit ; Auto Fit ; -- ; -- ;
|
||||
; IOBANK_VCCIO ; 3.3V ; -- ; -- ; 1 ;
|
||||
; IOBANK_VCCIO ; 3.3V ; -- ; -- ; 2 ;
|
||||
; MAXII_OPTIMIZATION_TECHNIQUE ; Area ; Balanced ; -- ; -- ;
|
||||
; MAX_CORE_JUNCTION_TEMP ; 85 ; -- ; -- ; -- ;
|
||||
; MIN_CORE_JUNCTION_TEMP ; 0 ; -- ; -- ; -- ;
|
||||
|
|
@ -100,11 +102,11 @@ applicable agreement for further details.
|
|||
+---------------------------+--------------+-------------------------+---------------------+------------------------------------+
|
||||
; Module Name ; Elapsed Time ; Average Processors Used ; Peak Virtual Memory ; Total CPU Time (on all processors) ;
|
||||
+---------------------------+--------------+-------------------------+---------------------+------------------------------------+
|
||||
; Analysis & Synthesis ; 00:00:05 ; 1.0 ; 301 MB ; 00:00:05 ;
|
||||
; Fitter ; 00:00:08 ; 1.5 ; 373 MB ; 00:00:08 ;
|
||||
; Assembler ; 00:00:02 ; 1.0 ; 292 MB ; 00:00:02 ;
|
||||
; TimeQuest Timing Analyzer ; 00:00:04 ; 1.0 ; 286 MB ; 00:00:04 ;
|
||||
; Total ; 00:00:19 ; -- ; -- ; 00:00:19 ;
|
||||
; Analysis & Synthesis ; 00:00:06 ; 1.0 ; 301 MB ; 00:00:06 ;
|
||||
; Fitter ; 00:00:10 ; 1.4 ; 382 MB ; 00:00:09 ;
|
||||
; Assembler ; 00:00:03 ; 1.0 ; 292 MB ; 00:00:03 ;
|
||||
; TimeQuest Timing Analyzer ; 00:00:04 ; 1.0 ; 278 MB ; 00:00:04 ;
|
||||
; Total ; 00:00:23 ; -- ; -- ; 00:00:22 ;
|
||||
+---------------------------+--------------+-------------------------+---------------------+------------------------------------+
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
<sld_project_info>
|
||||
<project>
|
||||
<hash md5_digest_80b="73ef203dd7199fdf781e"/>
|
||||
<hash md5_digest_80b="a474eff98051f7f4d66b"/>
|
||||
</project>
|
||||
<file_info>
|
||||
<file device="EPM240T100C5" path="GR8RAM.sof" usercode="0xFFFFFFFF"/>
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
Analysis & Synthesis report for GR8RAM
|
||||
Mon Mar 22 12:12:11 2021
|
||||
Sun Apr 11 13:22:21 2021
|
||||
Quartus II 32-bit Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition
|
||||
|
||||
|
||||
|
|
@ -45,12 +45,12 @@ applicable agreement for further details.
|
|||
+-------------------------------------------------------------------------------+
|
||||
; Analysis & Synthesis Summary ;
|
||||
+-----------------------------+-------------------------------------------------+
|
||||
; Analysis & Synthesis Status ; Successful - Mon Mar 22 12:12:11 2021 ;
|
||||
; Analysis & Synthesis Status ; Successful - Sun Apr 11 13:22:21 2021 ;
|
||||
; Quartus II 32-bit Version ; 13.0.1 Build 232 06/12/2013 SP 1 SJ Web Edition ;
|
||||
; Revision Name ; GR8RAM ;
|
||||
; Top-level Entity Name ; GR8RAM ;
|
||||
; Family ; MAX II ;
|
||||
; Total logic elements ; 235 ;
|
||||
; Total logic elements ; 240 ;
|
||||
; Total pins ; 69 ;
|
||||
; Total virtual pins ; 0 ;
|
||||
; UFM blocks ; 0 / 1 ( 0 % ) ;
|
||||
|
|
@ -161,20 +161,20 @@ applicable agreement for further details.
|
|||
+---------------------------------------------+-------+
|
||||
; Resource ; Usage ;
|
||||
+---------------------------------------------+-------+
|
||||
; Total logic elements ; 235 ;
|
||||
; -- Combinational with no register ; 133 ;
|
||||
; -- Register only ; 13 ;
|
||||
; -- Combinational with a register ; 89 ;
|
||||
; Total logic elements ; 240 ;
|
||||
; -- Combinational with no register ; 138 ;
|
||||
; -- Register only ; 14 ;
|
||||
; -- Combinational with a register ; 88 ;
|
||||
; ; ;
|
||||
; Logic element usage by number of LUT inputs ; ;
|
||||
; -- 4 input functions ; 122 ;
|
||||
; -- 3 input functions ; 36 ;
|
||||
; -- 2 input functions ; 64 ;
|
||||
; -- 4 input functions ; 130 ;
|
||||
; -- 3 input functions ; 30 ;
|
||||
; -- 2 input functions ; 66 ;
|
||||
; -- 1 input functions ; 0 ;
|
||||
; -- 0 input functions ; 0 ;
|
||||
; ; ;
|
||||
; Logic elements by mode ; ;
|
||||
; -- normal mode ; 202 ;
|
||||
; -- normal mode ; 207 ;
|
||||
; -- arithmetic mode ; 33 ;
|
||||
; -- qfbk mode ; 0 ;
|
||||
; -- register cascade mode ; 0 ;
|
||||
|
|
@ -185,9 +185,9 @@ applicable agreement for further details.
|
|||
; Total logic cells in carry chains ; 37 ;
|
||||
; I/O pins ; 69 ;
|
||||
; Maximum fan-out node ; C25M ;
|
||||
; Maximum fan-out ; 102 ;
|
||||
; Total fan-out ; 1020 ;
|
||||
; Average fan-out ; 3.36 ;
|
||||
; Maximum fan-out ; 99 ;
|
||||
; Total fan-out ; 1036 ;
|
||||
; Average fan-out ; 3.35 ;
|
||||
+---------------------------------------------+-------+
|
||||
|
||||
|
||||
|
|
@ -196,7 +196,7 @@ applicable agreement for further details.
|
|||
+----------------------------+-------------+--------------+------------+------+--------------+--------------+-------------------+------------------+-----------------+------------+---------------------+--------------+
|
||||
; Compilation Hierarchy Node ; Logic Cells ; LC Registers ; UFM Blocks ; Pins ; Virtual Pins ; LUT-Only LCs ; Register-Only LCs ; LUT/Register LCs ; Carry Chain LCs ; Packed LCs ; Full Hierarchy Name ; Library Name ;
|
||||
+----------------------------+-------------+--------------+------------+------+--------------+--------------+-------------------+------------------+-----------------+------------+---------------------+--------------+
|
||||
; |GR8RAM ; 235 (235) ; 102 ; 0 ; 69 ; 0 ; 133 (133) ; 13 (13) ; 89 (89) ; 37 (37) ; 0 (0) ; |GR8RAM ; work ;
|
||||
; |GR8RAM ; 240 (240) ; 102 ; 0 ; 69 ; 0 ; 138 (138) ; 14 (14) ; 88 (88) ; 37 (37) ; 0 (0) ; |GR8RAM ; work ;
|
||||
+----------------------------+-------------+--------------+------------+------+--------------+--------------+-------------------+------------------+-----------------+------------+---------------------+--------------+
|
||||
Note: For table entries with two numbers listed, the numbers in parentheses indicate the number of resources of the given type used by the specific entity alone. The numbers listed outside of parentheses indicate the total resources of the given type used by the specific entity and all of its sub-entities in the hierarchy.
|
||||
|
||||
|
|
@ -236,7 +236,7 @@ Encoding Type: Minimal Bits
|
|||
; Number of registers using Synchronous Load ; 25 ;
|
||||
; Number of registers using Asynchronous Clear ; 30 ;
|
||||
; Number of registers using Asynchronous Load ; 0 ;
|
||||
; Number of registers using Clock Enable ; 32 ;
|
||||
; Number of registers using Clock Enable ; 29 ;
|
||||
; Number of registers using Preset ; 0 ;
|
||||
+----------------------------------------------+-------+
|
||||
|
||||
|
|
@ -281,30 +281,30 @@ Encoding Type: Minimal Bits
|
|||
Info: *******************************************************************
|
||||
Info: Running Quartus II 32-bit Analysis & Synthesis
|
||||
Info: Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition
|
||||
Info: Processing started: Mon Mar 22 12:12:06 2021
|
||||
Info: Processing started: Sun Apr 11 13:22:15 2021
|
||||
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off GR8RAM -c GR8RAM
|
||||
Info (20030): Parallel compilation is enabled and will use 2 of the 2 processors detected
|
||||
Info (12021): Found 1 design units, including 1 entities, in source file gr8ram.v
|
||||
Info (12023): Found entity 1: GR8RAM
|
||||
Info (12127): Elaborating entity "GR8RAM" for the top level hierarchy
|
||||
Warning (10230): Verilog HDL assignment warning at GR8RAM.v(20): truncated value with size 32 to match size of target (14)
|
||||
Warning (10230): Verilog HDL assignment warning at GR8RAM.v(104): truncated value with size 32 to match size of target (8)
|
||||
Warning (10230): Verilog HDL assignment warning at GR8RAM.v(112): truncated value with size 32 to match size of target (8)
|
||||
Warning (10230): Verilog HDL assignment warning at GR8RAM.v(119): truncated value with size 32 to match size of target (8)
|
||||
Warning (10230): Verilog HDL assignment warning at GR8RAM.v(306): truncated value with size 32 to match size of target (4)
|
||||
Warning (10230): Verilog HDL assignment warning at GR8RAM.v(103): truncated value with size 32 to match size of target (8)
|
||||
Warning (10230): Verilog HDL assignment warning at GR8RAM.v(111): truncated value with size 32 to match size of target (8)
|
||||
Warning (10230): Verilog HDL assignment warning at GR8RAM.v(118): truncated value with size 32 to match size of target (8)
|
||||
Warning (10230): Verilog HDL assignment warning at GR8RAM.v(307): truncated value with size 32 to match size of target (4)
|
||||
Info (17026): Resynthesizing 0 WYSIWYG logic cells and I/Os using "area" technology mapper which leaves 0 WYSIWYG logic cells and I/Os untouched
|
||||
Info (17049): 1 registers lost all their fanouts during netlist optimizations.
|
||||
Info (21057): Implemented 304 device resources after synthesis - the final resource count might be different
|
||||
Info (21057): Implemented 309 device resources after synthesis - the final resource count might be different
|
||||
Info (21058): Implemented 26 input pins
|
||||
Info (21059): Implemented 26 output pins
|
||||
Info (21060): Implemented 17 bidirectional pins
|
||||
Info (21061): Implemented 235 logic cells
|
||||
Info (21061): Implemented 240 logic cells
|
||||
Info (144001): Generated suppressed messages file Z:/Repos/GR8RAM/cpld/output_files/GR8RAM.map.smsg
|
||||
Info: Quartus II 32-bit Analysis & Synthesis was successful. 0 errors, 5 warnings
|
||||
Info: Peak virtual memory: 301 megabytes
|
||||
Info: Processing ended: Mon Mar 22 12:12:11 2021
|
||||
Info: Elapsed time: 00:00:05
|
||||
Info: Total CPU time (on all processors): 00:00:05
|
||||
Info: Processing ended: Sun Apr 11 13:22:21 2021
|
||||
Info: Elapsed time: 00:00:06
|
||||
Info: Total CPU time (on all processors): 00:00:06
|
||||
|
||||
|
||||
+------------------------------------------+
|
||||
|
|
|
|||
|
|
@ -1,2 +1,2 @@
|
|||
Warning (10273): Verilog HDL warning at GR8RAM.v(80): extended using "x" or "z"
|
||||
Warning (10273): Verilog HDL warning at GR8RAM.v(255): extended using "x" or "z"
|
||||
Warning (10273): Verilog HDL warning at GR8RAM.v(79): extended using "x" or "z"
|
||||
Warning (10273): Verilog HDL warning at GR8RAM.v(256): extended using "x" or "z"
|
||||
|
|
|
|||
|
|
@ -1,9 +1,9 @@
|
|||
Analysis & Synthesis Status : Successful - Mon Mar 22 12:12:11 2021
|
||||
Analysis & Synthesis Status : Successful - Sun Apr 11 13:22:21 2021
|
||||
Quartus II 32-bit Version : 13.0.1 Build 232 06/12/2013 SP 1 SJ Web Edition
|
||||
Revision Name : GR8RAM
|
||||
Top-level Entity Name : GR8RAM
|
||||
Family : MAX II
|
||||
Total logic elements : 235
|
||||
Total logic elements : 240
|
||||
Total pins : 69
|
||||
Total virtual pins : 0
|
||||
UFM blocks : 0 / 1 ( 0 % )
|
||||
|
|
|
|||
|
|
@ -62,103 +62,103 @@ CHIP "GR8RAM" ASSIGNED TO AN: EPM240T100C5
|
|||
|
||||
Pin Name/Usage : Location : Dir. : I/O Standard : Voltage : I/O Bank : User Assignment
|
||||
-------------------------------------------------------------------------------------------------------------
|
||||
SBA[0] : 1 : output : 3.3-V LVTTL : : 2 : N
|
||||
nCAS : 2 : output : 3.3-V LVTTL : : 1 : N
|
||||
MOSI : 3 : bidir : 3.3-V LVTTL : : 1 : N
|
||||
nRAS : 4 : output : 3.3-V LVTTL : : 1 : N
|
||||
nRCS : 5 : output : 3.3-V LVTTL : : 1 : N
|
||||
nRES : 6 : input : 3.3-V LVTTL : : 1 : N
|
||||
RCKE : 7 : output : 3.3-V LVTTL : : 1 : N
|
||||
SetLim8M : 8 : input : 3.3-V LVTTL : : 1 : N
|
||||
RA[4] : 1 : input : 3.3-V LVTTL : : 2 : Y
|
||||
RA[5] : 2 : input : 3.3-V LVTTL : : 1 : Y
|
||||
RA[6] : 3 : input : 3.3-V LVTTL : : 1 : Y
|
||||
RA[3] : 4 : input : 3.3-V LVTTL : : 1 : Y
|
||||
nFCS : 5 : output : 3.3-V LVTTL : : 1 : Y
|
||||
RA[7] : 6 : input : 3.3-V LVTTL : : 1 : Y
|
||||
RA[8] : 7 : input : 3.3-V LVTTL : : 1 : Y
|
||||
RA[9] : 8 : input : 3.3-V LVTTL : : 1 : Y
|
||||
VCCIO1 : 9 : power : : 3.3V : 1 :
|
||||
GNDIO : 10 : gnd : : : :
|
||||
GNDINT : 11 : gnd : : : :
|
||||
nDEVSEL : 12 : input : 3.3-V LVTTL : : 1 : N
|
||||
FCK : 12 : output : 3.3-V LVTTL : : 1 : Y
|
||||
VCCINT : 13 : power : : 2.5V/3.3V : :
|
||||
C25M : 14 : input : 3.3-V LVTTL : : 1 : N
|
||||
SD[2] : 15 : bidir : 3.3-V LVTTL : : 1 : N
|
||||
RA[10] : 16 : input : 3.3-V LVTTL : : 1 : N
|
||||
SD[1] : 17 : bidir : 3.3-V LVTTL : : 1 : N
|
||||
RA[8] : 18 : input : 3.3-V LVTTL : : 1 : N
|
||||
RA[7] : 19 : input : 3.3-V LVTTL : : 1 : N
|
||||
RA[11] : 20 : input : 3.3-V LVTTL : : 1 : N
|
||||
RA[9] : 21 : input : 3.3-V LVTTL : : 1 : N
|
||||
RA[10] : 14 : input : 3.3-V LVTTL : : 1 : Y
|
||||
MOSI : 15 : bidir : 3.3-V LVTTL : : 1 : Y
|
||||
MISO : 16 : input : 3.3-V LVTTL : : 1 : Y
|
||||
RDdir : 17 : output : 3.3-V LVTTL : : 1 : N
|
||||
GND* : 18 : : : : 1 :
|
||||
GND* : 19 : : : : 1 :
|
||||
GND* : 20 : : : : 1 :
|
||||
GND* : 21 : : : : 1 :
|
||||
TMS : 22 : input : : : 1 :
|
||||
TDI : 23 : input : : : 1 :
|
||||
TCK : 24 : input : : : 1 :
|
||||
TDO : 25 : output : : : 1 :
|
||||
GND* : 26 : : : : 1 :
|
||||
nFCS : 27 : output : 3.3-V LVTTL : : 1 : N
|
||||
GND* : 27 : : : : 1 :
|
||||
GND* : 28 : : : : 1 :
|
||||
GND* : 29 : : : : 1 :
|
||||
SBA[1] : 30 : output : 3.3-V LVTTL : : 1 : N
|
||||
nRESout : 30 : output : 3.3-V LVTTL : : 1 : Y
|
||||
VCCIO1 : 31 : power : : 3.3V : 1 :
|
||||
GNDIO : 32 : gnd : : : :
|
||||
SD[3] : 33 : bidir : 3.3-V LVTTL : : 1 : N
|
||||
SD[0] : 34 : bidir : 3.3-V LVTTL : : 1 : N
|
||||
SA[2] : 35 : output : 3.3-V LVTTL : : 1 : N
|
||||
FCK : 36 : output : 3.3-V LVTTL : : 1 : N
|
||||
SA[1] : 37 : output : 3.3-V LVTTL : : 1 : N
|
||||
SA[0] : 38 : output : 3.3-V LVTTL : : 1 : N
|
||||
SA[5] : 39 : output : 3.3-V LVTTL : : 1 : N
|
||||
RA[6] : 40 : input : 3.3-V LVTTL : : 1 : N
|
||||
RA[4] : 41 : input : 3.3-V LVTTL : : 1 : N
|
||||
nIOSTRB : 42 : input : 3.3-V LVTTL : : 1 : N
|
||||
SA[3] : 43 : output : 3.3-V LVTTL : : 1 : N
|
||||
SA[6] : 44 : output : 3.3-V LVTTL : : 1 : N
|
||||
GND* : 33 : : : : 1 :
|
||||
RA[11] : 34 : input : 3.3-V LVTTL : : 1 : Y
|
||||
RA[12] : 35 : input : 3.3-V LVTTL : : 1 : Y
|
||||
RA[13] : 36 : input : 3.3-V LVTTL : : 1 : Y
|
||||
RA[14] : 37 : input : 3.3-V LVTTL : : 1 : Y
|
||||
RA[15] : 38 : input : 3.3-V LVTTL : : 1 : Y
|
||||
nIOSEL : 39 : input : 3.3-V LVTTL : : 1 : Y
|
||||
nDEVSEL : 40 : input : 3.3-V LVTTL : : 1 : Y
|
||||
PHI0 : 41 : input : 3.3-V LVTTL : : 1 : Y
|
||||
nIOSTRB : 42 : input : 3.3-V LVTTL : : 1 : Y
|
||||
nWE : 43 : input : 3.3-V LVTTL : : 1 : Y
|
||||
nRES : 44 : input : 3.3-V LVTTL : : 1 : Y
|
||||
VCCIO1 : 45 : power : : 3.3V : 1 :
|
||||
GNDIO : 46 : gnd : : : :
|
||||
GND* : 47 : : : : 1 :
|
||||
SA[7] : 48 : output : 3.3-V LVTTL : : 1 : N
|
||||
SD[1] : 47 : bidir : 3.3-V LVTTL : : 1 : Y
|
||||
GND* : 48 : : : : 1 :
|
||||
GND* : 49 : : : : 1 :
|
||||
GND* : 50 : : : : 1 :
|
||||
GND* : 51 : : : : 1 :
|
||||
RD[0] : 52 : bidir : 3.3-V LVTTL : : 2 : N
|
||||
RA[3] : 53 : input : 3.3-V LVTTL : : 2 : N
|
||||
RD[3] : 54 : bidir : 3.3-V LVTTL : : 2 : N
|
||||
RDdir : 55 : output : 3.3-V LVTTL : : 2 : N
|
||||
RA[2] : 56 : input : 3.3-V LVTTL : : 2 : N
|
||||
RD[2] : 57 : bidir : 3.3-V LVTTL : : 2 : N
|
||||
SA[8] : 58 : output : 3.3-V LVTTL : : 2 : N
|
||||
SD[0] : 50 : bidir : 3.3-V LVTTL : : 1 : Y
|
||||
SD[4] : 51 : bidir : 3.3-V LVTTL : : 1 : Y
|
||||
SD[5] : 52 : bidir : 3.3-V LVTTL : : 2 : Y
|
||||
SD[6] : 53 : bidir : 3.3-V LVTTL : : 2 : Y
|
||||
SD[7] : 54 : bidir : 3.3-V LVTTL : : 2 : Y
|
||||
SD[3] : 55 : bidir : 3.3-V LVTTL : : 2 : Y
|
||||
SD[2] : 56 : bidir : 3.3-V LVTTL : : 2 : Y
|
||||
DQMH : 57 : output : 3.3-V LVTTL : : 2 : Y
|
||||
nSWE : 58 : output : 3.3-V LVTTL : : 2 : Y
|
||||
VCCIO2 : 59 : power : : 3.3V : 2 :
|
||||
GNDIO : 60 : gnd : : : :
|
||||
RD[1] : 61 : bidir : 3.3-V LVTTL : : 2 : N
|
||||
RA[5] : 62 : input : 3.3-V LVTTL : : 2 : N
|
||||
nCAS : 61 : output : 3.3-V LVTTL : : 2 : Y
|
||||
nRAS : 62 : output : 3.3-V LVTTL : : 2 : Y
|
||||
VCCINT : 63 : power : : 2.5V/3.3V : :
|
||||
RA[1] : 64 : input : 3.3-V LVTTL : : 2 : N
|
||||
C25M : 64 : input : 3.3-V LVTTL : : 2 : Y
|
||||
GNDINT : 65 : gnd : : : :
|
||||
nIOSEL : 66 : input : 3.3-V LVTTL : : 2 : N
|
||||
RA[0] : 67 : input : 3.3-V LVTTL : : 2 : N
|
||||
SetRF : 68 : input : 3.3-V LVTTL : : 2 : N
|
||||
GND* : 69 : : : : 2 :
|
||||
SA[11] : 70 : output : 3.3-V LVTTL : : 2 : N
|
||||
SA[9] : 71 : output : 3.3-V LVTTL : : 2 : N
|
||||
RA[13] : 72 : input : 3.3-V LVTTL : : 2 : N
|
||||
RA[12] : 73 : input : 3.3-V LVTTL : : 2 : N
|
||||
RA[15] : 74 : input : 3.3-V LVTTL : : 2 : N
|
||||
RA[14] : 75 : input : 3.3-V LVTTL : : 2 : N
|
||||
SA[12] : 76 : output : 3.3-V LVTTL : : 2 : N
|
||||
GND* : 77 : : : : 2 :
|
||||
GND* : 78 : : : : 2 :
|
||||
RCKE : 66 : output : 3.3-V LVTTL : : 2 : Y
|
||||
nRCS : 67 : output : 3.3-V LVTTL : : 2 : Y
|
||||
SA[12] : 68 : output : 3.3-V LVTTL : : 2 : Y
|
||||
SBA[0] : 69 : output : 3.3-V LVTTL : : 2 : Y
|
||||
SA[11] : 70 : output : 3.3-V LVTTL : : 2 : Y
|
||||
SBA[1] : 71 : output : 3.3-V LVTTL : : 2 : Y
|
||||
SA[9] : 72 : output : 3.3-V LVTTL : : 2 : Y
|
||||
SA[10] : 73 : output : 3.3-V LVTTL : : 2 : Y
|
||||
SA[8] : 74 : output : 3.3-V LVTTL : : 2 : Y
|
||||
SA[0] : 75 : output : 3.3-V LVTTL : : 2 : Y
|
||||
SA[4] : 76 : output : 3.3-V LVTTL : : 2 : Y
|
||||
SA[6] : 77 : output : 3.3-V LVTTL : : 2 : Y
|
||||
SA[7] : 78 : output : 3.3-V LVTTL : : 2 : Y
|
||||
GNDIO : 79 : gnd : : : :
|
||||
VCCIO2 : 80 : power : : 3.3V : 2 :
|
||||
RD[5] : 81 : bidir : 3.3-V LVTTL : : 2 : N
|
||||
RD[6] : 82 : bidir : 3.3-V LVTTL : : 2 : N
|
||||
RD[7] : 83 : bidir : 3.3-V LVTTL : : 2 : N
|
||||
RD[4] : 84 : bidir : 3.3-V LVTTL : : 2 : N
|
||||
SA[10] : 85 : output : 3.3-V LVTTL : : 2 : N
|
||||
DQML : 86 : output : 3.3-V LVTTL : : 2 : N
|
||||
DQMH : 87 : output : 3.3-V LVTTL : : 2 : N
|
||||
PHI0 : 88 : input : 3.3-V LVTTL : : 2 : N
|
||||
nSWE : 89 : output : 3.3-V LVTTL : : 2 : N
|
||||
nWE : 90 : input : 3.3-V LVTTL : : 2 : N
|
||||
SA[4] : 91 : output : 3.3-V LVTTL : : 2 : N
|
||||
SD[5] : 92 : bidir : 3.3-V LVTTL : : 2 : N
|
||||
SA[1] : 81 : output : 3.3-V LVTTL : : 2 : Y
|
||||
SA[2] : 82 : output : 3.3-V LVTTL : : 2 : Y
|
||||
SA[5] : 83 : output : 3.3-V LVTTL : : 2 : Y
|
||||
SA[3] : 84 : output : 3.3-V LVTTL : : 2 : Y
|
||||
DQML : 85 : output : 3.3-V LVTTL : : 2 : Y
|
||||
RD[0] : 86 : bidir : 3.3-V LVTTL : : 2 : Y
|
||||
RD[1] : 87 : bidir : 3.3-V LVTTL : : 2 : Y
|
||||
RD[2] : 88 : bidir : 3.3-V LVTTL : : 2 : Y
|
||||
RD[3] : 89 : bidir : 3.3-V LVTTL : : 2 : Y
|
||||
RD[4] : 90 : bidir : 3.3-V LVTTL : : 2 : Y
|
||||
RD[5] : 91 : bidir : 3.3-V LVTTL : : 2 : Y
|
||||
RD[6] : 92 : bidir : 3.3-V LVTTL : : 2 : Y
|
||||
GNDIO : 93 : gnd : : : :
|
||||
VCCIO2 : 94 : power : : 3.3V : 2 :
|
||||
SD[6] : 95 : bidir : 3.3-V LVTTL : : 2 : N
|
||||
SD[4] : 96 : bidir : 3.3-V LVTTL : : 2 : N
|
||||
SD[7] : 97 : bidir : 3.3-V LVTTL : : 2 : N
|
||||
MISO : 98 : input : 3.3-V LVTTL : : 2 : N
|
||||
nRESout : 99 : output : 3.3-V LVTTL : : 2 : N
|
||||
GND* : 100 : : : : 2 :
|
||||
SetFW[1] : 95 : input : 3.3-V LVTTL : : 2 : Y
|
||||
SetFW[0] : 96 : input : 3.3-V LVTTL : : 2 : Y
|
||||
RA[2] : 97 : input : 3.3-V LVTTL : : 2 : Y
|
||||
RA[1] : 98 : input : 3.3-V LVTTL : : 2 : Y
|
||||
RD[7] : 99 : bidir : 3.3-V LVTTL : : 2 : Y
|
||||
RA[0] : 100 : input : 3.3-V LVTTL : : 2 : Y
|
||||
|
|
|
|||
Binary file not shown.
File diff suppressed because it is too large
Load Diff
|
|
@ -3,23 +3,35 @@ TimeQuest Timing Analyzer Summary
|
|||
------------------------------------------------------------
|
||||
|
||||
Type : Setup 'C25M'
|
||||
Slack : -9.843
|
||||
TNS : -651.483
|
||||
Slack : -9.908
|
||||
TNS : -697.920
|
||||
|
||||
Type : Setup 'PHI0'
|
||||
Slack : -1.302
|
||||
TNS : -1.302
|
||||
|
||||
Type : Hold 'PHI0'
|
||||
Slack : 1.012
|
||||
TNS : 0.000
|
||||
|
||||
Type : Hold 'C25M'
|
||||
Slack : 1.395
|
||||
Slack : 1.288
|
||||
TNS : 0.000
|
||||
|
||||
Type : Recovery 'C25M'
|
||||
Slack : -4.404
|
||||
TNS : -132.120
|
||||
Slack : -4.389
|
||||
TNS : -131.670
|
||||
|
||||
Type : Removal 'C25M'
|
||||
Slack : 4.850
|
||||
Slack : 4.835
|
||||
TNS : 0.000
|
||||
|
||||
Type : Minimum Pulse Width 'C25M'
|
||||
Slack : -2.289
|
||||
TNS : -2.289
|
||||
|
||||
Type : Minimum Pulse Width 'PHI0'
|
||||
Slack : -2.289
|
||||
TNS : -2.289
|
||||
|
||||
------------------------------------------------------------
|
||||
|
|
|
|||
|
|
@ -1,38 +1,21 @@
|
|||
Reference, Quantity, Value, Footprint, Datasheet, LCSC Part
|
||||
C38 C40 C41 ,3,"22n","stdpads:C_0603","~","C21122"
|
||||
C39 ,1,"1n","stdpads:C_0603","~","C1588"
|
||||
C8 C10 C11 C1 C7 C36 C37 C5 C6 C2 C3 C4 ,12,"10u","stdpads:C_0805","~","C15850"
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FB1 ,1,"GZ2012D101TF","stdpads:Murata_BLM21","~","C1015"
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C10 C1 C7 C2 C3 C4 C11 ,7,"10u","stdpads:C_0805","~","C15850"
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FID5 FID4 FID3 FID2 FID1 ,5,"Fiducial","stdpads:Fiducial","~"
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H1 ,1," ","stdpads:PasteHole_1.1mm_PTH","~"
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H6 H2 H3 H4 H5 ,5," ","stdpads:PasteHole_1.152mm_NPTH","~"
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J1 ,1,"AppleIIBus","stdpads:AppleIIBus_Edge","~"
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J3 ,1,"DC in","stdpads:BOOMELE_DC-005_DC_5.5-2.0MM","~"
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R9 ,1,"1k2","stdpads:R_0603","~","C22765"
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R22 R31 ,2,"33","stdpads:R_0603","~","C23140"
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R28 R29 ,2,"22k","stdpads:R_0603","~","C31850"
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RN5 ,1,"4x10k","stdpads:R4_0402","~","C25725"
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U1 ,1,"EPM240T100C5N","stdpads:TQFP-100_14x14mm_P0.5mm","https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/hb/max2/max2_mii5v1.pdf","C10041"
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U13 ,1,"25M","stdpads:Crystal_SMD_3225-4Pin_3.2x2.5mm","","C669088"
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|
||||
U7 U10 ,2,"LM393D","stdpads:SOIC-8_3.9mm","http://www.ti.com/lit/ds/symlink/lm393-n.pdf","C7955"
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U8 ,1,"XC6206P332MR","stdpads:SOT-23","","C5446"
|
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|
Can't render this file because it has a wrong number of fields in line 10.
|
16703
gerber/GR8RAM-B_Cu.gbl
16703
gerber/GR8RAM-B_Cu.gbl
File diff suppressed because it is too large
Load Diff
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@ -1,12 +1,12 @@
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G04 #@! TF.CreationDate,2021-04-11T00:58:13-04:00*
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|
||||
X64734578Y-118395422D01*
|
||||
X64786004Y-118318458D01*
|
||||
X64786005Y-118318456D01*
|
||||
X64851456Y-118253005D01*
|
||||
X64928419Y-118201580D01*
|
||||
X64928422Y-118201578D01*
|
||||
X65013933Y-118166158D01*
|
||||
X65074458Y-118154119D01*
|
||||
X65104719Y-118148100D01*
|
||||
X65197281Y-118148100D01*
|
||||
X65227542Y-118154119D01*
|
||||
X64018067Y-118166158D01*
|
||||
X64103578Y-118201578D01*
|
||||
X64103581Y-118201580D01*
|
||||
X64180544Y-118253005D01*
|
||||
X64245995Y-118318456D01*
|
||||
X64245996Y-118318458D01*
|
||||
X64297422Y-118395422D01*
|
||||
X64332842Y-118480933D01*
|
||||
X64332842Y-118480935D01*
|
||||
X64350900Y-118571719D01*
|
||||
X64350900Y-118664281D01*
|
||||
X64347475Y-118681500D01*
|
||||
X64332842Y-118755067D01*
|
||||
X64297422Y-118840578D01*
|
||||
X64297420Y-118840581D01*
|
||||
X64245995Y-118917544D01*
|
||||
X64180544Y-118982995D01*
|
||||
X64103581Y-119034420D01*
|
||||
X64103578Y-119034422D01*
|
||||
X64018067Y-119069842D01*
|
||||
X63957542Y-119081881D01*
|
||||
X63927281Y-119087900D01*
|
||||
X63834719Y-119087900D01*
|
||||
X63804458Y-119081881D01*
|
||||
X63743933Y-119069842D01*
|
||||
X63658422Y-119034422D01*
|
||||
X63658419Y-119034420D01*
|
||||
X63581456Y-118982995D01*
|
||||
X63516005Y-118917544D01*
|
||||
X63464580Y-118840581D01*
|
||||
X63464578Y-118840578D01*
|
||||
X63429158Y-118755067D01*
|
||||
X63414525Y-118681500D01*
|
||||
X63411100Y-118664281D01*
|
||||
X63411100Y-118571719D01*
|
||||
X63429158Y-118480935D01*
|
||||
X63429158Y-118480933D01*
|
||||
X63464578Y-118395422D01*
|
||||
X63516004Y-118318458D01*
|
||||
X63516005Y-118318456D01*
|
||||
X63581456Y-118253005D01*
|
||||
X63658419Y-118201580D01*
|
||||
X63658422Y-118201578D01*
|
||||
X63743933Y-118166158D01*
|
||||
X63804458Y-118154119D01*
|
||||
X63834719Y-118148100D01*
|
||||
X63927281Y-118148100D01*
|
||||
X63957542Y-118154119D01*
|
||||
G37*
|
||||
G36*
|
||||
X66497542Y-118154119D02*
|
||||
|
|
@ -1740,56 +1740,56 @@ X66467281Y-118148100D01*
|
|||
X66497542Y-118154119D01*
|
||||
G37*
|
||||
G36*
|
||||
X63957542Y-118154119D02*
|
||||
X65227542Y-118154119D02*
|
||||
G01*
|
||||
X64018067Y-118166158D01*
|
||||
X64103578Y-118201578D01*
|
||||
X64103581Y-118201580D01*
|
||||
X64180544Y-118253005D01*
|
||||
X64245995Y-118318456D01*
|
||||
X64245996Y-118318458D01*
|
||||
X64297422Y-118395422D01*
|
||||
X64332842Y-118480933D01*
|
||||
X64332842Y-118480935D01*
|
||||
X64350900Y-118571719D01*
|
||||
X64350900Y-118664281D01*
|
||||
X64347475Y-118681500D01*
|
||||
X64332842Y-118755067D01*
|
||||
X64297422Y-118840578D01*
|
||||
X64297420Y-118840581D01*
|
||||
X64245995Y-118917544D01*
|
||||
X64180544Y-118982995D01*
|
||||
X64103581Y-119034420D01*
|
||||
X64103578Y-119034422D01*
|
||||
X64018067Y-119069842D01*
|
||||
X63957542Y-119081881D01*
|
||||
X63927281Y-119087900D01*
|
||||
X63834719Y-119087900D01*
|
||||
X63804458Y-119081881D01*
|
||||
X63743933Y-119069842D01*
|
||||
X63658422Y-119034422D01*
|
||||
X63658419Y-119034420D01*
|
||||
X63581456Y-118982995D01*
|
||||
X63516005Y-118917544D01*
|
||||
X63464580Y-118840581D01*
|
||||
X63464578Y-118840578D01*
|
||||
X63429158Y-118755067D01*
|
||||
X63414525Y-118681500D01*
|
||||
X63411100Y-118664281D01*
|
||||
X63411100Y-118571719D01*
|
||||
X63429158Y-118480935D01*
|
||||
X63429158Y-118480933D01*
|
||||
X63464578Y-118395422D01*
|
||||
X63516004Y-118318458D01*
|
||||
X63516005Y-118318456D01*
|
||||
X63581456Y-118253005D01*
|
||||
X63658419Y-118201580D01*
|
||||
X63658422Y-118201578D01*
|
||||
X63743933Y-118166158D01*
|
||||
X63804458Y-118154119D01*
|
||||
X63834719Y-118148100D01*
|
||||
X63927281Y-118148100D01*
|
||||
X63957542Y-118154119D01*
|
||||
X65288067Y-118166158D01*
|
||||
X65373578Y-118201578D01*
|
||||
X65373581Y-118201580D01*
|
||||
X65450544Y-118253005D01*
|
||||
X65515995Y-118318456D01*
|
||||
X65515996Y-118318458D01*
|
||||
X65567422Y-118395422D01*
|
||||
X65602842Y-118480933D01*
|
||||
X65602842Y-118480935D01*
|
||||
X65620900Y-118571719D01*
|
||||
X65620900Y-118664281D01*
|
||||
X65617475Y-118681500D01*
|
||||
X65602842Y-118755067D01*
|
||||
X65567422Y-118840578D01*
|
||||
X65567420Y-118840581D01*
|
||||
X65515995Y-118917544D01*
|
||||
X65450544Y-118982995D01*
|
||||
X65373581Y-119034420D01*
|
||||
X65373578Y-119034422D01*
|
||||
X65288067Y-119069842D01*
|
||||
X65227542Y-119081881D01*
|
||||
X65197281Y-119087900D01*
|
||||
X65104719Y-119087900D01*
|
||||
X65074458Y-119081881D01*
|
||||
X65013933Y-119069842D01*
|
||||
X64928422Y-119034422D01*
|
||||
X64928419Y-119034420D01*
|
||||
X64851456Y-118982995D01*
|
||||
X64786005Y-118917544D01*
|
||||
X64734580Y-118840581D01*
|
||||
X64734578Y-118840578D01*
|
||||
X64699158Y-118755067D01*
|
||||
X64684525Y-118681500D01*
|
||||
X64681100Y-118664281D01*
|
||||
X64681100Y-118571719D01*
|
||||
X64699158Y-118480935D01*
|
||||
X64699158Y-118480933D01*
|
||||
X64734578Y-118395422D01*
|
||||
X64786004Y-118318458D01*
|
||||
X64786005Y-118318456D01*
|
||||
X64851456Y-118253005D01*
|
||||
X64928419Y-118201580D01*
|
||||
X64928422Y-118201578D01*
|
||||
X65013933Y-118166158D01*
|
||||
X65074458Y-118154119D01*
|
||||
X65104719Y-118148100D01*
|
||||
X65197281Y-118148100D01*
|
||||
X65227542Y-118154119D01*
|
||||
G37*
|
||||
G36*
|
||||
X62687542Y-118154119D02*
|
||||
|
|
@ -2344,46 +2344,6 @@ X64227562Y-99644200D01*
|
|||
X64263875Y-99651423D01*
|
||||
G37*
|
||||
G36*
|
||||
X61723875Y-97111423D02*
|
||||
G01*
|
||||
X61869133Y-97140316D01*
|
||||
X62040160Y-97211158D01*
|
||||
X62194086Y-97314008D01*
|
||||
X62324992Y-97444914D01*
|
||||
X62427842Y-97598840D01*
|
||||
X62498684Y-97769867D01*
|
||||
X62534800Y-97951439D01*
|
||||
X62534800Y-98136561D01*
|
||||
X62498684Y-98318133D01*
|
||||
X62427842Y-98489160D01*
|
||||
X62324992Y-98643086D01*
|
||||
X62194086Y-98773992D01*
|
||||
X62040160Y-98876842D01*
|
||||
X61869133Y-98947684D01*
|
||||
X61723875Y-98976577D01*
|
||||
X61687562Y-98983800D01*
|
||||
X61502438Y-98983800D01*
|
||||
X61466125Y-98976577D01*
|
||||
X61320867Y-98947684D01*
|
||||
X61149840Y-98876842D01*
|
||||
X60995914Y-98773992D01*
|
||||
X60865008Y-98643086D01*
|
||||
X60762158Y-98489160D01*
|
||||
X60691316Y-98318133D01*
|
||||
X60655200Y-98136561D01*
|
||||
X60655200Y-97951439D01*
|
||||
X60691316Y-97769867D01*
|
||||
X60762158Y-97598840D01*
|
||||
X60865008Y-97444914D01*
|
||||
X60995914Y-97314008D01*
|
||||
X61149840Y-97211158D01*
|
||||
X61320867Y-97140316D01*
|
||||
X61466125Y-97111423D01*
|
||||
X61502438Y-97104200D01*
|
||||
X61687562Y-97104200D01*
|
||||
X61723875Y-97111423D01*
|
||||
G37*
|
||||
G36*
|
||||
X64263875Y-97111423D02*
|
||||
G01*
|
||||
X64409133Y-97140316D01*
|
||||
|
|
@ -2424,6 +2384,46 @@ X64227562Y-97104200D01*
|
|||
X64263875Y-97111423D01*
|
||||
G37*
|
||||
G36*
|
||||
X61723875Y-97111423D02*
|
||||
G01*
|
||||
X61869133Y-97140316D01*
|
||||
X62040160Y-97211158D01*
|
||||
X62194086Y-97314008D01*
|
||||
X62324992Y-97444914D01*
|
||||
X62427842Y-97598840D01*
|
||||
X62498684Y-97769867D01*
|
||||
X62534800Y-97951439D01*
|
||||
X62534800Y-98136561D01*
|
||||
X62498684Y-98318133D01*
|
||||
X62427842Y-98489160D01*
|
||||
X62324992Y-98643086D01*
|
||||
X62194086Y-98773992D01*
|
||||
X62040160Y-98876842D01*
|
||||
X61869133Y-98947684D01*
|
||||
X61723875Y-98976577D01*
|
||||
X61687562Y-98983800D01*
|
||||
X61502438Y-98983800D01*
|
||||
X61466125Y-98976577D01*
|
||||
X61320867Y-98947684D01*
|
||||
X61149840Y-98876842D01*
|
||||
X60995914Y-98773992D01*
|
||||
X60865008Y-98643086D01*
|
||||
X60762158Y-98489160D01*
|
||||
X60691316Y-98318133D01*
|
||||
X60655200Y-98136561D01*
|
||||
X60655200Y-97951439D01*
|
||||
X60691316Y-97769867D01*
|
||||
X60762158Y-97598840D01*
|
||||
X60865008Y-97444914D01*
|
||||
X60995914Y-97314008D01*
|
||||
X61149840Y-97211158D01*
|
||||
X61320867Y-97140316D01*
|
||||
X61466125Y-97111423D01*
|
||||
X61502438Y-97104200D01*
|
||||
X61687562Y-97104200D01*
|
||||
X61723875Y-97111423D01*
|
||||
G37*
|
||||
G36*
|
||||
X48250933Y-95424274D02*
|
||||
G01*
|
||||
X48344185Y-95442823D01*
|
||||
|
|
@ -2478,52 +2478,6 @@ X48204308Y-95415000D01*
|
|||
X48250933Y-95424274D01*
|
||||
G37*
|
||||
G36*
|
||||
X108991368Y-84237925D02*
|
||||
G01*
|
||||
X109175382Y-84293745D01*
|
||||
X109344972Y-84384392D01*
|
||||
X109493617Y-84506383D01*
|
||||
X109615608Y-84655028D01*
|
||||
X109706255Y-84824617D01*
|
||||
X109762075Y-85008631D01*
|
||||
X109776200Y-85152046D01*
|
||||
X109776200Y-87847954D01*
|
||||
X109762075Y-87991369D01*
|
||||
X109706255Y-88175383D01*
|
||||
X109615608Y-88344972D01*
|
||||
X109493617Y-88493617D01*
|
||||
X109344972Y-88615608D01*
|
||||
X109175383Y-88706255D01*
|
||||
X108991369Y-88762075D01*
|
||||
X108800000Y-88780923D01*
|
||||
X108608632Y-88762075D01*
|
||||
X108424618Y-88706255D01*
|
||||
X108255029Y-88615608D01*
|
||||
X108106384Y-88493617D01*
|
||||
X107984393Y-88344972D01*
|
||||
X107893746Y-88175383D01*
|
||||
X107837926Y-87991369D01*
|
||||
X107823801Y-87847954D01*
|
||||
X107823800Y-85152047D01*
|
||||
X107837925Y-85008632D01*
|
||||
X107893745Y-84824618D01*
|
||||
X107984392Y-84655028D01*
|
||||
X108106383Y-84506383D01*
|
||||
X108255028Y-84384392D01*
|
||||
X108424617Y-84293745D01*
|
||||
X108608631Y-84237925D01*
|
||||
X108800000Y-84219077D01*
|
||||
X108991368Y-84237925D01*
|
||||
G37*
|
||||
G36*
|
||||
X103776200Y-88776200D02*
|
||||
G01*
|
||||
X101823800Y-88776200D01*
|
||||
X101823800Y-84223800D01*
|
||||
X103776200Y-84223800D01*
|
||||
X103776200Y-88776200D01*
|
||||
G37*
|
||||
G36*
|
||||
X57140933Y-83994274D02*
|
||||
G01*
|
||||
X57234185Y-84012823D01*
|
||||
|
|
@ -2539,7 +2493,7 @@ X57719177Y-84497815D01*
|
|||
X57747000Y-84637693D01*
|
||||
X57747000Y-84780307D01*
|
||||
X57719177Y-84920185D01*
|
||||
X57682539Y-85008635D01*
|
||||
X57664602Y-85051939D01*
|
||||
X57664600Y-85051943D01*
|
||||
X57585367Y-85170523D01*
|
||||
X57484523Y-85271367D01*
|
||||
|
|
@ -2558,7 +2512,7 @@ X56680057Y-85350600D01*
|
|||
X56561477Y-85271367D01*
|
||||
X56460633Y-85170523D01*
|
||||
X56381400Y-85051943D01*
|
||||
X56363461Y-85008635D01*
|
||||
X56381398Y-85051939D01*
|
||||
X56326823Y-84920185D01*
|
||||
X56299000Y-84780307D01*
|
||||
X56299000Y-84637693D01*
|
||||
|
|
@ -2631,42 +2585,4 @@ X140390692Y-81699000D01*
|
|||
X140533308Y-81699000D01*
|
||||
X140579933Y-81708274D01*
|
||||
G37*
|
||||
G36*
|
||||
X106791369Y-80737925D02*
|
||||
G01*
|
||||
X106975383Y-80793745D01*
|
||||
X107144972Y-80884392D01*
|
||||
X107293617Y-81006383D01*
|
||||
X107415608Y-81155028D01*
|
||||
X107506255Y-81324617D01*
|
||||
X107562075Y-81508631D01*
|
||||
X107580923Y-81700000D01*
|
||||
X107562075Y-81891369D01*
|
||||
X107506255Y-82075383D01*
|
||||
X107415608Y-82244972D01*
|
||||
X107293617Y-82393617D01*
|
||||
X107144972Y-82515608D01*
|
||||
X106975383Y-82606255D01*
|
||||
X106791369Y-82662075D01*
|
||||
X106647954Y-82676200D01*
|
||||
X103952046Y-82676200D01*
|
||||
X103808631Y-82662075D01*
|
||||
X103624617Y-82606255D01*
|
||||
X103455028Y-82515608D01*
|
||||
X103306383Y-82393617D01*
|
||||
X103184392Y-82244972D01*
|
||||
X103093745Y-82075383D01*
|
||||
X103037925Y-81891369D01*
|
||||
X103019077Y-81700000D01*
|
||||
X103037925Y-81508631D01*
|
||||
X103093745Y-81324617D01*
|
||||
X103184392Y-81155028D01*
|
||||
X103306383Y-81006383D01*
|
||||
X103455028Y-80884392D01*
|
||||
X103624617Y-80793745D01*
|
||||
X103808631Y-80737925D01*
|
||||
X103952046Y-80723800D01*
|
||||
X106647954Y-80723800D01*
|
||||
X106791369Y-80737925D01*
|
||||
G37*
|
||||
M02*
|
||||
|
|
|
|||
|
|
@ -1,12 +1,12 @@
|
|||
G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,(5.1.5-0-10_14)*
|
||||
G04 #@! TF.CreationDate,2021-02-17T19:07:14-05:00*
|
||||
G04 #@! TF.CreationDate,2021-04-11T00:58:12-04:00*
|
||||
G04 #@! TF.ProjectId,GR8RAM,47523852-414d-42e6-9b69-6361645f7063,0.9*
|
||||
G04 #@! TF.SameCoordinates,Original*
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G04 #@! TF.FileFunction,Legend,Bot*
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||||
G04 #@! TF.FilePolarity,Positive*
|
||||
%FSLAX46Y46*%
|
||||
G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
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||||
G04 Created by KiCad (PCBNEW (5.1.5-0-10_14)) date 2021-02-17 19:07:14*
|
||||
G04 Created by KiCad (PCBNEW (5.1.5-0-10_14)) date 2021-04-11 00:58:12*
|
||||
%MOMM*%
|
||||
%LPD*%
|
||||
G04 APERTURE LIST*
|
||||
|
|
@ -14,14 +14,11 @@ G04 APERTURE LIST*
|
|||
%ADD11C,0.100000*%
|
||||
%ADD12R,1.879600X1.879600*%
|
||||
%ADD13O,1.879600X1.879600*%
|
||||
%ADD14R,1.952400X4.552400*%
|
||||
%ADD15O,1.952400X4.552400*%
|
||||
%ADD16O,4.552400X1.952400*%
|
||||
%ADD17C,2.527300*%
|
||||
%ADD18C,0.939800*%
|
||||
%ADD19C,1.143000*%
|
||||
%ADD20C,2.152400*%
|
||||
%ADD21C,1.448000*%
|
||||
%ADD14C,2.527300*%
|
||||
%ADD15C,0.939800*%
|
||||
%ADD16C,1.143000*%
|
||||
%ADD17C,2.152400*%
|
||||
%ADD18C,1.448000*%
|
||||
G04 APERTURE END LIST*
|
||||
D10*
|
||||
X61341000Y-117983000D02*
|
||||
|
|
@ -53,17 +50,11 @@ X61595000Y-100584000D03*
|
|||
X64135000Y-98044000D03*
|
||||
X61595000Y-98044000D03*
|
||||
D14*
|
||||
X102800000Y-86500000D03*
|
||||
D15*
|
||||
X108800000Y-86500000D03*
|
||||
D16*
|
||||
X105300000Y-81700000D03*
|
||||
D17*
|
||||
X65786000Y-121793000D03*
|
||||
X65786000Y-116713000D03*
|
||||
X60071000Y-116713000D03*
|
||||
X60071000Y-121793000D03*
|
||||
D18*
|
||||
D15*
|
||||
X61341000Y-119888000D03*
|
||||
X62611000Y-119888000D03*
|
||||
X63881000Y-119888000D03*
|
||||
|
|
@ -74,14 +65,14 @@ X65151000Y-118618000D03*
|
|||
X63881000Y-118618000D03*
|
||||
X62611000Y-118618000D03*
|
||||
X61341000Y-118618000D03*
|
||||
D19*
|
||||
D16*
|
||||
X60071000Y-119253000D03*
|
||||
X67691000Y-118237000D03*
|
||||
X67691000Y-120269000D03*
|
||||
X67691000Y-118237000D03*
|
||||
X67691000Y-120269000D03*
|
||||
X60071000Y-119253000D03*
|
||||
D17*
|
||||
D14*
|
||||
X60071000Y-116713000D03*
|
||||
X60071000Y-121793000D03*
|
||||
X65786000Y-121793000D03*
|
||||
|
|
@ -1887,9 +1878,9 @@ X136740900Y-131535800D01*
|
|||
X137579100Y-131535800D01*
|
||||
X137620179Y-131537818D01*
|
||||
G37*
|
||||
D20*
|
||||
D17*
|
||||
X140462000Y-129540000D03*
|
||||
D21*
|
||||
D18*
|
||||
X48133000Y-96139000D03*
|
||||
X57023000Y-84709000D03*
|
||||
X143002000Y-127000000D03*
|
||||
|
|
|
|||
|
|
@ -1,11 +1,11 @@
|
|||
G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,(5.1.5-0-10_14)*
|
||||
G04 #@! TF.CreationDate,2021-02-17T19:07:14-05:00*
|
||||
G04 #@! TF.CreationDate,2021-04-11T00:58:13-04:00*
|
||||
G04 #@! TF.ProjectId,GR8RAM,47523852-414d-42e6-9b69-6361645f7063,0.9*
|
||||
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|
||||
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|
||||
%FSLAX46Y46*%
|
||||
G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
|
||||
G04 Created by KiCad (PCBNEW (5.1.5-0-10_14)) date 2021-02-17 19:07:14*
|
||||
G04 Created by KiCad (PCBNEW (5.1.5-0-10_14)) date 2021-04-11 00:58:13*
|
||||
%MOMM*%
|
||||
%LPD*%
|
||||
G04 APERTURE LIST*
|
||||
|
|
|
|||
52500
gerber/GR8RAM-F_Cu.gtl
52500
gerber/GR8RAM-F_Cu.gtl
File diff suppressed because it is too large
Load Diff
18436
gerber/GR8RAM-F_Mask.gts
18436
gerber/GR8RAM-F_Mask.gts
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
13476
gerber/GR8RAM-In1_Cu.g2
13476
gerber/GR8RAM-In1_Cu.g2
File diff suppressed because it is too large
Load Diff
29326
gerber/GR8RAM-In2_Cu.g3
29326
gerber/GR8RAM-In2_Cu.g3
File diff suppressed because it is too large
Load Diff
|
|
@ -1 +1 @@
|
|||
Ref,Val,Package,MidX,MidY,Rot,Side
|
||||
Ref,Val,Package,PosX,PosY,Rot,Side
|
||||
|
|
|
|||
|
|
|
@ -1,4 +1,4 @@
|
|||
### Module positions - created on Wednesday, February 17, 2021 at 07:07:19 PM ###
|
||||
### Module positions - created on Sunday, April 11, 2021 at 12:58:18 AM ###
|
||||
### Printed by Pcbnew version kicad (5.1.5-0-10_14)
|
||||
## Unit = mm, Angle = deg.
|
||||
## Side : bottom
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
|
|
@ -1,16 +1,13 @@
|
|||
Ref,Val,Package,MidX,MidY,Rot,Side
|
||||
Ref,Val,Package,PosX,PosY,Rot,Side
|
||||
"C1","10u","C_0805",136.310000,-128.270000,180.000000,top
|
||||
"C2","10u","C_0805",119.976000,-128.270000,180.000000,top
|
||||
"C3","10u","C_0805",116.244000,-128.270000,0.000000,top
|
||||
"C4","10u","C_0805",75.350000,-128.270000,180.000000,top
|
||||
"C5","10u","C_0805",100.000000,-88.350000,270.000000,top
|
||||
"C6","10u","C_0805",142.250000,-93.600000,90.000000,top
|
||||
"C7","10u","C_0805",142.600000,-103.550000,0.000000,top
|
||||
"C8","10u","C_0805",142.600000,-105.550000,0.000000,top
|
||||
"C9","2u2","C_0603",118.700000,-117.450000,270.000000,top
|
||||
"C10","10u","C_0805",134.850000,-105.550000,90.000000,top
|
||||
"C11","10u","C_0805",132.350000,-105.550000,90.000000,top
|
||||
"C12","2u2","C_0603",136.450000,-108.900000,90.000000,top
|
||||
"C5","2u2","C_0603",113.650000,-90.750000,180.000000,top
|
||||
"C7","10u","C_0805",140.100000,-124.200000,90.000000,top
|
||||
"C10","10u","C_0805",132.750000,-124.200000,90.000000,top
|
||||
"C11","10u","C_0805",130.350000,-124.200000,90.000000,top
|
||||
"C12","2u2","C_0603",123.650000,-90.750000,180.000000,top
|
||||
"C13","2u2","C_0603",76.600000,-119.800000,270.000000,top
|
||||
"C14","2u2","C_0603",85.800000,-119.800000,270.000000,top
|
||||
"C15","2u2","C_0603",95.000000,-119.800000,270.000000,top
|
||||
|
|
@ -33,80 +30,31 @@ Ref,Val,Package,MidX,MidY,Rot,Side
|
|||
"C33","2u2","C_0603",110.800000,-104.050000,90.000000,top
|
||||
"C34","2u2","C_0603",110.850000,-108.700000,90.000000,top
|
||||
"C35","2u2","C_0603",113.650000,-115.350000,180.000000,top
|
||||
"C36","10u","C_0805",132.350000,-97.100000,180.000000,top
|
||||
"C37","10u","C_0805",132.350000,-99.600000,180.000000,top
|
||||
"C38","22n","C_0603",131.100000,-122.150000,180.000000,top
|
||||
"C39","1n","C_0603",133.900000,-108.150000,0.000000,top
|
||||
"C40","22n","C_0603",131.000000,-108.150000,0.000000,top
|
||||
"C41","22n","C_0603",139.550000,-120.650000,0.000000,top
|
||||
"C42","2u2","C_0603",116.000000,-118.550000,270.000000,top
|
||||
"C43","2u2","C_0603",121.600000,-118.550000,270.000000,top
|
||||
"C44","2u2","C_0603",127.200000,-118.550000,270.000000,top
|
||||
"D1","SS14","D_SMA",142.000000,-99.050000,90.000000,top
|
||||
"D2","SMBJ5.0A","D_SMB",137.400000,-99.050000,270.000000,top
|
||||
"D3","SS14","D_SMA",142.900000,-118.700000,270.000000,top
|
||||
"F1","nSMD050-16V","BelFuse_1206",135.450000,-92.450000,0.000000,top
|
||||
"FB1","GZ2012D101TF","Murata_BLM21",139.550000,-94.450000,0.000000,top
|
||||
"C42","2u2","C_0603",117.800000,-122.100000,90.000000,top
|
||||
"C43","2u2","C_0603",104.800000,-112.250000,0.000000,top
|
||||
"C44","2u2","C_0603",69.000000,-100.650000,270.000000,top
|
||||
"FID1","Fiducial","Fiducial",143.002000,-82.423000,270.000000,top
|
||||
"FID2","Fiducial","Fiducial",48.133000,-93.599000,90.000000,top
|
||||
"FID3","Fiducial","Fiducial",58.801000,-82.931000,90.000000,top
|
||||
"FID4","Fiducial","Fiducial",143.002000,-129.540000,0.000000,top
|
||||
"FID5","Fiducial","Fiducial",48.133000,-129.540000,0.000000,top
|
||||
"Q1","AO3401A","SOT-23",142.800000,-109.950000,270.000000,top
|
||||
"R1","33","R_0603",114.000000,-124.200000,180.000000,top
|
||||
"R2","2k2","R_0603",128.950000,-113.700000,270.000000,top
|
||||
"R3","2k7","R_0603",133.900000,-122.150000,180.000000,top
|
||||
"R4","2k2","R_0603",133.900000,-109.600000,180.000000,top
|
||||
"R5","1M","R_0603",131.100000,-120.650000,0.000000,top
|
||||
"R6","1k","R_0603",133.900000,-111.050000,0.000000,top
|
||||
"R7","820","R_0603",133.900000,-120.650000,0.000000,top
|
||||
"R8","1M","R_0603",131.000000,-109.600000,180.000000,top
|
||||
"R9","1k2","R_0603",128.850000,-110.250000,90.000000,top
|
||||
"R10","2k2","R_0603",131.000000,-111.050000,0.000000,top
|
||||
"R11","330","R_0603",128.850000,-107.450000,90.000000,top
|
||||
"R12","1k","R_0805",136.150000,-94.650000,180.000000,top
|
||||
"R13","DNP","R_0805",139.550000,-92.450000,0.000000,top
|
||||
"R14","1k","R_0603",136.750000,-122.150000,180.000000,top
|
||||
"R15","2k2","R_0603",138.200000,-108.850000,90.000000,top
|
||||
"R16","2k2","R_0603",136.750000,-120.650000,0.000000,top
|
||||
"R17","1k","R_0603",138.150000,-123.750000,180.000000,top
|
||||
"R18","22k","R_0603",139.550000,-122.150000,180.000000,top
|
||||
"R19","1k","R_0603",71.950000,-90.800000,90.000000,top
|
||||
"R20","33","R_0603",125.200000,-124.200000,180.000000,top
|
||||
"R21","33","R_0603",128.000000,-124.200000,180.000000,top
|
||||
"R22","33","R_0603",116.800000,-124.200000,180.000000,top
|
||||
"R23","33","R_0603",126.700000,-129.750000,180.000000,top
|
||||
"R24","33","R_0603",122.400000,-124.200000,180.000000,top
|
||||
"R25","33","R_0603",132.400000,-129.750000,180.000000,top
|
||||
"R26","33","R_0603",129.550000,-129.750000,180.000000,top
|
||||
"R27","33","R_0603",119.600000,-124.200000,180.000000,top
|
||||
"R22","33","R_0603",115.800000,-124.200000,180.000000,top
|
||||
"R28","22k","R_0603",70.550000,-110.650000,0.000000,top
|
||||
"R29","22k","R_0603",70.550000,-112.100000,180.000000,top
|
||||
"R30","1M","R_0603",139.300000,-111.050000,0.000000,top
|
||||
"R31","33","R_0603",80.950000,-108.500000,90.000000,top
|
||||
"RN1","4x33","R4_0402",108.200000,-95.150000,0.000000,top
|
||||
"RN2","4x33","R4_0402",108.450000,-106.250000,270.000000,top
|
||||
"RN3","4x33","R4_0402",108.450000,-110.650000,270.000000,top
|
||||
"RN4","4x10k","R4_0402",113.500000,-117.200000,0.000000,top
|
||||
"RN5","4x10k","R4_0402",69.250000,-96.450000,90.000000,top
|
||||
"RN5","4x10k","R4_0402",69.100000,-96.450000,90.000000,top
|
||||
"SW1","FW","SW_DIP_SPSTx02_Slide_DSHP02TS_P1.27mm",135.763000,-95.885000,0.000000,top
|
||||
"U1","EPM240T100C5N","TQFP-100_14x14mm_P0.5mm",94.050000,-101.400000,270.000000,top
|
||||
"U2","W9825","TSOP-II-54_22.2x10.16mm_P0.8mm",118.650000,-103.050000,180.000000,top
|
||||
"U3","W25Q128JVSIQ","SOIC-8_5.3mm",79.121000,-100.711000,180.000000,top
|
||||
"U4","74AHC245PW","TSSOP-20_4.4x6.5mm_P0.65mm",90.225000,-122.000000,0.000000,top
|
||||
"U5","74AHC245PW","TSSOP-20_4.4x6.5mm_P0.65mm",108.625000,-122.000000,0.000000,top
|
||||
"U6","74AHC245PW","TSSOP-20_4.4x6.5mm_P0.65mm",81.025000,-122.000000,0.000000,top
|
||||
"U7","LM393D","SOIC-8_3.9mm",132.457000,-115.824000,0.000000,top
|
||||
"U8","XC6206P332MR","SOT-23",138.350000,-105.550000,180.000000,top
|
||||
"U8","XC6206P332MR","SOT-23",136.250000,-124.200000,180.000000,top
|
||||
"U9","74AHC245PW","TSSOP-20_4.4x6.5mm_P0.65mm",99.425000,-122.000000,0.000000,top
|
||||
"U10","LM393D","SOIC-8_3.9mm",138.172000,-115.824000,0.000000,top
|
||||
"U11","74LVC1G125GW","SOT-353",125.050000,-121.850000,90.000000,top
|
||||
"U12","74LVC1G125GW","SOT-353",127.850000,-121.850000,90.000000,top
|
||||
"U13","25M","Crystal_SMD_3225-4Pin_3.2x2.5mm",107.100000,-102.500000,0.000000,top
|
||||
"U14","74LVC1G125GW","SOT-353",116.650000,-121.850000,90.000000,top
|
||||
"U15","74LVC1G125GW","SOT-353",126.550000,-127.450000,90.000000,top
|
||||
"U14","74LVC1G125GW","SOT-353",115.650000,-121.850000,90.000000,top
|
||||
"U16","74LVC1G125GW","SOT-353",108.200000,-98.850000,270.000000,top
|
||||
"U17","74LVC1G125GW","SOT-353",122.250000,-121.850000,90.000000,top
|
||||
"U18","74LVC1G125GW","SOT-353",132.250000,-127.450000,90.000000,top
|
||||
"U19","74LVC1G125GW","SOT-353",129.400000,-127.450000,90.000000,top
|
||||
"U20","74LVC1G125GW","SOT-353",113.850000,-121.850000,90.000000,top
|
||||
"U22","74LVC1G125GW","SOT-353",119.450000,-121.850000,90.000000,top
|
||||
|
|
|
|||
|
|
|
@ -1,117 +1,65 @@
|
|||
### Module positions - created on Wednesday, February 17, 2021 at 07:07:19 PM ###
|
||||
### Module positions - created on Sunday, April 11, 2021 at 12:58:18 AM ###
|
||||
### Printed by Pcbnew version kicad (5.1.5-0-10_14)
|
||||
## Unit = mm, Angle = deg.
|
||||
## Side : top
|
||||
# Ref Val Package PosX PosY Rot Side
|
||||
C1 10u C_0805 136.3100 -128.2700 180.0000 top
|
||||
C2 10u C_0805 119.9760 -128.2700 180.0000 top
|
||||
C3 10u C_0805 116.2440 -128.2700 0.0000 top
|
||||
C4 10u C_0805 75.3500 -128.2700 180.0000 top
|
||||
C5 10u C_0805 100.0000 -88.3500 270.0000 top
|
||||
C6 10u C_0805 142.2500 -93.6000 90.0000 top
|
||||
C7 10u C_0805 142.6000 -103.5500 0.0000 top
|
||||
C8 10u C_0805 142.6000 -105.5500 0.0000 top
|
||||
C9 2u2 C_0603 118.7000 -117.4500 270.0000 top
|
||||
C10 10u C_0805 134.8500 -105.5500 90.0000 top
|
||||
C11 10u C_0805 132.3500 -105.5500 90.0000 top
|
||||
C12 2u2 C_0603 136.4500 -108.9000 90.0000 top
|
||||
C13 2u2 C_0603 76.6000 -119.8000 270.0000 top
|
||||
C14 2u2 C_0603 85.8000 -119.8000 270.0000 top
|
||||
C15 2u2 C_0603 95.0000 -119.8000 270.0000 top
|
||||
C16 2u2 C_0603 104.2000 -119.8000 270.0000 top
|
||||
C18 2u2 C_0603 82.8000 -103.5510 90.0000 top
|
||||
C19 2u2 C_0603 84.3500 -98.0000 90.0000 top
|
||||
C20 2u2 C_0603 84.3500 -100.9000 90.0000 top
|
||||
C21 2u2 C_0603 90.8000 -111.1000 0.0000 top
|
||||
C22 2u2 C_0603 97.8000 -111.1000 0.0000 top
|
||||
C23 2u2 C_0603 103.7500 -104.3000 270.0000 top
|
||||
C24 2u2 C_0603 103.7500 -100.9000 90.0000 top
|
||||
C25 2u2 C_0603 97.1500 -91.7000 180.0000 top
|
||||
C26 2u2 C_0603 90.1500 -91.7000 180.0000 top
|
||||
C27 2u2 C_0603 105.9500 -98.7500 270.0000 top
|
||||
C28 2u2 C_0603 123.6500 -115.3500 180.0000 top
|
||||
C29 2u2 C_0603 126.4500 -112.6000 270.0000 top
|
||||
C30 2u2 C_0603 126.4500 -107.8000 270.0000 top
|
||||
C31 2u2 C_0603 126.4500 -103.8000 270.0000 top
|
||||
C32 2u2 C_0603 126.4500 -93.4000 270.0000 top
|
||||
C33 2u2 C_0603 110.8000 -104.0500 90.0000 top
|
||||
C34 2u2 C_0603 110.8500 -108.7000 90.0000 top
|
||||
C35 2u2 C_0603 113.6500 -115.3500 180.0000 top
|
||||
C36 10u C_0805 132.3500 -97.1000 180.0000 top
|
||||
C37 10u C_0805 132.3500 -99.6000 180.0000 top
|
||||
C38 22n C_0603 131.1000 -122.1500 180.0000 top
|
||||
C39 1n C_0603 133.9000 -108.1500 0.0000 top
|
||||
C40 22n C_0603 131.0000 -108.1500 0.0000 top
|
||||
C41 22n C_0603 139.5500 -120.6500 0.0000 top
|
||||
C42 2u2 C_0603 116.0000 -118.5500 270.0000 top
|
||||
C43 2u2 C_0603 121.6000 -118.5500 270.0000 top
|
||||
C44 2u2 C_0603 127.2000 -118.5500 270.0000 top
|
||||
D1 SS14 D_SMA 142.0000 -99.0500 90.0000 top
|
||||
D2 SMBJ5.0A D_SMB 137.4000 -99.0500 270.0000 top
|
||||
D3 SS14 D_SMA 142.9000 -118.7000 270.0000 top
|
||||
F1 nSMD050-16V BelFuse_1206 135.4500 -92.4500 0.0000 top
|
||||
FB1 GZ2012D101TF Murata_BLM21 139.5500 -94.4500 0.0000 top
|
||||
FID1 Fiducial Fiducial 143.0020 -82.4230 270.0000 top
|
||||
FID2 Fiducial Fiducial 48.1330 -93.5990 90.0000 top
|
||||
FID3 Fiducial Fiducial 58.8010 -82.9310 90.0000 top
|
||||
FID4 Fiducial Fiducial 143.0020 -129.5400 0.0000 top
|
||||
FID5 Fiducial Fiducial 48.1330 -129.5400 0.0000 top
|
||||
Q1 AO3401A SOT-23 142.8000 -109.9500 270.0000 top
|
||||
R1 33 R_0603 114.0000 -124.2000 180.0000 top
|
||||
R2 2k2 R_0603 128.9500 -113.7000 270.0000 top
|
||||
R3 2k7 R_0603 133.9000 -122.1500 180.0000 top
|
||||
R4 2k2 R_0603 133.9000 -109.6000 180.0000 top
|
||||
R5 1M R_0603 131.1000 -120.6500 0.0000 top
|
||||
R6 1k R_0603 133.9000 -111.0500 0.0000 top
|
||||
R7 820 R_0603 133.9000 -120.6500 0.0000 top
|
||||
R8 1M R_0603 131.0000 -109.6000 180.0000 top
|
||||
R9 1k2 R_0603 128.8500 -110.2500 90.0000 top
|
||||
R10 2k2 R_0603 131.0000 -111.0500 0.0000 top
|
||||
R11 330 R_0603 128.8500 -107.4500 90.0000 top
|
||||
R12 1k R_0805 136.1500 -94.6500 180.0000 top
|
||||
R13 DNP R_0805 139.5500 -92.4500 0.0000 top
|
||||
R14 1k R_0603 136.7500 -122.1500 180.0000 top
|
||||
R15 2k2 R_0603 138.2000 -108.8500 90.0000 top
|
||||
R16 2k2 R_0603 136.7500 -120.6500 0.0000 top
|
||||
R17 1k R_0603 138.1500 -123.7500 180.0000 top
|
||||
R18 22k R_0603 139.5500 -122.1500 180.0000 top
|
||||
R19 1k R_0603 71.9500 -90.8000 90.0000 top
|
||||
R20 33 R_0603 125.2000 -124.2000 180.0000 top
|
||||
R21 33 R_0603 128.0000 -124.2000 180.0000 top
|
||||
R22 33 R_0603 116.8000 -124.2000 180.0000 top
|
||||
R23 33 R_0603 126.7000 -129.7500 180.0000 top
|
||||
R24 33 R_0603 122.4000 -124.2000 180.0000 top
|
||||
R25 33 R_0603 132.4000 -129.7500 180.0000 top
|
||||
R26 33 R_0603 129.5500 -129.7500 180.0000 top
|
||||
R27 33 R_0603 119.6000 -124.2000 180.0000 top
|
||||
R28 22k R_0603 70.5500 -110.6500 0.0000 top
|
||||
R29 22k R_0603 70.5500 -112.1000 180.0000 top
|
||||
R30 1M R_0603 139.3000 -111.0500 0.0000 top
|
||||
R31 33 R_0603 80.9500 -108.5000 90.0000 top
|
||||
RN1 4x33 R4_0402 108.2000 -95.1500 0.0000 top
|
||||
RN2 4x33 R4_0402 108.4500 -106.2500 270.0000 top
|
||||
RN3 4x33 R4_0402 108.4500 -110.6500 270.0000 top
|
||||
RN4 4x10k R4_0402 113.5000 -117.2000 0.0000 top
|
||||
RN5 4x10k R4_0402 69.2500 -96.4500 90.0000 top
|
||||
U1 EPM240T100C5N TQFP-100_14x14mm_P0.5mm 94.0500 -101.4000 270.0000 top
|
||||
U2 W9825 TSOP-II-54_22.2x10.16mm_P0.8mm 118.6500 -103.0500 180.0000 top
|
||||
U3 W25Q128JVSIQ SOIC-8_5.3mm 79.1210 -100.7110 180.0000 top
|
||||
U4 74AHC245PW TSSOP-20_4.4x6.5mm_P0.65mm 90.2250 -122.0000 0.0000 top
|
||||
U5 74AHC245PW TSSOP-20_4.4x6.5mm_P0.65mm 108.6250 -122.0000 0.0000 top
|
||||
U6 74AHC245PW TSSOP-20_4.4x6.5mm_P0.65mm 81.0250 -122.0000 0.0000 top
|
||||
U7 LM393D SOIC-8_3.9mm 132.4570 -115.8240 0.0000 top
|
||||
U8 XC6206P332MR SOT-23 138.3500 -105.5500 180.0000 top
|
||||
U9 74AHC245PW TSSOP-20_4.4x6.5mm_P0.65mm 99.4250 -122.0000 0.0000 top
|
||||
U10 LM393D SOIC-8_3.9mm 138.1720 -115.8240 0.0000 top
|
||||
U11 74LVC1G125GW SOT-353 125.0500 -121.8500 90.0000 top
|
||||
U12 74LVC1G125GW SOT-353 127.8500 -121.8500 90.0000 top
|
||||
U13 25M Crystal_SMD_3225-4Pin_3.2x2.5mm 107.1000 -102.5000 0.0000 top
|
||||
U14 74LVC1G125GW SOT-353 116.6500 -121.8500 90.0000 top
|
||||
U15 74LVC1G125GW SOT-353 126.5500 -127.4500 90.0000 top
|
||||
U16 74LVC1G125GW SOT-353 108.2000 -98.8500 270.0000 top
|
||||
U17 74LVC1G125GW SOT-353 122.2500 -121.8500 90.0000 top
|
||||
U18 74LVC1G125GW SOT-353 132.2500 -127.4500 90.0000 top
|
||||
U19 74LVC1G125GW SOT-353 129.4000 -127.4500 90.0000 top
|
||||
U20 74LVC1G125GW SOT-353 113.8500 -121.8500 90.0000 top
|
||||
U22 74LVC1G125GW SOT-353 119.4500 -121.8500 90.0000 top
|
||||
# Ref Val Package PosX PosY Rot Side
|
||||
C1 10u C_0805 136.3100 -128.2700 180.0000 top
|
||||
C2 10u C_0805 119.9760 -128.2700 180.0000 top
|
||||
C3 10u C_0805 116.2440 -128.2700 0.0000 top
|
||||
C4 10u C_0805 75.3500 -128.2700 180.0000 top
|
||||
C5 2u2 C_0603 113.6500 -90.7500 180.0000 top
|
||||
C7 10u C_0805 140.1000 -124.2000 90.0000 top
|
||||
C10 10u C_0805 132.7500 -124.2000 90.0000 top
|
||||
C11 10u C_0805 130.3500 -124.2000 90.0000 top
|
||||
C12 2u2 C_0603 123.6500 -90.7500 180.0000 top
|
||||
C13 2u2 C_0603 76.6000 -119.8000 270.0000 top
|
||||
C14 2u2 C_0603 85.8000 -119.8000 270.0000 top
|
||||
C15 2u2 C_0603 95.0000 -119.8000 270.0000 top
|
||||
C16 2u2 C_0603 104.2000 -119.8000 270.0000 top
|
||||
C18 2u2 C_0603 82.8000 -103.5510 90.0000 top
|
||||
C19 2u2 C_0603 84.3500 -98.0000 90.0000 top
|
||||
C20 2u2 C_0603 84.3500 -100.9000 90.0000 top
|
||||
C21 2u2 C_0603 90.8000 -111.1000 0.0000 top
|
||||
C22 2u2 C_0603 97.8000 -111.1000 0.0000 top
|
||||
C23 2u2 C_0603 103.7500 -104.3000 270.0000 top
|
||||
C24 2u2 C_0603 103.7500 -100.9000 90.0000 top
|
||||
C25 2u2 C_0603 97.1500 -91.7000 180.0000 top
|
||||
C26 2u2 C_0603 90.1500 -91.7000 180.0000 top
|
||||
C27 2u2 C_0603 105.9500 -98.7500 270.0000 top
|
||||
C28 2u2 C_0603 123.6500 -115.3500 180.0000 top
|
||||
C29 2u2 C_0603 126.4500 -112.6000 270.0000 top
|
||||
C30 2u2 C_0603 126.4500 -107.8000 270.0000 top
|
||||
C31 2u2 C_0603 126.4500 -103.8000 270.0000 top
|
||||
C32 2u2 C_0603 126.4500 -93.4000 270.0000 top
|
||||
C33 2u2 C_0603 110.8000 -104.0500 90.0000 top
|
||||
C34 2u2 C_0603 110.8500 -108.7000 90.0000 top
|
||||
C35 2u2 C_0603 113.6500 -115.3500 180.0000 top
|
||||
C42 2u2 C_0603 117.8000 -122.1000 90.0000 top
|
||||
C43 2u2 C_0603 104.8000 -112.2500 0.0000 top
|
||||
C44 2u2 C_0603 69.0000 -100.6500 270.0000 top
|
||||
FID1 Fiducial Fiducial 143.0020 -82.4230 270.0000 top
|
||||
FID2 Fiducial Fiducial 48.1330 -93.5990 90.0000 top
|
||||
FID3 Fiducial Fiducial 58.8010 -82.9310 90.0000 top
|
||||
FID4 Fiducial Fiducial 143.0020 -129.5400 0.0000 top
|
||||
FID5 Fiducial Fiducial 48.1330 -129.5400 0.0000 top
|
||||
R22 33 R_0603 115.8000 -124.2000 180.0000 top
|
||||
R28 22k R_0603 70.5500 -110.6500 0.0000 top
|
||||
R29 22k R_0603 70.5500 -112.1000 180.0000 top
|
||||
R31 33 R_0603 80.9500 -108.5000 90.0000 top
|
||||
RN1 4x33 R4_0402 108.2000 -95.1500 0.0000 top
|
||||
RN2 4x33 R4_0402 108.4500 -106.2500 270.0000 top
|
||||
RN3 4x33 R4_0402 108.4500 -110.6500 270.0000 top
|
||||
RN5 4x10k R4_0402 69.1000 -96.4500 90.0000 top
|
||||
SW1 FW SW_DIP_SPSTx02_Slide_DSHP02TS_P1.27mm 135.7630 -95.8850 0.0000 top
|
||||
U1 EPM240T100C5N TQFP-100_14x14mm_P0.5mm 94.0500 -101.4000 270.0000 top
|
||||
U2 W9825 TSOP-II-54_22.2x10.16mm_P0.8mm 118.6500 -103.0500 180.0000 top
|
||||
U3 W25Q128JVSIQ SOIC-8_5.3mm 79.1210 -100.7110 180.0000 top
|
||||
U4 74AHC245PW TSSOP-20_4.4x6.5mm_P0.65mm 90.2250 -122.0000 0.0000 top
|
||||
U5 74AHC245PW TSSOP-20_4.4x6.5mm_P0.65mm 108.6250 -122.0000 0.0000 top
|
||||
U6 74AHC245PW TSSOP-20_4.4x6.5mm_P0.65mm 81.0250 -122.0000 0.0000 top
|
||||
U8 XC6206P332MR SOT-23 136.2500 -124.2000 180.0000 top
|
||||
U9 74AHC245PW TSSOP-20_4.4x6.5mm_P0.65mm 99.4250 -122.0000 0.0000 top
|
||||
U13 25M Crystal_SMD_3225-4Pin_3.2x2.5mm 107.1000 -102.5000 0.0000 top
|
||||
U14 74LVC1G125GW SOT-353 115.6500 -121.8500 90.0000 top
|
||||
U16 74LVC1G125GW SOT-353 108.2000 -98.8500 270.0000 top
|
||||
## End
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
M48
|
||||
; DRILL file {KiCad (5.1.5-0-10_14)} date Wednesday, February 17, 2021 at 07:07:15 PM
|
||||
; DRILL file {KiCad (5.1.5-0-10_14)} date Sunday, April 11, 2021 at 12:58:14 AM
|
||||
; FORMAT={-:-/ absolute / inch / decimal}
|
||||
; #@! TF.CreationDate,2021-02-17T19:07:15-05:00
|
||||
; #@! TF.CreationDate,2021-04-11T00:58:14-04:00
|
||||
; #@! TF.GenerationSoftware,Kicad,Pcbnew,(5.1.5-0-10_14)
|
||||
FMAT,2
|
||||
INCH
|
||||
|
|
@ -10,12 +10,11 @@ T2C0.0118
|
|||
T3C0.0150
|
||||
T4C0.0157
|
||||
T5C0.0300
|
||||
T6C0.0315
|
||||
T7C0.0400
|
||||
T8C0.0433
|
||||
T9C0.0390
|
||||
T10C0.0454
|
||||
T11C0.0935
|
||||
T6C0.0400
|
||||
T7C0.0433
|
||||
T8C0.0390
|
||||
T9C0.0454
|
||||
T10C0.0935
|
||||
%
|
||||
G90
|
||||
G05
|
||||
|
|
@ -71,14 +70,15 @@ X2.29Y-3.585
|
|||
X2.313Y-4.876
|
||||
X2.32Y-5.04
|
||||
X2.33Y-3.175
|
||||
X2.345Y-3.5
|
||||
X2.345Y-3.475
|
||||
X2.345Y-3.675
|
||||
X2.36Y-3.32
|
||||
X2.3701Y-4.2067
|
||||
X2.415Y-4.6375
|
||||
X2.4225Y-4.91
|
||||
X2.425Y-5.17
|
||||
X2.445Y-3.4
|
||||
X2.445Y-3.175
|
||||
X2.445Y-3.375
|
||||
X2.445Y-3.575
|
||||
X2.465Y-4.7525
|
||||
X2.4775Y-4.6075
|
||||
|
|
@ -88,10 +88,10 @@ X2.5075Y-4.53
|
|||
X2.52Y-5.04
|
||||
X2.525Y-4.79
|
||||
X2.525Y-4.82
|
||||
X2.545Y-3.3
|
||||
X2.545Y-3.5
|
||||
X2.5433Y-4.498
|
||||
X2.545Y-3.275
|
||||
X2.545Y-3.475
|
||||
X2.545Y-3.675
|
||||
X2.5591Y-4.498
|
||||
X2.59Y-4.185
|
||||
X2.59Y-4.24
|
||||
X2.6025Y-4.91
|
||||
|
|
@ -99,70 +99,75 @@ X2.625Y-5.17
|
|||
X2.6299Y-3.9921
|
||||
X2.6299Y-4.3327
|
||||
X2.645Y-3.175
|
||||
X2.645Y-3.175
|
||||
X2.645Y-3.41
|
||||
X2.645Y-3.375
|
||||
X2.645Y-3.575
|
||||
X2.6791Y-3.7972
|
||||
X2.6732Y-3.7972
|
||||
X2.6831Y-3.939
|
||||
X2.6831Y-3.9862
|
||||
X2.6909Y-4.3937
|
||||
X2.7028Y-4.2953
|
||||
X2.7028Y-4.3504
|
||||
X2.7165Y-3.9016
|
||||
X2.7165Y-4.0236
|
||||
X2.72Y-5.04
|
||||
X2.725Y-4.615
|
||||
X2.725Y-4.815
|
||||
X2.745Y-3.3
|
||||
X2.745Y-3.5
|
||||
X2.7402Y-3.7421
|
||||
X2.7402Y-3.8524
|
||||
X2.745Y-3.275
|
||||
X2.745Y-3.475
|
||||
X2.745Y-3.675
|
||||
X2.7461Y-3.7421
|
||||
X2.7461Y-3.8524
|
||||
X2.7461Y-4.3228
|
||||
X2.7461Y-4.4469
|
||||
X2.75Y-3.939
|
||||
X2.75Y-3.9862
|
||||
X2.825Y-4.515
|
||||
X2.825Y-4.715
|
||||
X2.825Y-4.915
|
||||
X2.825Y-5.17
|
||||
X2.8327Y-3.5138
|
||||
X2.8366Y-4.3563
|
||||
X2.8386Y-4.4134
|
||||
X2.845Y-3.175
|
||||
X2.845Y-3.175
|
||||
X2.845Y-3.41
|
||||
X2.8661Y-3.6063
|
||||
X2.845Y-3.375
|
||||
X2.845Y-3.375
|
||||
X2.845Y-3.575
|
||||
X2.925Y-4.615
|
||||
X2.925Y-4.815
|
||||
X2.945Y-3.3
|
||||
X2.945Y-3.49
|
||||
X2.945Y-3.275
|
||||
X2.945Y-3.475
|
||||
X2.9803Y-4.002
|
||||
X2.9803Y-4.687
|
||||
X3.0059Y-4.1102
|
||||
X3.0059Y-4.122
|
||||
X3.01Y-3.8225
|
||||
X3.025Y-4.515
|
||||
X3.04Y-3.7725
|
||||
X3.04Y-3.87
|
||||
X3.04Y-4.06
|
||||
X3.045Y-3.175
|
||||
X3.045Y-3.175
|
||||
X3.045Y-3.41
|
||||
X3.045Y-3.375
|
||||
X3.05Y-5.17
|
||||
X3.0502Y-4.687
|
||||
X3.0502Y-4.7461
|
||||
X3.0512Y-4.9193
|
||||
X3.065Y-5.0079
|
||||
X3.0709Y-4.2224
|
||||
X3.0748Y-4.6437
|
||||
X3.0748Y-4.7303
|
||||
X3.0768Y-4.2283
|
||||
X3.0787Y-4.1772
|
||||
X3.0748Y-4.874
|
||||
X3.0787Y-4.1713
|
||||
X3.0825Y-3.77
|
||||
X3.09Y-4.06
|
||||
X3.1004Y-4.7303
|
||||
X3.1004Y-4.9646
|
||||
X3.1024Y-4.6437
|
||||
X3.126Y-4.9941
|
||||
X3.1378Y-4.2756
|
||||
X3.14Y-4.06
|
||||
X3.145Y-3.3
|
||||
X3.145Y-3.49
|
||||
X3.1417Y-4.2776
|
||||
X3.145Y-3.275
|
||||
X3.145Y-3.475
|
||||
X3.1475Y-3.77
|
||||
X3.1476Y-5.0531
|
||||
X3.15Y-5.17
|
||||
X3.1516Y-4.2382
|
||||
X3.1516Y-4.9646
|
||||
X3.1525Y-5.05
|
||||
X3.1772Y-4.9941
|
||||
X3.1791Y-5.1142
|
||||
X3.19Y-3.77
|
||||
|
|
@ -174,7 +179,7 @@ X3.2264Y-4.1063
|
|||
X3.2283Y-4.9941
|
||||
X3.2362Y-4.2992
|
||||
X3.245Y-3.175
|
||||
X3.245Y-3.4
|
||||
X3.245Y-3.375
|
||||
X3.248Y-3.8504
|
||||
X3.25Y-5.17
|
||||
X3.2539Y-4.9646
|
||||
|
|
@ -197,10 +202,9 @@ X3.3169Y-4.0335
|
|||
X3.3209Y-4.2283
|
||||
X3.3268Y-4.4783
|
||||
X3.3307Y-4.9193
|
||||
X3.3425Y-4.687
|
||||
X3.3445Y-4.7461
|
||||
X3.345Y-3.305
|
||||
X3.345Y-3.49
|
||||
X3.3445Y-4.6909
|
||||
X3.345Y-3.31
|
||||
X3.345Y-3.48
|
||||
X3.35Y-5.17
|
||||
X3.3524Y-4.1201
|
||||
X3.3543Y-3.8248
|
||||
|
|
@ -211,96 +215,85 @@ X3.3563Y-3.9921
|
|||
X3.3563Y-4.1693
|
||||
X3.3563Y-4.2087
|
||||
X3.3642Y-4.2736
|
||||
X3.378Y-4.7776
|
||||
X3.4016Y-3.7185
|
||||
X3.4016Y-4.3228
|
||||
X3.4114Y-4.6555
|
||||
X3.4114Y-4.7461
|
||||
X3.4124Y-4.687
|
||||
X3.4193Y-5.1161
|
||||
X3.4252Y-4.9646
|
||||
X3.437Y-3.6594
|
||||
X3.4213Y-4.9685
|
||||
X3.4311Y-3.6575
|
||||
X3.437Y-4.6437
|
||||
X3.437Y-4.7303
|
||||
X3.437Y-4.874
|
||||
X3.4409Y-4.3996
|
||||
X3.4449Y-3.9114
|
||||
X3.4449Y-3.9429
|
||||
X3.4449Y-3.9921
|
||||
X3.445Y-3.175
|
||||
X3.445Y-3.41
|
||||
X3.445Y-3.405
|
||||
X3.4469Y-4.0709
|
||||
X3.4469Y-4.1102
|
||||
X3.45Y-5.17
|
||||
X3.4567Y-4.189
|
||||
X3.4567Y-4.5059
|
||||
X3.4606Y-4.1496
|
||||
X3.4606Y-4.6417
|
||||
X3.4665Y-4.248
|
||||
X3.4646Y-4.6437
|
||||
X3.4665Y-5.1043
|
||||
X3.4803Y-5.0413
|
||||
X3.4823Y-3.8346
|
||||
X3.4823Y-3.874
|
||||
X3.4823Y-4.0118
|
||||
X3.4823Y-4.0906
|
||||
X3.4843Y-3.9232
|
||||
X3.4862Y-4.3386
|
||||
X3.4882Y-4.2126
|
||||
X3.4961Y-4.1299
|
||||
X3.5059Y-4.248
|
||||
X3.5118Y-4.374
|
||||
X3.5039Y-3.7638
|
||||
X3.5157Y-3.6437
|
||||
X3.5197Y-5.1122
|
||||
X3.5217Y-4.0984
|
||||
X3.5433Y-3.7343
|
||||
X3.545Y-3.3
|
||||
X3.5453Y-3.7539
|
||||
X3.5453Y-4.2087
|
||||
X3.55Y-5.17
|
||||
X3.5551Y-5.0925
|
||||
X3.5591Y-4.3386
|
||||
X3.561Y-4.248
|
||||
X3.563Y-3.7697
|
||||
X3.5787Y-3.6457
|
||||
X3.5787Y-4.9724
|
||||
X3.5827Y-3.7343
|
||||
X3.5886Y-4.248
|
||||
X3.5906Y-4.3386
|
||||
X3.6043Y-4.2087
|
||||
X3.6063Y-3.6457
|
||||
X3.6102Y-3.7343
|
||||
X3.6201Y-4.9902
|
||||
X3.6201Y-5.1122
|
||||
X3.6398Y-4.4449
|
||||
X3.6437Y-5.0374
|
||||
X3.6437Y-5.0807
|
||||
X3.645Y-3.175
|
||||
X3.645Y-3.41
|
||||
X3.645Y-3.405
|
||||
X3.65Y-5.17
|
||||
X3.6673Y-4.874
|
||||
X3.6673Y-4.9646
|
||||
X3.6929Y-4.9193
|
||||
X3.7047Y-4.687
|
||||
X3.7067Y-4.6909
|
||||
X3.7205Y-5.1142
|
||||
X3.7402Y-5.0354
|
||||
X3.745Y-3.3
|
||||
X3.745Y-3.475
|
||||
X3.75Y-5.17
|
||||
X3.7746Y-4.687
|
||||
X3.7746Y-4.7461
|
||||
X3.7776Y-3.75
|
||||
X3.7854Y-4.4035
|
||||
X3.7894Y-4.374
|
||||
X3.7913Y-3.6457
|
||||
X3.7992Y-4.6437
|
||||
X3.7992Y-4.7303
|
||||
X3.7992Y-4.9646
|
||||
X3.7992Y-4.874
|
||||
X3.8071Y-3.7776
|
||||
X3.8169Y-3.7402
|
||||
X3.8248Y-4.7913
|
||||
X3.8268Y-3.815
|
||||
X3.8268Y-4.6417
|
||||
X3.8268Y-4.6437
|
||||
X3.8346Y-4.3386
|
||||
X3.8366Y-4.248
|
||||
X3.8366Y-4.9961
|
||||
X3.8445Y-4.7559
|
||||
X3.845Y-3.175
|
||||
X3.845Y-3.4
|
||||
X3.845Y-3.405
|
||||
X3.85Y-5.17
|
||||
X3.8504Y-4.2106
|
||||
X3.8543Y-3.6457
|
||||
|
|
@ -312,7 +305,7 @@ X3.8799Y-5.0413
|
|||
X3.8839Y-3.7362
|
||||
X3.8858Y-3.6457
|
||||
X3.9035Y-3.7913
|
||||
X3.9193Y-5.0531
|
||||
X3.9193Y-5.061
|
||||
X3.9213Y-4.0335
|
||||
X3.9213Y-4.0945
|
||||
X3.9232Y-3.7362
|
||||
|
|
@ -322,7 +315,8 @@ X3.9272Y-4.2264
|
|||
X3.9272Y-4.5217
|
||||
X3.939Y-3.6457
|
||||
X3.939Y-4.4449
|
||||
X3.945Y-3.3
|
||||
X3.945Y-3.305
|
||||
X3.945Y-3.475
|
||||
X3.95Y-5.17
|
||||
X3.9567Y-4.1142
|
||||
X3.9587Y-3.7756
|
||||
|
|
@ -334,7 +328,6 @@ X3.9587Y-3.9921
|
|||
X3.9587Y-4.0472
|
||||
X3.9587Y-4.0748
|
||||
X3.9764Y-4.3917
|
||||
X3.9803Y-3.5118
|
||||
X3.9823Y-3.6614
|
||||
X4.0197Y-5.1063
|
||||
X4.0256Y-4.3071
|
||||
|
|
@ -342,6 +335,8 @@ X4.0295Y-4.874
|
|||
X4.0295Y-4.9646
|
||||
X4.0354Y-4.6299
|
||||
X4.045Y-3.175
|
||||
X4.045Y-3.405
|
||||
X4.045Y-3.575
|
||||
X4.0492Y-3.7559
|
||||
X4.0492Y-3.7953
|
||||
X4.0492Y-3.8346
|
||||
|
|
@ -351,16 +346,17 @@ X4.0492Y-3.9528
|
|||
X4.0492Y-3.9921
|
||||
X4.0492Y-4.0453
|
||||
X4.0492Y-4.0768
|
||||
X4.0492Y-4.4626
|
||||
X4.05Y-5.17
|
||||
X4.0502Y-4.1398
|
||||
X4.0551Y-4.9193
|
||||
X4.061Y-5.0827
|
||||
X4.0669Y-4.3839
|
||||
X4.0689Y-4.687
|
||||
X4.065Y-4.4193
|
||||
X4.0689Y-4.6909
|
||||
X4.0846Y-4.1673
|
||||
X4.0925Y-4.5079
|
||||
X4.0945Y-4.2549
|
||||
X4.1063Y-3.5354
|
||||
X4.1024Y-4.3858
|
||||
X4.1024Y-4.4528
|
||||
X4.122Y-3.9449
|
||||
X4.124Y-4.0394
|
||||
X4.1358Y-3.8957
|
||||
|
|
@ -368,17 +364,22 @@ X4.1358Y-4.7461
|
|||
X4.1368Y-4.687
|
||||
X4.1417Y-5.0669
|
||||
X4.1437Y-4.3346
|
||||
X4.145Y-3.305
|
||||
X4.145Y-3.475
|
||||
X4.1496Y-4.3858
|
||||
X4.1496Y-4.4528
|
||||
X4.15Y-5.17
|
||||
X4.1594Y-3.8189
|
||||
X4.1614Y-4.6437
|
||||
X4.1614Y-4.7303
|
||||
X4.1614Y-4.874
|
||||
X4.1654Y-4.4272
|
||||
X4.1713Y-3.8189
|
||||
X4.1732Y-3.9488
|
||||
X4.187Y-4.6437
|
||||
X4.187Y-4.4193
|
||||
X4.187Y-4.7303
|
||||
X4.187Y-4.8445
|
||||
X4.189Y-4.6437
|
||||
X4.1929Y-4.1555
|
||||
X4.2028Y-3.8189
|
||||
X4.2067Y-3.9173
|
||||
X4.2087Y-4.9921
|
||||
X4.2106Y-3.8583
|
||||
|
|
@ -388,12 +389,13 @@ X4.2343Y-3.8228
|
|||
X4.2343Y-3.9587
|
||||
X4.2382Y-4.8445
|
||||
X4.245Y-3.175
|
||||
X4.245Y-3.405
|
||||
X4.245Y-3.575
|
||||
X4.25Y-5.17
|
||||
X4.2539Y-4.1083
|
||||
X4.2559Y-4.2697
|
||||
X4.2598Y-3.8484
|
||||
X4.2638Y-4.874
|
||||
X4.2736Y-3.6024
|
||||
X4.2854Y-3.9587
|
||||
X4.2874Y-4.4646
|
||||
X4.2874Y-4.9921
|
||||
|
|
@ -403,7 +405,6 @@ X4.2894Y-4.3012
|
|||
X4.2894Y-4.4114
|
||||
X4.2894Y-4.8445
|
||||
X4.3071Y-3.9252
|
||||
X4.3091Y-4.7835
|
||||
X4.3189Y-4.1634
|
||||
X4.3189Y-4.2028
|
||||
X4.3189Y-4.3366
|
||||
|
|
@ -412,28 +413,27 @@ X4.3228Y-3.7598
|
|||
X4.3287Y-4.1201
|
||||
X4.3287Y-4.25
|
||||
X4.3346Y-5.0571
|
||||
X4.3406Y-4.9626
|
||||
X4.3406Y-4.9646
|
||||
X4.345Y-3.305
|
||||
X4.345Y-3.475
|
||||
X4.35Y-5.17
|
||||
X4.3543Y-4.7776
|
||||
X4.3602Y-3.7972
|
||||
X4.3661Y-3.9291
|
||||
X4.3661Y-4.876
|
||||
X4.3858Y-4.9626
|
||||
X4.3917Y-4.874
|
||||
X4.3917Y-4.9646
|
||||
X4.3996Y-3.6417
|
||||
X4.3996Y-4.0571
|
||||
X4.3996Y-4.1201
|
||||
X4.3996Y-4.3091
|
||||
X4.3996Y-4.4035
|
||||
X4.3996Y-4.4665
|
||||
X4.3996Y-4.7776
|
||||
X4.4173Y-4.9193
|
||||
X4.4331Y-4.7579
|
||||
X4.4449Y-4.4902
|
||||
X4.445Y-3.175
|
||||
X4.445Y-3.375
|
||||
X4.445Y-3.405
|
||||
X4.45Y-5.17
|
||||
X4.4547Y-5.0374
|
||||
X4.4646Y-4.7283
|
||||
X4.455Y-4.875
|
||||
X4.4902Y-3.6476
|
||||
X4.4902Y-3.7106
|
||||
X4.4902Y-3.7736
|
||||
|
|
@ -446,8 +446,7 @@ X4.4902Y-4.2146
|
|||
X4.4902Y-4.3091
|
||||
X4.4902Y-4.4035
|
||||
X4.4902Y-4.4665
|
||||
X4.4961Y-4.4961
|
||||
X4.5Y-4.7185
|
||||
X4.5039Y-4.7638
|
||||
X4.5157Y-3.6791
|
||||
X4.5157Y-3.7421
|
||||
X4.5157Y-3.8051
|
||||
|
|
@ -461,24 +460,23 @@ X4.5177Y-4.2815
|
|||
X4.5177Y-4.3366
|
||||
X4.5177Y-4.376
|
||||
X4.5177Y-4.435
|
||||
X4.5295Y-4.8307
|
||||
X4.5335Y-4.6909
|
||||
X4.5433Y-4.7638
|
||||
X4.545Y-3.275
|
||||
X4.5276Y-4.7283
|
||||
X4.545Y-3.305
|
||||
X4.545Y-3.475
|
||||
X4.55Y-5.17
|
||||
X4.5669Y-4.7283
|
||||
X4.6004Y-4.6437
|
||||
X4.6004Y-4.6909
|
||||
X4.6063Y-4.5
|
||||
X4.6181Y-4.7283
|
||||
X4.555Y-4.675
|
||||
X4.5787Y-4.7283
|
||||
X4.5906Y-4.937
|
||||
X4.6004Y-4.8307
|
||||
X4.6043Y-4.7835
|
||||
X4.624Y-4.0571
|
||||
X4.6299Y-4.937
|
||||
X4.6398Y-4.8307
|
||||
X4.6378Y-4.7461
|
||||
X4.6378Y-4.8681
|
||||
X4.645Y-3.175
|
||||
X4.645Y-3.375
|
||||
X4.645Y-3.405
|
||||
X4.645Y-3.575
|
||||
X4.645Y-4.575
|
||||
X4.65Y-5.17
|
||||
X4.6535Y-4.7638
|
||||
X4.6713Y-4.1201
|
||||
X4.6713Y-4.1673
|
||||
X4.6713Y-4.2146
|
||||
|
|
@ -487,26 +485,15 @@ X4.6713Y-4.3091
|
|||
X4.6713Y-4.3563
|
||||
X4.6713Y-4.4035
|
||||
X4.6713Y-4.4665
|
||||
X4.6732Y-4.685
|
||||
X4.6772Y-4.7283
|
||||
X4.7067Y-4.6535
|
||||
X4.6713Y-4.7835
|
||||
X4.6713Y-4.8307
|
||||
X4.7185Y-4.0571
|
||||
X4.7283Y-4.7283
|
||||
X4.7402Y-4.9252
|
||||
X4.745Y-3.275
|
||||
X4.745Y-3.475
|
||||
X4.75Y-4.8307
|
||||
X4.745Y-4.675
|
||||
X4.745Y-4.875
|
||||
X4.75Y-5.17
|
||||
X4.7539Y-4.6437
|
||||
X4.7539Y-4.6909
|
||||
X4.7638Y-4.7638
|
||||
X4.7874Y-4.7283
|
||||
X4.7925Y-5.05
|
||||
X4.8Y-5.165
|
||||
X4.8012Y-3.6791
|
||||
X4.8031Y-4.5315
|
||||
X4.8209Y-4.6437
|
||||
X4.8209Y-4.6909
|
||||
X4.8248Y-4.0886
|
||||
X4.8248Y-4.1476
|
||||
X4.8248Y-4.187
|
||||
|
|
@ -515,17 +502,16 @@ X4.8248Y-4.2815
|
|||
X4.8248Y-4.3366
|
||||
X4.8248Y-4.376
|
||||
X4.8248Y-4.435
|
||||
X4.8248Y-5.0728
|
||||
X4.8268Y-3.7106
|
||||
X4.8268Y-3.7736
|
||||
X4.8268Y-3.8366
|
||||
X4.8268Y-3.8996
|
||||
X4.8268Y-3.9626
|
||||
X4.8268Y-4.0256
|
||||
X4.8386Y-4.7283
|
||||
X4.8445Y-4.5079
|
||||
X4.845Y-3.175
|
||||
X4.845Y-3.375
|
||||
X4.845Y-4.775
|
||||
X4.845Y-4.975
|
||||
X4.85Y-5.17
|
||||
X4.8524Y-3.6476
|
||||
X4.8524Y-3.7421
|
||||
|
|
@ -539,14 +525,8 @@ X4.8524Y-4.2146
|
|||
X4.8524Y-4.3091
|
||||
X4.8524Y-4.4035
|
||||
X4.8524Y-4.4665
|
||||
X4.8602Y-4.8307
|
||||
X4.8661Y-5.0256
|
||||
X4.874Y-4.7638
|
||||
X4.8976Y-3.6201
|
||||
X4.8976Y-4.4902
|
||||
X4.8976Y-4.7283
|
||||
X4.9291Y-4.5374
|
||||
X4.9331Y-4.9843
|
||||
X4.9429Y-3.6476
|
||||
X4.9429Y-4.0571
|
||||
X4.9429Y-4.1201
|
||||
|
|
@ -556,111 +536,136 @@ X4.9429Y-4.4508
|
|||
X4.9449Y-3.7067
|
||||
X4.945Y-3.275
|
||||
X4.945Y-3.475
|
||||
X4.9488Y-4.7283
|
||||
X4.945Y-4.675
|
||||
X4.945Y-4.875
|
||||
X4.945Y-5.075
|
||||
X4.95Y-5.17
|
||||
X4.9606Y-4.9232
|
||||
X4.9705Y-4.3701
|
||||
X4.9705Y-4.8307
|
||||
X4.9744Y-4.6437
|
||||
X4.9744Y-4.6909
|
||||
X4.9783Y-3.6161
|
||||
X4.9783Y-4.1496
|
||||
X4.9783Y-4.1811
|
||||
X4.9823Y-4.7579
|
||||
X5.0039Y-3.878
|
||||
X5.0079Y-4.7283
|
||||
X5.0079Y-4.9508
|
||||
X5.0079Y-4.9508
|
||||
X5.0118Y-4.4626
|
||||
X5.0295Y-5.0512
|
||||
X5.0315Y-4.3406
|
||||
X5.0413Y-4.6437
|
||||
X5.0413Y-4.6909
|
||||
X5.045Y-3.175
|
||||
X5.045Y-3.375
|
||||
X5.0453Y-4.9409
|
||||
X5.0453Y-4.9843
|
||||
X5.045Y-3.575
|
||||
X5.045Y-3.775
|
||||
X5.045Y-3.975
|
||||
X5.045Y-4.575
|
||||
X5.045Y-4.775
|
||||
X5.045Y-4.975
|
||||
X5.05Y-5.17
|
||||
X5.0591Y-4.7283
|
||||
X5.0728Y-4.3996
|
||||
X5.0768Y-3.628
|
||||
X5.0768Y-4.5354
|
||||
X5.0807Y-4.8287
|
||||
X5.1004Y-4.8091
|
||||
X5.1043Y-4.9469
|
||||
X5.1201Y-3.6634
|
||||
X5.1201Y-4.8583
|
||||
X5.1417Y-5.0512
|
||||
X5.145Y-3.275
|
||||
X5.145Y-3.475
|
||||
X5.145Y-3.675
|
||||
X5.145Y-3.875
|
||||
X5.145Y-4.475
|
||||
X5.145Y-4.675
|
||||
X5.145Y-5.075
|
||||
X5.15Y-5.17
|
||||
X5.1575Y-4.9823
|
||||
X5.1594Y-4.8701
|
||||
X5.1614Y-4.2224
|
||||
X5.1654Y-3.7106
|
||||
X5.1811Y-4.9488
|
||||
X5.189Y-4.4075
|
||||
X5.2343Y-4.9508
|
||||
X5.2Y-5.165
|
||||
X5.245Y-3.175
|
||||
X5.245Y-3.375
|
||||
X5.245Y-3.575
|
||||
X5.245Y-3.775
|
||||
X5.245Y-3.975
|
||||
X5.245Y-4.575
|
||||
X5.25Y-5.17
|
||||
X5.2539Y-5.0512
|
||||
X5.275Y-4.41
|
||||
X5.2776Y-4.9626
|
||||
X5.2835Y-5.0039
|
||||
X5.3031Y-4.8425
|
||||
X5.325Y-4.565
|
||||
X5.3Y-5.165
|
||||
X5.3Y-5.165
|
||||
X5.32Y-3.58
|
||||
X5.32Y-3.97
|
||||
X5.345Y-3.275
|
||||
X5.345Y-3.475
|
||||
X5.345Y-3.675
|
||||
X5.345Y-3.875
|
||||
X5.345Y-4.475
|
||||
X5.345Y-4.675
|
||||
X5.35Y-5.17
|
||||
X5.3524Y-4.8425
|
||||
X5.372Y-4.2264
|
||||
X5.372Y-4.3484
|
||||
X5.4055Y-4.2579
|
||||
X5.4055Y-4.3169
|
||||
X5.439Y-4.9665
|
||||
X5.37Y-3.58
|
||||
X5.37Y-3.97
|
||||
X5.445Y-3.175
|
||||
X5.445Y-3.375
|
||||
X5.445Y-3.575
|
||||
X5.445Y-3.775
|
||||
X5.445Y-3.975
|
||||
X5.445Y-4.575
|
||||
X5.445Y-4.775
|
||||
X5.45Y-5.17
|
||||
X5.4744Y-4.2539
|
||||
X5.545Y-3.475
|
||||
X5.5551Y-4.8504
|
||||
X5.5846Y-4.4114
|
||||
X5.545Y-3.675
|
||||
X5.545Y-3.875
|
||||
X5.545Y-4.475
|
||||
X5.545Y-4.675
|
||||
X5.63Y-3.175
|
||||
X5.63Y-5.17
|
||||
X5.645Y-3.375
|
||||
X5.647Y-3.7337
|
||||
X5.647Y-3.9376
|
||||
X5.6476Y-4.0335
|
||||
X5.685Y-4.0768
|
||||
X5.685Y-4.1555
|
||||
X5.645Y-3.575
|
||||
X5.645Y-3.775
|
||||
X5.645Y-3.975
|
||||
X5.645Y-4.175
|
||||
X5.645Y-4.575
|
||||
X5.645Y-4.775
|
||||
X5.7Y-3.245
|
||||
X5.7Y-3.475
|
||||
X5.7Y-3.675
|
||||
X5.7Y-3.875
|
||||
X5.7Y-4.075
|
||||
X5.7Y-4.275
|
||||
X5.7Y-4.475
|
||||
X5.7Y-4.475
|
||||
X5.7Y-4.675
|
||||
X5.7Y-4.875
|
||||
X5.7Y-5.1
|
||||
T2
|
||||
X2.9803Y-4.6929
|
||||
X2.9803Y-4.7402
|
||||
X3.0157Y-4.6535
|
||||
X3.0157Y-4.7795
|
||||
X3.3425Y-4.7402
|
||||
X3.378Y-4.7795
|
||||
X3.4862Y-3.6102
|
||||
X3.5118Y-4.374
|
||||
X3.5256Y-3.5748
|
||||
X3.5512Y-4.4094
|
||||
X3.5728Y-3.5748
|
||||
X3.5984Y-4.4094
|
||||
X3.6378Y-4.374
|
||||
X3.7047Y-4.7402
|
||||
X3.7402Y-4.7795
|
||||
X3.7618Y-3.6102
|
||||
X3.7874Y-4.374
|
||||
X3.8012Y-3.5748
|
||||
X3.8268Y-4.4094
|
||||
X3.8484Y-3.5748
|
||||
X3.874Y-4.4094
|
||||
X3.8878Y-3.6102
|
||||
X3.9134Y-4.374
|
||||
X4.0669Y-4.7402
|
||||
X4.1024Y-4.7795
|
||||
X4.1201Y-4.1358
|
||||
X4.3622Y-4.0335
|
||||
X4.4114Y-3.5728
|
||||
X4.4114Y-4.5413
|
||||
X4.4449Y-3.6201
|
||||
X5.1398Y-4.4075
|
||||
X5.14Y-4.5225
|
||||
X5.2874Y-4.7146
|
||||
X5.2894Y-4.5945
|
||||
X5.3346Y-4.2579
|
||||
X5.3346Y-4.315
|
||||
X5.3346Y-4.372
|
||||
X5.365Y-4.5425
|
||||
X5.3652Y-4.4065
|
||||
X5.5157Y-4.5945
|
||||
X5.5157Y-4.7126
|
||||
X5.5463Y-4.6545
|
||||
X4.4508Y-3.5374
|
||||
X4.4508Y-4.5768
|
||||
X4.498Y-3.5374
|
||||
X4.498Y-3.6083
|
||||
X4.498Y-4.5059
|
||||
X4.498Y-4.5768
|
||||
X4.5374Y-3.5728
|
||||
X4.5374Y-4.5413
|
||||
X4.8051Y-3.5728
|
||||
X4.8051Y-4.5413
|
||||
X4.8445Y-3.5374
|
||||
X4.8445Y-3.6083
|
||||
X4.8445Y-4.5059
|
||||
X4.8445Y-4.5768
|
||||
X4.8917Y-3.5374
|
||||
X4.8917Y-4.5768
|
||||
X4.9311Y-3.5728
|
||||
X4.9311Y-4.5413
|
||||
X4.9783Y-3.6142
|
||||
X4.9783Y-4.1496
|
||||
X4.9783Y-4.1811
|
||||
X4.9783Y-4.3701
|
||||
X5.0138Y-4.4094
|
||||
X5.0138Y-4.4567
|
||||
T3
|
||||
X4.9783Y-4.311
|
||||
X5.0177Y-4.0669
|
||||
|
|
@ -668,34 +673,14 @@ X5.0177Y-4.1063
|
|||
T4
|
||||
X2.89Y-5.06
|
||||
X2.935Y-5.1
|
||||
X2.9764Y-4.7461
|
||||
X3.0Y-5.1
|
||||
X3.0157Y-4.6496
|
||||
X3.045Y-5.05
|
||||
X3.378Y-4.6496
|
||||
X3.4823Y-3.6102
|
||||
X3.5197Y-3.5709
|
||||
X3.5453Y-4.4134
|
||||
X3.5787Y-3.5709
|
||||
X3.6043Y-4.4134
|
||||
X3.7008Y-4.7461
|
||||
X3.7402Y-4.6496
|
||||
X3.7402Y-4.7835
|
||||
X3.7953Y-3.5709
|
||||
X3.8209Y-4.4134
|
||||
X3.8543Y-3.5709
|
||||
X3.8799Y-4.4134
|
||||
X3.8878Y-3.5118
|
||||
X3.8917Y-3.6102
|
||||
X3.9193Y-4.374
|
||||
X3.937Y-3.5531
|
||||
X4.063Y-4.7461
|
||||
X4.0846Y-4.0394
|
||||
X4.1024Y-4.6496
|
||||
X4.1024Y-4.7835
|
||||
X4.124Y-4.002
|
||||
X4.124Y-4.0768
|
||||
X4.124Y-4.1417
|
||||
X4.3091Y-4.0689
|
||||
X4.3642Y-4.1575
|
||||
X4.3642Y-4.2126
|
||||
|
|
@ -705,6 +690,7 @@ X4.545Y-5.1
|
|||
X4.61Y-5.1
|
||||
X4.69Y-5.1
|
||||
X4.755Y-5.1
|
||||
X4.7975Y-5.05
|
||||
X4.9783Y-3.7441
|
||||
X4.9783Y-4.0197
|
||||
X4.9783Y-4.5
|
||||
|
|
@ -712,40 +698,29 @@ X5.0177Y-3.6575
|
|||
X5.0177Y-3.6969
|
||||
X5.0177Y-4.2244
|
||||
X5.0177Y-4.2638
|
||||
X5.1358Y-3.8228
|
||||
X5.1358Y-3.9213
|
||||
X5.1614Y-4.1319
|
||||
X5.1614Y-4.1791
|
||||
X5.187Y-3.7736
|
||||
X5.187Y-3.872
|
||||
X5.187Y-3.9705
|
||||
X5.2106Y-4.0807
|
||||
X5.2343Y-3.7736
|
||||
X5.2343Y-3.872
|
||||
X5.2343Y-3.9705
|
||||
X5.2598Y-4.1319
|
||||
X5.2598Y-4.1791
|
||||
X5.2854Y-3.7264
|
||||
X5.2854Y-3.8228
|
||||
X5.2854Y-3.9213
|
||||
X5.0846Y-4.8563
|
||||
X5.0846Y-4.9154
|
||||
X5.1319Y-4.815
|
||||
X5.1319Y-4.9646
|
||||
X5.1791Y-4.8642
|
||||
X5.1791Y-4.9154
|
||||
X5.2264Y-4.815
|
||||
X5.2264Y-4.9646
|
||||
X5.2756Y-4.8622
|
||||
X5.2756Y-4.9173
|
||||
X5.29Y-5.05
|
||||
X5.3091Y-4.0807
|
||||
X5.3228Y-4.815
|
||||
X5.3228Y-4.9626
|
||||
X5.335Y-5.0
|
||||
X5.335Y-5.1
|
||||
X5.3583Y-4.1181
|
||||
X5.3583Y-4.1929
|
||||
X5.4Y-5.0
|
||||
X5.445Y-5.05
|
||||
X5.6004Y-3.6102
|
||||
X5.6476Y-4.2047
|
||||
X5.6496Y-3.6516
|
||||
X5.4685Y-4.8602
|
||||
X5.5157Y-4.815
|
||||
X5.563Y-4.8642
|
||||
T5
|
||||
X5.3248Y-3.9783
|
||||
X5.4Y-5.11
|
||||
X5.4094Y-4.0551
|
||||
X5.4941Y-3.9783
|
||||
X5.6594Y-3.8209
|
||||
T7
|
||||
T6
|
||||
X2.425Y-3.86
|
||||
X2.425Y-3.96
|
||||
X2.425Y-4.06
|
||||
|
|
@ -756,22 +731,22 @@ X2.525Y-3.96
|
|||
X2.525Y-4.06
|
||||
X2.525Y-4.16
|
||||
X2.525Y-4.26
|
||||
T8
|
||||
T7
|
||||
X5.53Y-5.1
|
||||
T8
|
||||
X2.365Y-4.695
|
||||
X2.665Y-4.655
|
||||
X2.665Y-4.735
|
||||
X2.365Y-4.695
|
||||
X2.665Y-4.655
|
||||
X2.665Y-4.735
|
||||
T9
|
||||
X2.365Y-4.695
|
||||
X2.665Y-4.655
|
||||
X2.665Y-4.735
|
||||
X2.365Y-4.695
|
||||
X2.665Y-4.655
|
||||
X2.665Y-4.735
|
||||
T10
|
||||
X1.895Y-3.785
|
||||
X2.245Y-3.335
|
||||
X5.63Y-5.0
|
||||
X1.895Y-5.0
|
||||
X2.245Y-3.335
|
||||
X5.53Y-3.245
|
||||
T11
|
||||
X5.63Y-5.0
|
||||
X1.895Y-3.785
|
||||
T10
|
||||
X2.365Y-4.595
|
||||
X2.365Y-4.795
|
||||
X2.59Y-4.595
|
||||
|
|
@ -780,21 +755,5 @@ X2.365Y-4.595
|
|||
X2.365Y-4.795
|
||||
X2.59Y-4.595
|
||||
X2.59Y-4.795
|
||||
T6
|
||||
G00X4.0472Y-3.4567
|
||||
M15
|
||||
G01X4.0472Y-3.3543
|
||||
M16
|
||||
G05
|
||||
G00X4.1969Y-3.2165
|
||||
M15
|
||||
G01X4.0945Y-3.2165
|
||||
M16
|
||||
G05
|
||||
G00X4.2835Y-3.4567
|
||||
M15
|
||||
G01X4.2835Y-3.3543
|
||||
M16
|
||||
G05
|
||||
T0
|
||||
M30
|
||||
|
|
|
|||
Loading…
Reference in New Issue