RAM2E/CPLD/MAXII/output_files/RAM2E.map.summary

Analysis & Synthesis Status : Successful - Wed Jan 31 09:41:31 2024
Quartus Prime Version : 19.1.0 Build 670 09/22/2019 Patches 0.02std SJ Lite Edition
Revision Name : RAM2E
Top-level Entity Name : RAM2E
Family : MAX II
Total logic elements : 252
Total pins : 70
Total virtual pins : 0
UFM blocks : 1 / 1 ( 100 % )
change nVOE to be solely falling-edge register output 2024-01-31 14:44:04 +00:00			`Analysis & Synthesis Status : Successful - Wed Jan 31 09:41:31 2024`
RC 2023-12-29 04:12:12 +00:00			`Quartus Prime Version : 19.1.0 Build 670 09/22/2019 Patches 0.02std SJ Lite Edition`
RC 2023-09-21 09:45:21 +00:00			`Revision Name : RAM2E`
			`Top-level Entity Name : RAM2E`
			`Family : MAX II`
RC 2024-01-16 19:31:03 +00:00			`Total logic elements : 252`
Revert "As sent to testers" This reverts commit aa65c256270fe6ff4ce89bd299c66a1d149a4454. 2023-12-18 11:29:13 +00:00			`Total pins : 70`
RC 2023-09-21 09:45:21 +00:00			`Total virtual pins : 0`
			`UFM blocks : 1 / 1 ( 100 % )`