2023-09-21 09:45:45 +00:00
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<HEAD><TITLE>I/O Timing Report</TITLE>
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<PRE><A name="Top"></A><B><U><big>I/O Timing Report</big></U></B>
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Loading design for application iotiming from file ram2gs_lcmxo2_1200hc_impl1.ncd.
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Design name: RAM2GS
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NCD version: 3.3
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Vendor: LATTICE
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Device: LCMXO2-1200HC
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Package: TQFP100
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Performance: 5
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Package Status: Final Version 1.44.
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Performance Hardware Data Status: Final Version 34.4.
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Loading design for application iotiming from file ram2gs_lcmxo2_1200hc_impl1.ncd.
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Design name: RAM2GS
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NCD version: 3.3
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Vendor: LATTICE
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Device: LCMXO2-1200HC
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Package: TQFP100
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Performance: 6
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Package Status: Final Version 1.44.
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Performance Hardware Data Status: Final Version 34.4.
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Loading design for application iotiming from file ram2gs_lcmxo2_1200hc_impl1.ncd.
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Design name: RAM2GS
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NCD version: 3.3
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Vendor: LATTICE
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Device: LCMXO2-1200HC
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Package: TQFP100
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Performance: M
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Package Status: Final Version 1.44.
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Performance Hardware Data Status: Final Version 34.4.
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// Design: RAM2GS
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// Package: TQFP100
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// ncd File: ram2gs_lcmxo2_1200hc_impl1.ncd
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// Version: Diamond (64-bit) 3.12.1.454
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2024-01-07 02:52:05 +00:00
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// Written on Sat Nov 18 02:06:17 2023
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2023-09-21 09:45:45 +00:00
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// M: Minimum Performance Grade
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// iotiming RAM2GS_LCMXO2_1200HC_impl1.ncd RAM2GS_LCMXO2_1200HC_impl1.prf -gui -msgset //Mac/iCloud/Repos/RAM2GS/CPLD/LCMXO2-1200HC/promote.xml
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I/O Timing Report (All units are in ns)
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Worst Case Results across Performance Grades (M, 6, 5, 4):
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// Input Setup and Hold Times
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Port Clock Edge Setup Performance_Grade Hold Performance_Grade
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----------------------------------------------------------------------
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2024-01-07 02:52:05 +00:00
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CROW[0] nCRAS F 3.288 4 -0.390 M
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CROW[1] nCRAS F 2.823 4 -0.285 M
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Din[0] PHI2 F 6.398 4 4.293 4
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Din[0] nCCAS F 1.411 4 -0.004 M
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Din[1] PHI2 F 3.916 4 4.173 4
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Din[1] nCCAS F 1.877 4 -0.123 M
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Din[2] PHI2 F 6.180 4 4.173 4
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Din[2] nCCAS F 1.548 4 -0.062 M
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Din[3] PHI2 F 5.536 4 4.173 4
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Din[3] nCCAS F 0.467 4 0.734 4
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Din[4] PHI2 F 3.611 4 4.173 4
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Din[4] nCCAS F 1.533 4 -0.043 M
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Din[5] PHI2 F 5.673 4 4.173 4
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Din[5] nCCAS F 1.663 4 -0.072 M
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Din[6] PHI2 F 5.355 4 4.293 4
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Din[6] nCCAS F 2.807 4 -0.352 M
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Din[7] PHI2 F 5.296 4 4.293 4
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Din[7] nCCAS F 1.914 4 -0.136 M
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MAin[0] PHI2 F 4.091 4 1.414 4
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MAin[0] nCRAS F 1.207 4 0.347 4
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MAin[1] PHI2 F 3.273 4 1.759 4
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MAin[1] nCRAS F 1.077 4 0.460 4
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MAin[2] PHI2 F 8.126 4 -0.351 M
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MAin[2] nCRAS F 0.671 4 0.850 4
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MAin[3] PHI2 F 8.831 4 -0.579 M
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MAin[3] nCRAS F 1.100 4 0.463 4
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MAin[4] PHI2 F 8.415 4 -0.447 M
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MAin[4] nCRAS F 1.390 4 0.207 4
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MAin[5] PHI2 F 9.742 4 -0.803 M
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MAin[5] nCRAS F 1.269 4 0.218 4
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MAin[6] PHI2 F 7.970 4 -0.325 M
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MAin[6] nCRAS F 1.165 4 0.337 4
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MAin[7] PHI2 F 8.481 4 -0.438 M
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MAin[7] nCRAS F 0.761 4 0.673 4
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MAin[8] nCRAS F 1.261 4 0.223 4
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MAin[9] nCRAS F 0.756 4 0.667 4
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2023-09-21 09:45:45 +00:00
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PHI2 RCLK R -0.133 M 2.360 4
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2024-01-07 02:52:05 +00:00
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nCCAS RCLK R 4.128 4 -0.675 M
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nCCAS nCRAS F 4.568 4 -0.666 M
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nCRAS RCLK R 3.070 4 -0.412 M
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nFWE PHI2 F 8.979 4 -0.603 M
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nFWE nCRAS F 1.467 4 0.144 4
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2023-09-21 09:45:45 +00:00
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// Clock to Output Delay
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2023-11-03 08:26:41 +00:00
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Port Clock Edge Max_Delay Performance_Grade Min_Delay Performance_Grade
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2023-09-21 09:45:45 +00:00
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------------------------------------------------------------------------
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2024-01-07 02:52:05 +00:00
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LED RCLK R 11.034 4 3.119 M
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LED nCRAS F 11.531 4 3.339 M
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RA[0] RCLK R 11.682 4 3.586 M
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RA[0] nCRAS F 11.704 4 3.483 M
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2023-11-03 08:26:41 +00:00
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RA[10] RCLK R 7.888 4 2.711 M
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RA[11] PHI2 R 9.755 4 3.200 M
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2024-01-07 02:52:05 +00:00
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RA[1] RCLK R 11.454 4 3.535 M
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RA[1] nCRAS F 11.216 4 3.347 M
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RA[2] RCLK R 12.084 4 3.693 M
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RA[2] nCRAS F 11.742 4 3.501 M
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RA[3] RCLK R 12.131 4 3.715 M
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RA[3] nCRAS F 11.857 4 3.533 M
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RA[4] RCLK R 11.966 4 3.684 M
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RA[4] nCRAS F 12.319 4 3.650 M
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RA[5] RCLK R 11.928 4 3.670 M
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RA[5] nCRAS F 11.637 4 3.446 M
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RA[6] RCLK R 11.419 4 3.523 M
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RA[6] nCRAS F 11.718 4 3.486 M
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RA[7] RCLK R 11.988 4 3.651 M
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RA[7] nCRAS F 12.274 4 3.636 M
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RA[8] RCLK R 11.660 4 3.582 M
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RA[8] nCRAS F 11.098 4 3.343 M
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RA[9] RCLK R 11.454 4 3.547 M
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RA[9] nCRAS F 11.134 4 3.314 M
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RBA[0] nCRAS F 8.903 4 2.891 M
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RBA[1] nCRAS F 8.883 4 2.898 M
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RCKE RCLK R 9.774 4 3.159 M
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RCLKout RCLK R 7.101 4 2.108 M
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RDQMH RCLK R 10.733 4 3.351 M
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RDQML RCLK R 10.683 4 3.364 M
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RD[0] nCCAS F 8.977 4 3.012 M
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RD[1] nCCAS F 8.977 4 3.012 M
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RD[2] nCCAS F 8.977 4 3.012 M
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RD[3] nCCAS F 8.977 4 3.012 M
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RD[4] nCCAS F 8.977 4 3.012 M
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RD[5] nCCAS F 8.977 4 3.012 M
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RD[6] nCCAS F 8.977 4 3.012 M
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RD[7] nCCAS F 8.977 4 3.012 M
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2023-11-03 08:26:41 +00:00
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nRCAS RCLK R 7.822 4 2.706 M
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nRCS RCLK R 7.822 4 2.706 M
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nRRAS RCLK R 7.822 4 2.706 M
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nRWE RCLK R 7.803 4 2.713 M
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2023-09-21 09:45:45 +00:00
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WARNING: you must also run trce with hold speed: 4
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WARNING: you must also run trce with setup speed: M
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