RAM2GS/CPLD/MAXV/output_files/RAM2GS.jdi

<sld_project_info>
  <project>
    <hash md5_digest_80b="6f67c733e1b5b7f6e875"/>
  </project>
  <file_info>
    <file device="5M240ZT100C5" path="RAM2GS.sof" usercode="0xFFFFFFFF"/>
  </file_info>
</sld_project_info>
MAX, MachXO, MachXO2 working 2023-08-20 07:10:11 -04:00			`<sld_project_info>`
			`<project>`
SPI/LCMXO RC 2024-01-06 21:52:05 -05:00			`<hash md5_digest_80b="6f67c733e1b5b7f6e875"/>`
MAX, MachXO, MachXO2 working 2023-08-20 07:10:11 -04:00			`</project>`
			`<file_info>`
RC 2023-09-21 05:45:45 -04:00			`<file device="5M240ZT100C5" path="RAM2GS.sof" usercode="0xFFFFFFFF"/>`
MAX, MachXO, MachXO2 working 2023-08-20 07:10:11 -04:00			`</file_info>`
			`</sld_project_info>`