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Merge pull request #1 from a2-4am/patch-1 

fix register confusion if interleave=0
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Peter Ferrie 2023-08-30 16:39:27 -07:00 committed by GitHub
parent 017a7b214b a41a656906
commit b751af7746
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@ -225,6 +225,8 @@ read
!if interleave=1 { !if interleave=1 {
tax tax
ldy $100, x ldy $100, x
} else {
tay
} }
sty <(sector+1) ;store index for later sty <(sector+1) ;store index for later
ldx <addrtbl, y ;fetch corresponding address ldx <addrtbl, y ;fetch corresponding address