4am
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173841dedd
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construct half block fizzle data at runtime
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2020-11-30 22:07:48 -05:00 |
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4am
|
8a4792a5b0
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construct half block fizzle data at runtime
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2020-11-30 21:58:42 -05:00 |
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4am
|
d253388c9d
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construct block fizzle data at runtime
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2020-11-30 18:22:06 -05:00 |
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4am
|
3e504a80d8
|
shave some bytes
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2020-11-30 14:55:10 -05:00 |
|
4am
|
22b40e9d11
|
shave a byte
|
2020-11-30 11:44:31 -05:00 |
|
4am
|
d9b8e3ea7b
|
shave some cycles
|
2020-11-30 11:40:41 -05:00 |
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4am
|
3fadbfb949
|
typo in comment
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2020-11-30 01:35:10 -05:00 |
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4am
|
1a3ec941f6
|
not sure how that ever worked
|
2020-11-30 01:21:40 -05:00 |
|
4am
|
da91eb3a27
|
add 48boxes sync+clear effect
|
2020-11-30 01:13:27 -05:00 |
|
4am
|
1ffd7a7dd1
|
add 48boxes spiral+clear effect
|
2020-11-30 01:02:28 -05:00 |
|
4am
|
3004ecf6ee
|
add DHGR 48boxes effects
|
2020-11-29 23:10:44 -05:00 |
|
4am
|
3311e3c785
|
add missing include
|
2020-11-26 19:58:20 -05:00 |
|
Peter Ferrie
|
cf3bf1ca01
|
bank in ROM at the right time
|
2020-11-25 18:54:10 -08:00 |
|
Peter Ferrie
|
3936ef734b
|
generate CRYSTAL data at runtime
|
2020-11-25 14:52:59 -08:00 |
|
4am
|
0fc86a65be
|
shave some bytes
|
2020-11-24 21:25:41 -05:00 |
|
4am
|
96508fb725
|
shave some bytes
|
2020-11-24 21:18:55 -05:00 |
|
4am
|
ba8559c3cf
|
remove unused code
|
2020-11-24 21:18:29 -05:00 |
|
4am
|
8d1d9c0bc5
|
don't clobber ProDOS shim, that's rude
|
2020-11-24 21:02:14 -05:00 |
|
Peter Ferrie
|
83f7e02279
|
force main-memory reads in LoadFileDirect
|
2020-11-24 16:49:02 -08:00 |
|
4am
|
419f171290
|
fix filename
|
2020-11-24 14:44:36 -05:00 |
|
Peter Ferrie
|
c0ee863dba
|
Aztec prelaunch
|
2020-11-23 21:45:55 -08:00 |
|
Peter Ferrie
|
1e7400e956
|
better-behaving Aztec
|
2020-11-23 21:34:49 -08:00 |
|
4am
|
ee06325830
|
new and upgraded DHGR effects
|
2020-11-23 19:05:51 -05:00 |
|
4am
|
56542020d0
|
upgrade DHGR radial effects
|
2020-11-23 18:08:31 -05:00 |
|
4am
|
63870a0bc8
|
shave some cycles (skip if copymask=0, fake bit 3)
|
2020-11-23 12:46:25 -05:00 |
|
4am
|
d0745e7941
|
shave some cycles (load X directly)
|
2020-11-23 12:23:54 -05:00 |
|
4am
|
a5807e8577
|
shave some cycles (load X directly)
|
2020-11-23 12:21:37 -05:00 |
|
4am
|
756e9623c3
|
shave some bytes
|
2020-11-22 22:12:37 -05:00 |
|
4am
|
395498cfb5
|
shave some cycles (better bankloop handling)
|
2020-11-22 22:09:23 -05:00 |
|
4am
|
b7643d2f98
|
shave some cycles (save/restore Y instead of recomputing)
|
2020-11-22 22:03:22 -05:00 |
|
4am
|
d97e22805f
|
shave some cycles (split aux branch, use 80STORE mode for 1-STA bank switching) [thanks John B.]
|
2020-11-22 21:46:22 -05:00 |
|
4am
|
a3dc564852
|
shave some cycles (use 80STORE mode for 1-STA bank switching) [thanks John B.]
|
2020-11-22 21:12:40 -05:00 |
|
4am
|
fd4cd16936
|
shave some bytes
|
2020-11-22 18:58:07 -05:00 |
|
4am
|
4a60b564fb
|
several new and updated DHGR precomputed effects
|
2020-11-22 18:32:19 -05:00 |
|
4am
|
4d2ea22158
|
shave some cycles (split auxmem LFSR to reduce bank switches)
|
2020-11-22 01:10:10 -05:00 |
|
4am
|
7ce75c9092
|
shave some cycles (front load end-of-loop comparisons)
|
2020-11-22 00:50:43 -05:00 |
|
4am
|
e3f65ff220
|
Revert "shave some cycles (branch farther during first part of effect)"
This reverts commit ac3ce18973 .
|
2020-11-21 23:08:41 -05:00 |
|
4am
|
ac3ce18973
|
shave some cycles (branch farther during first part of effect)
|
2020-11-21 23:02:16 -05:00 |
|
4am
|
ab5d4a9b94
|
shave some cycles (refactor RESET/INC macros)
|
2020-11-21 21:07:09 -05:00 |
|
4am
|
ef30220aa4
|
shave some cycles (move and combine RESET and INC operations)
|
2020-11-21 20:34:18 -05:00 |
|
4am
|
abe5cdc25b
|
shave some cycles (better A management allows us to remove an LDA in INC macro)
|
2020-11-21 19:02:58 -05:00 |
|
4am
|
1ab825a37e
|
shave some cycles (eliminate first LDA)
|
2020-11-21 18:37:44 -05:00 |
|
4am
|
41cdf65542
|
shave some cycles (manage Y register better, simplify branch macro)
|
2020-11-21 18:26:19 -05:00 |
|
4am
|
b4d4fcfb2b
|
shave some cycles (just copy full byte if copymask=11111111)
|
2020-11-21 18:00:51 -05:00 |
|
4am
|
fb7ab115d0
|
cleanup (don't copy HGR address tables to zero page, it's not any faster from there)
|
2020-11-21 17:41:19 -05:00 |
|
4am
|
9a1cceb49e
|
shave some cycles (use X as cache for last dst address)
|
2020-11-21 17:17:19 -05:00 |
|
4am
|
2d0dbe2b75
|
shave some cycles (cache last dst for RESET)
|
2020-11-21 14:21:15 -05:00 |
|
4am
|
a0e82a2a13
|
shave some cycles (skip last INC before RESET)
|
2020-11-21 14:03:03 -05:00 |
|
4am
|
7a86b64325
|
shave some cycles (better Y management)
|
2020-11-21 13:44:59 -05:00 |
|
4am
|
fc71849da7
|
shave some cycles (Y already has the right value, just need to set flags)
|
2020-11-21 13:39:38 -05:00 |
|