Synopsys VHDL Compiler, version comp201403rcp1, Build 060R, built May 27 2014
@N|Running in 64-bit mode
Copyright (C) 1994-2014 Synopsys, Inc. This software and the associated documentation are proprietary to Synopsys, Inc. This software may only be used in accordance with the terms and conditions of a written license agreement with Synopsys, Inc. All other use, reproduction, or distribution of this software is strictly prohibited.
@N: CD720 :"C:\ispLever\synpbase\lib\vhd\std.vhd":123:18:123:21|Setting time resolution to ns
@N:"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":13:7:13:14|Top entity is set to BUS68030.
@W: CL265 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":134:61:134:75|Pruning bit 12 of CLK_000_N_SYNC_3(12 downto 0) -- not in use ...
@W: CL271 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":133:34:133:36|Pruning bits 12 to 11 of CLK_000_P_SYNC_3(12 downto 0) -- not in use ...
@W: CL189 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":138:37:138:39|Register bit BGACK_030_INT_PRE is always 1, optimizing ...
@N: CL201 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":138:37:138:39|Trying to extract state machine for register SM_AMIGA
Extracted state machine for register SM_AMIGA
State machine has 8 reachable states with original encodings of:
000
001
010
011
100
101
110
111
@N: CL201 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":138:37:138:39|Trying to extract state machine for register cpu_est
@W: CL246 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":23:1:23:1|Input port bits 15 to 2 of a(31 downto 2) are unused
Synopsys CPLD Technology Mapper, Version maplat, Build 923R, Built May 6 2014
Copyright (C) 1994-2013, Synopsys, Inc. This software and the associated documentation are proprietary to Synopsys, Inc. This software may only be used in accordance with the terms and conditions of a written license agreement with Synopsys, Inc. All other use or distribution of the software is strictly prohibited.
Product Version I-2014.03LC
@N: MF248 |Running in 64-bit mode.
@N:"c:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":138:37:138:39|Found counter in view:work.BUS68030(behavioral) inst RST_DLY[2:0]
Encoding state machine SM_AMIGA[0:7] (view:work.BUS68030(behavioral))
original code -> new code
000 -> 00000000
001 -> 00000011
010 -> 00000101
011 -> 00001001
100 -> 00010001
101 -> 00100001
110 -> 01000001
111 -> 10000001
@W: BN132 :"c:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":133:34:133:36|Removing instance CLK_000_P_SYNC[10], because it is equivalent to instance CLK_000_PE