mirror of
https://github.com/kr239/68030tk.git
synced 2025-03-31 00:29:29 +00:00
DMA Improved and Reset pulled up
This commit is contained in:
MHeinrichs
parent
f63fd90f80
commit
57c9d31821
File diff suppressed because it is too large
Load Diff
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8268
Layout and PCB/68030-TK-V09e.brd
Normal file
8268
Layout and PCB/68030-TK-V09e.brd
Normal file
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14659
Layout and PCB/68030-TK-V09e.sch
Normal file
14659
Layout and PCB/68030-TK-V09e.sch
Normal file
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@ -110,6 +110,7 @@ signal BGACK_030_INT_D:STD_LOGIC := '1';
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signal AS_000_DMA:STD_LOGIC := '1';
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signal DS_000_DMA:STD_LOGIC := '1';
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signal RW_000_DMA:STD_LOGIC := '1';
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signal CYCLE_DMA: STD_LOGIC_VECTOR ( 1 downto 0 ) := "00";
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signal SIZE_DMA: STD_LOGIC_VECTOR ( 1 downto 0 ) := "11";
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signal A0_DMA: STD_LOGIC := '1';
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signal VMA_INT: STD_LOGIC := '1';
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@ -141,22 +142,22 @@ signal CLK_000_PE: STD_LOGIC := '0';
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signal CLK_000_NE: STD_LOGIC := '0';
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signal CLK_000_NE_D0: STD_LOGIC := '0';
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signal DTACK_D0: STD_LOGIC := '1';
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signal RESET_DLY: STD_LOGIC_VECTOR ( 7 downto 0 ) := "00000000";
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signal NO_RESET: STD_LOGIC := '0';
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signal RESET_DLY: STD_LOGIC_VECTOR ( 5 downto 0 ) := "000000";
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--signal NO_RESET: STD_LOGIC := '0';
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begin
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--pos edge clock
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pos_clk: process(CLK_OSZI, NO_RESET)
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pos_clk: process(CLK_OSZI)
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begin
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if(NO_RESET = '0' ) then
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if(false ) then
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CLK_OUT_PRE_50 <= '0';
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CLK_OUT_PRE_50_D<= '0';
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CLK_OUT_PRE_25 <= '0';
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CLK_OUT_PRE <= '0';
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--CLK_OUT_PRE_25 <= '0';
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--CLK_OUT_PRE <= '0';
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CLK_OUT_PRE_D <= '0';
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CLK_OUT_NE <= '0';
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CLK_OUT_INT <= '0';
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--CLK_OUT_NE <= '0';
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--CLK_OUT_INT <= '0';
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CLK_000_D0 <= '0';
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CLK_000_D1 <= '0';
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CLK_000_D2 <= '0';
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@ -172,22 +173,22 @@ begin
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CLK_OUT_PRE_50 <= not CLK_OUT_PRE_50;
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CLK_OUT_PRE_50_D<= CLK_OUT_PRE_50;
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if(CLK_OUT_PRE_50='1' and CLK_OUT_PRE_50_D='0')then
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CLK_OUT_PRE_25 <= not CLK_OUT_PRE_25;
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end if;
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--if(CLK_OUT_PRE_50='1' and CLK_OUT_PRE_50_D='0')then
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-- CLK_OUT_PRE_25 <= not CLK_OUT_PRE_25;
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--end if;
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--here the clock is selected
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CLK_OUT_PRE <= CLK_OUT_PRE_50;
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CLK_OUT_PRE_D <= CLK_OUT_PRE;
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--CLK_OUT_PRE <= CLK_OUT_PRE_50;
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CLK_OUT_PRE_D <= CLK_OUT_PRE_50;
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--a negative edge is comming next cycle
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if(CLK_OUT_PRE_D='1' and CLK_OUT_PRE='0' )then
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CLK_OUT_NE <= '1';
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else
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CLK_OUT_NE <= '0';
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end if;
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--if(CLK_OUT_PRE_D='1' and CLK_OUT_PRE='0' )then
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-- CLK_OUT_NE <= '1';
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--else
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-- CLK_OUT_NE <= '0';
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--end if;
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-- the external clock to the processor is generated here
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CLK_OUT_INT <= CLK_OUT_PRE_D; --this way we know the clock of the next state: Its like looking in the future, cool!
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--CLK_OUT_INT <= CLK_OUT_PRE_D; --this way we know the clock of the next state: Its like looking in the future, cool!
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--delayed Clocks and signals for edge detection
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CLK_000_D0 <= CLK_000;
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CLK_000_D1 <= CLK_000_D0;
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@ -239,16 +240,16 @@ begin
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--output clock assignment
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CLK_DIV_OUT <= CLK_OUT_PRE_D;
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CLK_EXP <= CLK_OUT_PRE_D;
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NO_RESET <= '1';
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--NO_RESET <= '1';
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-- i need to delay the board reset by some eclocks, so everything is synced fine afeter a soft reset!
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reset_delay_machine: process(RST, CLK_OSZI)
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begin
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if(RST = '0' ) then
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RESET_DLY <= "00000000";
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RESET_DLY <= "000000";
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elsif(rising_edge(CLK_OSZI)) then
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--reset delay: wait 512 E-Clocks!
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if(CLK_000_NE_D0 = '1' and cpu_est = E1) then
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--reset delay: wait 128 E-Clocks!
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if(CLK_000_NE = '1' and cpu_est = E1) then
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RESET_DLY <= RESET_DLY +1;
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end if;
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end if;
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@ -287,11 +288,12 @@ begin
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nEXP_SPACE_D0 <= '1';
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DS_030_D0 <= '1';
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CLK_030_H <= '0';
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CYCLE_DMA <= "00";
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elsif(rising_edge(CLK_OSZI)) then
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--reset buffer
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if(RESET_DLY="11111111")then
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--if(RESET_DLY="111111")then
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RESET <= '1';
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end if;
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--end if;
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--now: 68000 state machine and signals
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@ -456,9 +458,21 @@ begin
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AMIGA_BUS_ENABLE_INT <= '1' ;
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end if;
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if(BGACK_030_INT='0' and AS_000='0')then
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-- an 68000-memory cycle is three positive edges long!
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if(CLK_000_PE='1')then
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CYCLE_DMA <= CYCLE_DMA+1;
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end if;
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else
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CYCLE_DMA <= "00";
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end if;
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--dma stuff
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--as can only be done if we know the uds/lds!
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if(BGACK_030_INT='0' and AS_000='0' and (UDS_000='0' or LDS_000='0'))then
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if(BGACK_030_INT='0' and AS_000='0' and (UDS_000='0' or LDS_000='0') and not(CYCLE_DMA = "11"))then
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RW_000_DMA <= RW_000;
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--set AS_000
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if( CLK_030='1') then
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@ -481,7 +495,7 @@ begin
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else
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SIZE_DMA <= "01"; --8 bit
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end if;
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--now calculate the offset:
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--if uds is set low, a0 is so too.
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--if only lds is set a1 is high
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@ -2,3 +2,5 @@
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tool=Synplify
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[STRATEGY-LIST]
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Normal=True, 1412327082
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[TOUCHED-REPORT]
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Design.impFile=1422902358
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@ -12,8 +12,8 @@ EN_PinMacrocell = Yes;
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[Revision]
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Parent = m4a5.lci;
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DATE = 02/01/2015;
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TIME = 21:17:58;
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DATE = 02/02/2015;
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TIME = 19:39:18;
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Source_Format = Pure_VHDL;
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Synthesis = Synplify;
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@ -28,12 +28,12 @@ Spread_placement = Yes;
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Zero_hold_time = Yes;
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Max_pterm_split = 16;
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Max_pterm_collapse = 16;
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Nodes_collapsing_mode = Speed;
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Max_fanin = 32;
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Nodes_collapsing_mode = Area;
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Max_fanin = 33;
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Set_reset_dont_care = Yes;
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Balanced_partitioning = Yes;
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Max_macrocell_percent = 100;
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Dt_synthesis = Yes;
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Dt_synthesis = No;
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[Location Assignments]
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layer = OFF;
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@ -12,8 +12,8 @@ EN_PinMacrocell = Yes;
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[Revision]
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Parent = m4a5.lci;
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DATE = 02/01/2015;
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TIME = 21:17:58;
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DATE = 02/02/2015;
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TIME = 19:39:18;
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Source_Format = Pure_VHDL;
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Synthesis = Synplify;
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@ -28,12 +28,12 @@ Spread_placement = Yes;
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Zero_hold_time = Yes;
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Max_pterm_split = 16;
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Max_pterm_collapse = 16;
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Nodes_collapsing_mode = Speed;
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Max_fanin = 32;
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Nodes_collapsing_mode = Area;
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Max_fanin = 33;
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Set_reset_dont_care = Yes;
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Balanced_partitioning = Yes;
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Max_macrocell_percent = 100;
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Dt_synthesis = Yes;
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Dt_synthesis = No;
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[Location Assignments]
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layer = OFF;
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9651
Logic/68030_TK.tcl
9651
Logic/68030_TK.tcl
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Load Diff
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Load Diff
@ -1,7 +1,7 @@
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// Signal Name Cross Reference File
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// ispLEVER Classic 1.7.00.05.28.13
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// Design '68030_tk' created Sun Feb 01 21:36:50 2015
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// Design '68030_tk' created Tue Feb 03 09:23:46 2015
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// LEGEND: '>' Functional Block Port Separator
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@ -10,5 +10,4 @@
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// Hierarchical Name Short Name
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// *** Shortened names not required for this design. ***
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state_machine_un17_bgack_030_int_i_1_i_n U0_achine_un17_bgack_030_int_i_1
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@ -1,677 +0,0 @@
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MODELDATA
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MODELDATA_VERSION "1.0";
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DESIGN "68030_tk";
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DATE "Sun Feb 01 21:13:56 2015";
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VENDOR "Lattice Semiconductor Corporation";
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PROGRAM "STAMP Model Generator";
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/* port drive, max transition and max capacitance */
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PORTDATA
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A1: MAXTRANS(0.0);
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A_16: MAXTRANS(0.0);
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A_17: MAXTRANS(0.0);
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A_18: MAXTRANS(0.0);
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A_19: MAXTRANS(0.0);
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A_20: MAXTRANS(0.0);
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A_21: MAXTRANS(0.0);
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A_22: MAXTRANS(0.0);
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A_23: MAXTRANS(0.0);
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A_24: MAXTRANS(0.0);
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A_25: MAXTRANS(0.0);
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A_26: MAXTRANS(0.0);
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A_27: MAXTRANS(0.0);
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A_28: MAXTRANS(0.0);
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A_29: MAXTRANS(0.0);
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A_30: MAXTRANS(0.0);
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A_31: MAXTRANS(0.0);
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BGACK_000: MAXTRANS(0.0);
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BG_030: MAXTRANS(0.0);
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CLK_000: MAXTRANS(0.0);
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CLK_030: MAXTRANS(0.0);
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CLK_OSZI: MAXTRANS(0.0);
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DTACK: MAXTRANS(0.0);
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FC_0: MAXTRANS(0.0);
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FC_1: MAXTRANS(0.0);
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FPU_SENSE: MAXTRANS(0.0);
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IPL_0: MAXTRANS(0.0);
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IPL_1: MAXTRANS(0.0);
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IPL_2: MAXTRANS(0.0);
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RST: MAXTRANS(0.0);
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VPA: MAXTRANS(0.0);
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nEXP_SPACE: MAXTRANS(0.0);
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AMIGA_ADDR_ENABLE: MAXTRANS(0.0);
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AMIGA_BUS_DATA_DIR: MAXTRANS(0.0);
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AMIGA_BUS_ENABLE_HIGH: MAXTRANS(0.0);
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AMIGA_BUS_ENABLE_LOW: MAXTRANS(0.0);
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AVEC: MAXTRANS(0.0);
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BGACK_030: MAXTRANS(0.0);
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BG_000: MAXTRANS(0.0);
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CIIN: MAXTRANS(0.0);
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CLK_DIV_OUT: MAXTRANS(0.0);
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CLK_EXP: MAXTRANS(0.0);
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DSACK1: MAXTRANS(0.0);
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E: MAXTRANS(0.0);
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FPU_CS: MAXTRANS(0.0);
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IPL_030_0: MAXTRANS(0.0);
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IPL_030_1: MAXTRANS(0.0);
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IPL_030_2: MAXTRANS(0.0);
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RESET: MAXTRANS(0.0);
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VMA: MAXTRANS(0.0);
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A0: MAXTRANS(0.0);
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AS_000: MAXTRANS(0.0);
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AS_030: MAXTRANS(0.0);
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BERR: MAXTRANS(0.0);
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DS_030: MAXTRANS(0.0);
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LDS_000: MAXTRANS(0.0);
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RW: MAXTRANS(0.0);
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RW_000: MAXTRANS(0.0);
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SIZE_0: MAXTRANS(0.0);
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SIZE_1: MAXTRANS(0.0);
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UDS_000: MAXTRANS(0.0);
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ENDPORTDATA
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/* timing arc data */
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TIMINGDATA
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ARCDATA
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AS_030_AS_000_delay:
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CELL_RISE(scalar) {
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VALUES(15.0);
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}
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CELL_FALL(scalar) {
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VALUES(15.0);
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}
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ENDARCDATA
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ARCDATA
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A_20_CIIN_delay:
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CELL_RISE(scalar) {
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VALUES(15.0);
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}
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CELL_FALL(scalar) {
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VALUES(15.0);
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}
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ENDARCDATA
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ARCDATA
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A_21_CIIN_delay:
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CELL_RISE(scalar) {
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VALUES(15.0);
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}
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CELL_FALL(scalar) {
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VALUES(15.0);
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}
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ENDARCDATA
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ARCDATA
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A_22_CIIN_delay:
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CELL_RISE(scalar) {
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VALUES(15.0);
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}
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CELL_FALL(scalar) {
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VALUES(15.0);
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}
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ENDARCDATA
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ARCDATA
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A_23_CIIN_delay:
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CELL_RISE(scalar) {
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VALUES(15.0);
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}
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CELL_FALL(scalar) {
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VALUES(15.0);
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}
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ENDARCDATA
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ARCDATA
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A_24_CIIN_delay:
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CELL_RISE(scalar) {
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VALUES(15.0);
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}
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CELL_FALL(scalar) {
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VALUES(15.0);
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}
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ENDARCDATA
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ARCDATA
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A_25_CIIN_delay:
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CELL_RISE(scalar) {
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VALUES(15.0);
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}
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CELL_FALL(scalar) {
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VALUES(15.0);
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}
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ENDARCDATA
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ARCDATA
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A_26_CIIN_delay:
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CELL_RISE(scalar) {
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VALUES(15.0);
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}
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CELL_FALL(scalar) {
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VALUES(15.0);
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}
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ENDARCDATA
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ARCDATA
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A_27_CIIN_delay:
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CELL_RISE(scalar) {
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VALUES(15.0);
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}
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CELL_FALL(scalar) {
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VALUES(15.0);
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}
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ENDARCDATA
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ARCDATA
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A_28_CIIN_delay:
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CELL_RISE(scalar) {
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VALUES(15.0);
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}
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CELL_FALL(scalar) {
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VALUES(15.0);
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}
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ENDARCDATA
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ARCDATA
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A_29_CIIN_delay:
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CELL_RISE(scalar) {
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VALUES(15.0);
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}
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CELL_FALL(scalar) {
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VALUES(15.0);
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}
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ENDARCDATA
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ARCDATA
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A_30_CIIN_delay:
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CELL_RISE(scalar) {
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VALUES(15.0);
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}
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CELL_FALL(scalar) {
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VALUES(15.0);
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}
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ENDARCDATA
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ARCDATA
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A_31_CIIN_delay:
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CELL_RISE(scalar) {
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VALUES(15.0);
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}
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CELL_FALL(scalar) {
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VALUES(15.0);
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}
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ENDARCDATA
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ARCDATA
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DS_030_LDS_000_delay:
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CELL_RISE(scalar) {
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VALUES(15.0);
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}
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CELL_FALL(scalar) {
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VALUES(15.0);
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}
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ENDARCDATA
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ARCDATA
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DS_030_UDS_000_delay:
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CELL_RISE(scalar) {
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VALUES(15.0);
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}
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CELL_FALL(scalar) {
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VALUES(15.0);
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}
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ENDARCDATA
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ARCDATA
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AS_000_AMIGA_BUS_DATA_DIR_delay:
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CELL_RISE(scalar) {
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VALUES(12.5);
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}
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CELL_FALL(scalar) {
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VALUES(12.5);
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}
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ENDARCDATA
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ARCDATA
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AS_030_FPU_CS_delay:
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CELL_RISE(scalar) {
|
||||
VALUES(12.5);
|
||||
}
|
||||
CELL_FALL(scalar) {
|
||||
VALUES(12.5);
|
||||
}
|
||||
ENDARCDATA
|
||||
|
||||
ARCDATA
|
||||
A_16_FPU_CS_delay:
|
||||
CELL_RISE(scalar) {
|
||||
VALUES(12.5);
|
||||
}
|
||||
CELL_FALL(scalar) {
|
||||
VALUES(12.5);
|
||||
}
|
||||
ENDARCDATA
|
||||
|
||||
ARCDATA
|
||||
A_17_FPU_CS_delay:
|
||||
CELL_RISE(scalar) {
|
||||
VALUES(12.5);
|
||||
}
|
||||
CELL_FALL(scalar) {
|
||||
VALUES(12.5);
|
||||
}
|
||||
ENDARCDATA
|
||||
|
||||
ARCDATA
|
||||
A_18_FPU_CS_delay:
|
||||
CELL_RISE(scalar) {
|
||||
VALUES(12.5);
|
||||
}
|
||||
CELL_FALL(scalar) {
|
||||
VALUES(12.5);
|
||||
}
|
||||
ENDARCDATA
|
||||
|
||||
ARCDATA
|
||||
A_19_FPU_CS_delay:
|
||||
CELL_RISE(scalar) {
|
||||
VALUES(12.5);
|
||||
}
|
||||
CELL_FALL(scalar) {
|
||||
VALUES(12.5);
|
||||
}
|
||||
ENDARCDATA
|
||||
|
||||
ARCDATA
|
||||
BGACK_000_FPU_CS_delay:
|
||||
CELL_RISE(scalar) {
|
||||
VALUES(12.5);
|
||||
}
|
||||
CELL_FALL(scalar) {
|
||||
VALUES(12.5);
|
||||
}
|
||||
ENDARCDATA
|
||||
|
||||
ARCDATA
|
||||
FC_0_FPU_CS_delay:
|
||||
CELL_RISE(scalar) {
|
||||
VALUES(12.5);
|
||||
}
|
||||
CELL_FALL(scalar) {
|
||||
VALUES(12.5);
|
||||
}
|
||||
ENDARCDATA
|
||||
|
||||
ARCDATA
|
||||
FC_1_FPU_CS_delay:
|
||||
CELL_RISE(scalar) {
|
||||
VALUES(12.5);
|
||||
}
|
||||
CELL_FALL(scalar) {
|
||||
VALUES(12.5);
|
||||
}
|
||||
ENDARCDATA
|
||||
|
||||
ARCDATA
|
||||
FPU_SENSE_FPU_CS_delay:
|
||||
CELL_RISE(scalar) {
|
||||
VALUES(12.5);
|
||||
}
|
||||
CELL_FALL(scalar) {
|
||||
VALUES(12.5);
|
||||
}
|
||||
ENDARCDATA
|
||||
|
||||
ARCDATA
|
||||
RW_000_AMIGA_BUS_DATA_DIR_delay:
|
||||
CELL_RISE(scalar) {
|
||||
VALUES(12.5);
|
||||
}
|
||||
CELL_FALL(scalar) {
|
||||
VALUES(12.5);
|
||||
}
|
||||
ENDARCDATA
|
||||
|
||||
ARCDATA
|
||||
CLK_OSZI_AS_000_delay:
|
||||
CELL_RISE(scalar) {
|
||||
VALUES(18.0);
|
||||
}
|
||||
CELL_FALL(scalar) {
|
||||
VALUES(18.0);
|
||||
}
|
||||
ENDARCDATA
|
||||
|
||||
ARCDATA
|
||||
CLK_OSZI_CIIN_delay:
|
||||
CELL_RISE(scalar) {
|
||||
VALUES(18.0);
|
||||
}
|
||||
CELL_FALL(scalar) {
|
||||
VALUES(18.0);
|
||||
}
|
||||
ENDARCDATA
|
||||
|
||||
ARCDATA
|
||||
CLK_OSZI_LDS_000_delay:
|
||||
CELL_RISE(scalar) {
|
||||
VALUES(18.0);
|
||||
}
|
||||
CELL_FALL(scalar) {
|
||||
VALUES(18.0);
|
||||
}
|
||||
ENDARCDATA
|
||||
|
||||
ARCDATA
|
||||
CLK_OSZI_LDS_000_delay:
|
||||
CELL_RISE(scalar) {
|
||||
VALUES(18.0);
|
||||
}
|
||||
CELL_FALL(scalar) {
|
||||
VALUES(18.0);
|
||||
}
|
||||
ENDARCDATA
|
||||
|
||||
ARCDATA
|
||||
CLK_OSZI_SIZE_0_delay:
|
||||
CELL_RISE(scalar) {
|
||||
VALUES(18.0);
|
||||
}
|
||||
CELL_FALL(scalar) {
|
||||
VALUES(18.0);
|
||||
}
|
||||
ENDARCDATA
|
||||
|
||||
ARCDATA
|
||||
CLK_OSZI_SIZE_0_delay:
|
||||
CELL_RISE(scalar) {
|
||||
VALUES(18.0);
|
||||
}
|
||||
CELL_FALL(scalar) {
|
||||
VALUES(18.0);
|
||||
}
|
||||
ENDARCDATA
|
||||
|
||||
ARCDATA
|
||||
CLK_OSZI_SIZE_1_delay:
|
||||
CELL_RISE(scalar) {
|
||||
VALUES(18.0);
|
||||
}
|
||||
CELL_FALL(scalar) {
|
||||
VALUES(18.0);
|
||||
}
|
||||
ENDARCDATA
|
||||
|
||||
ARCDATA
|
||||
CLK_OSZI_SIZE_1_delay:
|
||||
CELL_RISE(scalar) {
|
||||
VALUES(18.0);
|
||||
}
|
||||
CELL_FALL(scalar) {
|
||||
VALUES(18.0);
|
||||
}
|
||||
ENDARCDATA
|
||||
|
||||
ARCDATA
|
||||
CLK_OSZI_UDS_000_delay:
|
||||
CELL_RISE(scalar) {
|
||||
VALUES(18.0);
|
||||
}
|
||||
CELL_FALL(scalar) {
|
||||
VALUES(18.0);
|
||||
}
|
||||
ENDARCDATA
|
||||
|
||||
ARCDATA
|
||||
CLK_OSZI_UDS_000_delay:
|
||||
CELL_RISE(scalar) {
|
||||
VALUES(18.0);
|
||||
}
|
||||
CELL_FALL(scalar) {
|
||||
VALUES(18.0);
|
||||
}
|
||||
ENDARCDATA
|
||||
|
||||
ARCDATA
|
||||
CLK_OSZI_AMIGA_BUS_DATA_DIR_delay:
|
||||
CELL_RISE(scalar) {
|
||||
VALUES(15.5);
|
||||
}
|
||||
CELL_FALL(scalar) {
|
||||
VALUES(15.5);
|
||||
}
|
||||
ENDARCDATA
|
||||
|
||||
ARCDATA
|
||||
CLK_OSZI_AMIGA_BUS_DATA_DIR_delay:
|
||||
CELL_RISE(scalar) {
|
||||
VALUES(15.5);
|
||||
}
|
||||
CELL_FALL(scalar) {
|
||||
VALUES(15.5);
|
||||
}
|
||||
ENDARCDATA
|
||||
|
||||
ARCDATA
|
||||
CLK_OSZI_AMIGA_BUS_ENABLE_HIGH_delay:
|
||||
CELL_RISE(scalar) {
|
||||
VALUES(15.5);
|
||||
}
|
||||
CELL_FALL(scalar) {
|
||||
VALUES(15.5);
|
||||
}
|
||||
ENDARCDATA
|
||||
|
||||
ARCDATA
|
||||
CLK_OSZI_AMIGA_BUS_ENABLE_HIGH_delay:
|
||||
CELL_RISE(scalar) {
|
||||
VALUES(15.5);
|
||||
}
|
||||
CELL_FALL(scalar) {
|
||||
VALUES(15.5);
|
||||
}
|
||||
ENDARCDATA
|
||||
|
||||
ARCDATA
|
||||
CLK_OSZI_AMIGA_BUS_ENABLE_HIGH_delay:
|
||||
CELL_RISE(scalar) {
|
||||
VALUES(15.5);
|
||||
}
|
||||
CELL_FALL(scalar) {
|
||||
VALUES(15.5);
|
||||
}
|
||||
ENDARCDATA
|
||||
|
||||
ARCDATA
|
||||
CLK_OSZI_AMIGA_BUS_ENABLE_LOW_delay:
|
||||
CELL_RISE(scalar) {
|
||||
VALUES(15.5);
|
||||
}
|
||||
CELL_FALL(scalar) {
|
||||
VALUES(15.5);
|
||||
}
|
||||
ENDARCDATA
|
||||
|
||||
ARCDATA
|
||||
CLK_OSZI_AMIGA_BUS_ENABLE_LOW_delay:
|
||||
CELL_RISE(scalar) {
|
||||
VALUES(15.5);
|
||||
}
|
||||
CELL_FALL(scalar) {
|
||||
VALUES(15.5);
|
||||
}
|
||||
ENDARCDATA
|
||||
|
||||
ARCDATA
|
||||
CLK_OSZI_CLK_DIV_OUT_delay:
|
||||
CELL_RISE(scalar) {
|
||||
VALUES(15.5);
|
||||
}
|
||||
CELL_FALL(scalar) {
|
||||
VALUES(15.5);
|
||||
}
|
||||
ENDARCDATA
|
||||
|
||||
ARCDATA
|
||||
CLK_OSZI_CLK_EXP_delay:
|
||||
CELL_RISE(scalar) {
|
||||
VALUES(15.5);
|
||||
}
|
||||
CELL_FALL(scalar) {
|
||||
VALUES(15.5);
|
||||
}
|
||||
ENDARCDATA
|
||||
|
||||
ARCDATA
|
||||
CLK_OSZI_A0_delay:
|
||||
CELL_RISE(scalar) {
|
||||
VALUES(8.5);
|
||||
}
|
||||
CELL_FALL(scalar) {
|
||||
VALUES(8.5);
|
||||
}
|
||||
ENDARCDATA
|
||||
|
||||
ARCDATA
|
||||
CLK_OSZI_AS_030_delay:
|
||||
CELL_RISE(scalar) {
|
||||
VALUES(8.5);
|
||||
}
|
||||
CELL_FALL(scalar) {
|
||||
VALUES(8.5);
|
||||
}
|
||||
ENDARCDATA
|
||||
|
||||
ARCDATA
|
||||
CLK_OSZI_BGACK_030_delay:
|
||||
CELL_RISE(scalar) {
|
||||
VALUES(8.5);
|
||||
}
|
||||
CELL_FALL(scalar) {
|
||||
VALUES(8.5);
|
||||
}
|
||||
ENDARCDATA
|
||||
|
||||
ARCDATA
|
||||
CLK_OSZI_BG_000_delay:
|
||||
CELL_RISE(scalar) {
|
||||
VALUES(8.5);
|
||||
}
|
||||
CELL_FALL(scalar) {
|
||||
VALUES(8.5);
|
||||
}
|
||||
ENDARCDATA
|
||||
|
||||
ARCDATA
|
||||
CLK_OSZI_DSACK1_delay:
|
||||
CELL_RISE(scalar) {
|
||||
VALUES(8.5);
|
||||
}
|
||||
CELL_FALL(scalar) {
|
||||
VALUES(8.5);
|
||||
}
|
||||
ENDARCDATA
|
||||
|
||||
ARCDATA
|
||||
CLK_OSZI_DS_030_delay:
|
||||
CELL_RISE(scalar) {
|
||||
VALUES(8.5);
|
||||
}
|
||||
CELL_FALL(scalar) {
|
||||
VALUES(8.5);
|
||||
}
|
||||
ENDARCDATA
|
||||
|
||||
ARCDATA
|
||||
CLK_OSZI_E_delay:
|
||||
CELL_RISE(scalar) {
|
||||
VALUES(8.5);
|
||||
}
|
||||
CELL_FALL(scalar) {
|
||||
VALUES(8.5);
|
||||
}
|
||||
ENDARCDATA
|
||||
|
||||
ARCDATA
|
||||
CLK_OSZI_IPL_030_0_delay:
|
||||
CELL_RISE(scalar) {
|
||||
VALUES(8.5);
|
||||
}
|
||||
CELL_FALL(scalar) {
|
||||
VALUES(8.5);
|
||||
}
|
||||
ENDARCDATA
|
||||
|
||||
ARCDATA
|
||||
CLK_OSZI_IPL_030_1_delay:
|
||||
CELL_RISE(scalar) {
|
||||
VALUES(8.5);
|
||||
}
|
||||
CELL_FALL(scalar) {
|
||||
VALUES(8.5);
|
||||
}
|
||||
ENDARCDATA
|
||||
|
||||
ARCDATA
|
||||
CLK_OSZI_IPL_030_2_delay:
|
||||
CELL_RISE(scalar) {
|
||||
VALUES(8.5);
|
||||
}
|
||||
CELL_FALL(scalar) {
|
||||
VALUES(8.5);
|
||||
}
|
||||
ENDARCDATA
|
||||
|
||||
ARCDATA
|
||||
CLK_OSZI_RESET_delay:
|
||||
CELL_RISE(scalar) {
|
||||
VALUES(8.5);
|
||||
}
|
||||
CELL_FALL(scalar) {
|
||||
VALUES(8.5);
|
||||
}
|
||||
ENDARCDATA
|
||||
|
||||
ARCDATA
|
||||
CLK_OSZI_RW_delay:
|
||||
CELL_RISE(scalar) {
|
||||
VALUES(8.5);
|
||||
}
|
||||
CELL_FALL(scalar) {
|
||||
VALUES(8.5);
|
||||
}
|
||||
ENDARCDATA
|
||||
|
||||
ARCDATA
|
||||
CLK_OSZI_RW_000_delay:
|
||||
CELL_RISE(scalar) {
|
||||
VALUES(8.5);
|
||||
}
|
||||
CELL_FALL(scalar) {
|
||||
VALUES(8.5);
|
||||
}
|
||||
ENDARCDATA
|
||||
|
||||
ARCDATA
|
||||
CLK_OSZI_VMA_delay:
|
||||
CELL_RISE(scalar) {
|
||||
VALUES(8.5);
|
||||
}
|
||||
CELL_FALL(scalar) {
|
||||
VALUES(8.5);
|
||||
}
|
||||
ENDARCDATA
|
||||
|
||||
ARCDATA
|
||||
CLK_OSZI_AMIGA_ADDR_ENABLE_delay:
|
||||
CELL_RISE(scalar) {
|
||||
VALUES(6.0);
|
||||
}
|
||||
CELL_FALL(scalar) {
|
||||
VALUES(6.0);
|
||||
}
|
||||
ENDARCDATA
|
||||
|
||||
ENDTIMINGDATA
|
||||
ENDMODELDATA
|
||||
@ -1,28 +0,0 @@
|
||||
|
||||
GROUP MACH_SEG_A DS_030 RN_DS_030 RESET_DLY_7_ RESET_DLY_6_ RESET_DLY_5_
|
||||
RESET_DLY_4_ RESET_DLY_3_ inst_CLK_030_H RESET_DLY_2_ inst_AMIGA_BUS_ENABLE_DMA_HIGH
|
||||
AVEC cpu_est_0_ CLK_000_P_SYNC_4_ CLK_000_P_SYNC_7_ CLK_000_P_SYNC_8_
|
||||
CLK_000_N_SYNC_4_
|
||||
GROUP MACH_SEG_B RESET RN_RESET IPL_030_1_ RN_IPL_030_1_ IPL_030_0_ RN_IPL_030_0_
|
||||
IPL_030_2_ RN_IPL_030_2_ inst_LDS_000_INT inst_AMIGA_BUS_ENABLE_DMA_LOW
|
||||
SIZE_DMA_0_ CLK_EXP CLK_000_N_SYNC_11_ CLK_000_N_SYNC_10_
|
||||
GROUP MACH_SEG_C SM_AMIGA_3_ SM_AMIGA_2_ inst_AS_000_INT inst_nEXP_SPACE_D0reg
|
||||
inst_VPA_D AMIGA_BUS_ENABLE_LOW state_machine_un15_clk_000_ne_i_n
|
||||
cpu_est_1_ CLK_000_P_SYNC_9_ CLK_000_P_SYNC_3_ CLK_000_P_SYNC_5_
|
||||
CLK_000_P_SYNC_6_ CLK_000_N_SYNC_1_ CLK_000_N_SYNC_6_ inst_CLK_000_NE_D0
|
||||
|
||||
GROUP MACH_SEG_D AMIGA_ADDR_ENABLE RN_AMIGA_ADDR_ENABLE VMA RN_VMA BG_000
|
||||
RN_BG_000 RESET_DLY_1_ RESET_DLY_0_ inst_DS_030_D0 LDS_000 UDS_000
|
||||
AMIGA_BUS_ENABLE_HIGH CLK_000_P_SYNC_0_ CLK_000_N_SYNC_0_ CLK_000_P_SYNC_2_
|
||||
CLK_000_N_SYNC_3_ inst_CLK_000_D1
|
||||
GROUP MACH_SEG_E CIIN BERR AMIGA_BUS_DATA_DIR AS_000 CIIN_0 un8_ciin inst_CLK_000_NE
|
||||
inst_CLK_OUT_PRE_50 inst_CLK_OUT_PRE
|
||||
GROUP MACH_SEG_F SM_AMIGA_7_ inst_AS_030_000_SYNC SM_AMIGA_6_ inst_DS_000_ENABLE
|
||||
SM_AMIGA_0_ SM_AMIGA_1_ SM_AMIGA_4_ SM_AMIGA_5_ CLK_000_P_SYNC_1_
|
||||
CLK_000_N_SYNC_7_
|
||||
GROUP MACH_SEG_G RW A0 inst_UDS_000_INT inst_DTACK_D0 E RN_E SIZE_0_ CLK_DIV_OUT
|
||||
cpu_est_2_ inst_CLK_000_D0 inst_CLK_000_PE CLK_000_N_SYNC_2_ CLK_000_N_SYNC_5_
|
||||
CLK_000_N_SYNC_8_ CLK_000_N_SYNC_9_ CLK_OUT_PRE_Dreg
|
||||
GROUP MACH_SEG_H DSACK1 RN_DSACK1 RW_000 RN_RW_000 AS_030 RN_AS_030 BGACK_030
|
||||
RN_BGACK_030 SIZE_DMA_1_ inst_AS_030_D0 inst_BGACK_030_INT_D FPU_CS
|
||||
SIZE_1_
|
||||
@ -1 +1 @@
|
||||
<LATTICE_ENCRYPTED_BLIF>00206=4tD5[\\
|
||||
<LATTICE_ENCRYPTED_BLIF>63:21<4XlL27-y
|
||||
@ -1,888 +0,0 @@
|
||||
-- CREATED BY: Lattice Semiconductor Universal File Writer V2.48
|
||||
-- DEVICE NAME: iM4A5-128/64
|
||||
-- TOTAL_FUSES = 54096
|
||||
-- DATA_CRC = 9F0B9D43
|
||||
-- JEDEC_FILENAME = 68030_tk.jed
|
||||
-- JEDEC_CHECKSUM = 0x3062
|
||||
--
|
||||
-- |--------------------------------------------|
|
||||
-- |- ispLEVER Fitter Report File -|
|
||||
-- |- Version 1.7.00.05.28.13 -|
|
||||
-- |- (c)Copyright, Lattice Semiconductor 2002 -|
|
||||
-- |--------------------------------------------|
|
||||
-- TITLE:
|
||||
-- AUTHOR:
|
||||
-- PATTERN:
|
||||
-- COMPANY:
|
||||
-- REVISION:
|
||||
-- DATE: Sun Feb 01 20:15:26 2015
|
||||
-- ABEL mach447a
|
||||
--
|
||||
-- NOTE Part Number : M4A5-128/64-10VC
|
||||
-- NOTE Handling of Preplacements No Change
|
||||
-- NOTE Use placement data from 68030_tk.vct
|
||||
-- NOTE Global clocks routable as PT clocks? N
|
||||
-- NOTE 22V10/MACH1XX/2XX S/R Compatibility? Y
|
||||
-- NOTE SET/RESET treated as DONT_CARE? Y
|
||||
-- NOTE Reduce Unforced Global Clocks? N
|
||||
-- NOTE Iterate between partitioning and place/route? Y
|
||||
-- NOTE Balanced partitioning? Y
|
||||
-- NOTE Reduce Routes Per Placement? N
|
||||
-- NOTE Spread Placement? Y
|
||||
-- NOTE Run Time Upper Bound in 15 minutes 0
|
||||
-- NOTE Zero Hold Time For Input Registers? Y
|
||||
-- NOTE Table of pin names and numbers
|
||||
-- NOTE PINS A_23_:85 A_22_:84 SIZE_1_:79 A_21_:94 A_20_:93
|
||||
-- NOTE PINS A_31_:4 A_19_:97 A_18_:95 A_17_:59 A_16_:96 IPL_2_:68
|
||||
-- NOTE PINS FC_1_:58 IPL_1_:56 IPL_0_:67 AS_000:42 FC_0_:57
|
||||
-- NOTE PINS UDS_000:32 LDS_000:31 A1:60 nEXP_SPACE:14 BERR:41
|
||||
-- NOTE PINS BG_030:21 BGACK_000:28 CLK_030:64 CLK_000:11 CLK_OSZI:61
|
||||
-- NOTE PINS CLK_DIV_OUT:65 CLK_EXP:10 FPU_CS:78 FPU_SENSE:91
|
||||
-- NOTE PINS DTACK:30 AVEC:92 VPA:36 RST:86 AMIGA_BUS_DATA_DIR:48
|
||||
-- NOTE PINS AMIGA_BUS_ENABLE_LOW:20 AMIGA_BUS_ENABLE_HIGH:34
|
||||
-- NOTE PINS CIIN:47 SIZE_0_:70 A_30_:5 A_29_:6 A_28_:15 A_27_:16
|
||||
-- NOTE PINS A_26_:17 A_25_:18 A_24_:19 IPL_030_2_:9 IPL_030_1_:7
|
||||
-- NOTE PINS IPL_030_0_:8 AS_030:82 RW_000:80 DS_030:98 A0:69
|
||||
-- NOTE PINS BG_000:29 BGACK_030:83 DSACK1:81 E:66 VMA:35 RESET:3
|
||||
-- NOTE PINS RW:71 AMIGA_ADDR_ENABLE:33
|
||||
-- NOTE Table of node names and numbers
|
||||
-- NOTE NODES RN_SIZE_1_:287 RN_AS_000:203 RN_UDS_000:185 RN_LDS_000:191
|
||||
-- NOTE NODES RN_BERR:200 RN_SIZE_0_:263 RN_IPL_030_2_:131
|
||||
-- NOTE NODES RN_IPL_030_1_:143 RN_IPL_030_0_:137 RN_AS_030:281
|
||||
-- NOTE NODES RN_RW_000:269 RN_DS_030:101 RN_A0:257 RN_BG_000:175
|
||||
-- NOTE NODES RN_BGACK_030:275 RN_DSACK1:283 RN_E:251 RN_VMA:173
|
||||
-- NOTE NODES RN_RESET:125 RN_RW:245 RN_AMIGA_ADDR_ENABLE:179
|
||||
-- NOTE NODES cpu_est_0_:116 cpu_est_1_:187 inst_AS_000_INT:235
|
||||
-- NOTE NODES inst_AMIGA_BUS_ENABLE_DMA_LOW:106 inst_AS_030_D0:277
|
||||
-- NOTE NODES inst_nEXP_SPACE_D0reg:133 inst_DS_030_D0:158
|
||||
-- NOTE NODES inst_AS_030_000_SYNC:155 inst_BGACK_030_INT_D:284
|
||||
-- NOTE NODES SIZE_DMA_0_:289 SIZE_DMA_1_:104 inst_VPA_D:139
|
||||
-- NOTE NODES inst_UDS_000_INT:259 inst_LDS_000_INT:253 inst_DTACK_D0:121
|
||||
-- NOTE NODES inst_CLK_OUT_PRE_50:196 inst_CLK_000_D1:167 inst_CLK_000_D0:188
|
||||
-- NOTE NODES inst_CLK_000_PE:113 SM_AMIGA_7_:227 SM_AMIGA_5_:229
|
||||
-- NOTE NODES inst_CLK_OUT_PRE:190 inst_CLK_000_NE:199 CLK_000_N_SYNC_11_:278
|
||||
-- NOTE NODES CLK_000_P_SYNC_9_:136 cpu_est_2_:193 inst_CLK_000_NE_D0:176
|
||||
-- NOTE NODES SM_AMIGA_3_:241 SM_AMIGA_0_:223 inst_AMIGA_BUS_ENABLE_DMA_HIGH:122
|
||||
-- NOTE NODES SM_AMIGA_6_:161 RESET_DLY_0_:182 RESET_DLY_1_:128
|
||||
-- NOTE NODES RESET_DLY_2_:115 RESET_DLY_3_:109 RESET_DLY_4_:145
|
||||
-- NOTE NODES RESET_DLY_5_:103 RESET_DLY_6_:119 RESET_DLY_7_:130
|
||||
-- NOTE NODES CLK_000_P_SYNC_0_:184 CLK_000_P_SYNC_1_:254 CLK_000_P_SYNC_2_:248
|
||||
-- NOTE NODES CLK_000_P_SYNC_3_:124 CLK_000_P_SYNC_4_:152 CLK_000_P_SYNC_5_:178
|
||||
-- NOTE NODES CLK_000_P_SYNC_6_:169 CLK_000_P_SYNC_7_:146 CLK_000_P_SYNC_8_:194
|
||||
-- NOTE NODES CLK_000_N_SYNC_0_:242 CLK_000_N_SYNC_1_:163 CLK_000_N_SYNC_2_:140
|
||||
-- NOTE NODES CLK_000_N_SYNC_3_:206 CLK_000_N_SYNC_4_:265 CLK_000_N_SYNC_5_:118
|
||||
-- NOTE NODES CLK_000_N_SYNC_6_:236 CLK_000_N_SYNC_7_:112 CLK_000_N_SYNC_8_:157
|
||||
-- NOTE NODES CLK_000_N_SYNC_9_:134 CLK_000_N_SYNC_10_:272
|
||||
-- NOTE NODES inst_CLK_030_H:110 inst_DS_000_ENABLE:233 SM_AMIGA_1_:239
|
||||
-- NOTE NODES SM_AMIGA_4_:230 SM_AMIGA_2_:224 CLK_OUT_PRE_Dreg:209
|
||||
-- NOTE NODES un8_ciin:217 state_machine_un15_clk_000_ne_i_n:151
|
||||
-- NOTE NODES CIIN_0:211
|
||||
-- NOTE BLOCK 0
|
||||
|
||||
IEEE_1532_Data (
|
||||
Header ( STD_Version STD_1532_2001
|
||||
Creation_Date 20150201.2111
|
||||
Creator "Universal File Writer V2.48"
|
||||
Entity M4A5_128_64,
|
||||
M4A5_128_64_XXYC,
|
||||
M4A5_128_64_XXVC
|
||||
)
|
||||
data array (
|
||||
repeat
|
||||
-- ROW_WIDTH = 792
|
||||
-- COLUMN_WIDTH = 80
|
||||
(
|
||||
82384608C3082F0C218E3F3FEFFD18DFF82304308E31C23FFAFFDFFBFFFC6FFC3FBFF0
|
||||
C2EFC109E1842F8611C6584313FFB3FF8FFFFC3FBFF7FEFF810FFF7CEF8DFF8670C63F
|
||||
DF387F7FEFFDFFFFF9FFFFC77BFF847FFDFFC3FFFF79FFFFE3FFE09DBF,
|
||||
82004608C308200C200A3FAFEFFF18DFF82304308E31C23FFEFFDFFBFFFC6FFC3FBFF0
|
||||
82FFC109E1842F8611C678431BFFF3FF8FFFFC3FBFF7FEFFA116FE7CEF8DFF8670C63F
|
||||
DF387F3FCFFDFFFFF9FFFFC77BFF8477FDFFC5FFFF7BFFFFE3FFE09DFF,
|
||||
82384208C1082F0421863FBBEFFF08DFF82304308E10C23F7EFFDFFBFFFC2FFC3FBFF0
|
||||
C2FFC108C1842C8610C6784318FDF3FF8FFFFC3FBFF7FEFFA11BFF7C2305FF8250423F
|
||||
DF183F7FEFFDFFFFF9FFFFC773FF847EFDFFC7FFFF3BFFFFE3FFE091FF,
|
||||
82384608C3082F0C218E3FBFEFFF18DFF82304308E31C23FFEFFDFFBFFFC6FFC1FBFF0
|
||||
C27FC109E1842B8611C678431BFFF3FF8FFFFC3FBFF7FEFFA11FEF7CEE8DFF8670C600
|
||||
1F387F3FEFFDFFFFF9FFFFC71BFF847FFDFFC7FFFF7BFFFFE3FFE09CFF,
|
||||
82384608C3082F0C218E3FBFEFFF08DFF82304308E11C22DFEFFDFFBFFFC6FFC3FBFF0
|
||||
42FFC109E0842F8211C678431BFFF3FF8FFFFC3FBFE7FEFFA11FFB7C2F8DFF8670C63F
|
||||
DF287F7FEFFDFFFFF9FFFFC763FF847FFDFFC7FFFF53FFFFE3FFC09DFB,
|
||||
82384208C1082F0421863FBEEFFF18DFF82304308E31C23FFEFFDFFBFFFC6FFC3FBFF0
|
||||
C2FBC109E1842F8611C678431BFFB3FF8FFFFC3FBFF7FEFFA11FFF7CEF8DFF8670C63F
|
||||
DF387F7DEFFDFFFFF9FFFFC77BFF847FBDFFC7FFFF7BFFFFE3FFE09DFF,
|
||||
8238420881082F0421863F9FEFFF08DFF82304308E10C23BFEFFDFFBFFFC6FFC3FBFF0
|
||||
C2DFC109E1842F8611C678431AFBF3FF8FFFFC3F3FF7FEFFA11FBF7CEC89FF8670863F
|
||||
DE387F6FEFFDFFFFF9FFFFC47BFF847FFDFFC7FFFF7B7FFFE3FFE09DFF,
|
||||
8238460843082F0C218E3FBFEFFF18DFF82304308E31C23FFEFFDFFBFFFC2FFC3FBFF0
|
||||
C2FFC109E1842F8611C678431BFFF3FF8FFFFC3FBFF7FEFFA11FFF7C6B8DFF8670C225
|
||||
DF183F7FEFFDFFFFF9FFFFC77BFF847FBDFFC7FFFF7BFFFFE3FFE09DBF,
|
||||
82384608C3082F0C218E1B9FEFFF08DFF82304308E10C22DFEFFDFFBFFFC6FFC3FBFF0
|
||||
C2EFC109E1842F8611C678431BFFD3FF8FFFFC3FBFF7FEFFA11BBF7CEF8DFF8670C63F
|
||||
DF387F7FEFFDFFFFF9FFFFC77BFF847FFDFFC7FFFF7BFFFFE3FFE09DFF,
|
||||
82384608C3082F0C218E3FBFEFFF18DFF82304308E31C23FFEFFDFFBFFFC6FFC3EBFF0
|
||||
C2FFC109E1842F8611C6784303FFF3FF8FFFFC3FBFF7FEFFA11FFF7CEF8DFF8250C63F
|
||||
DF387F5FEFFDFFFFF9FFFFC77BFF847FFDFFC7FFFF737FFFE3FFE09DFE,
|
||||
82384608C3082F0C218E3FBFEFFF18DFF82304300E31C23FF6FFDFFBFFFC6FF83FBFF0
|
||||
C2F7C109E1842F8611C678431BFEF3FF8FFFFC3FBFF7FEFFA11FF77C238DFF8670C43F
|
||||
DF205F7FEFFDFFFFF9FFFFC77BFE847FFDFFC7FFFF7BFFFFE3FFE09DFF,
|
||||
82384608C3082F0C218E3FBFEFFF18DFF82304308E31C23FFEFFDFFBFFFC6FFC3FBFF0
|
||||
C2FFC109E0842F8211C678431BFFF3FF87DFFC2FBFF7FEFFA11FFF7CEF85FF8670463B
|
||||
1F387F3FEFFDFFFFF9FFFFC77BFF847FDDFFC7FFFF3BFFFFE3FFE09DBF,
|
||||
82384608C3082F0C218E3FBFEFFF18DFF82304308E31C23FFEFFDFFBFFFC6FFC3DBFF0
|
||||
C2FFC109E1842F8611C678431BFF73FF8FFFFC3FBFF7FEFFA117FF7C230DFF8660C61F
|
||||
5F207F7FEFFDFFFFF9FFFFC77BFF847FFDFFC7FFFF7BFFFFE3FFE09DDF,
|
||||
82384608C3082F0C218E13B7EFFF18DFF82304308E31C23FFEFFDFFBFFFC6FFC3FBFF0
|
||||
C2FDC109E1842F8611C658431BFFF3FF8FFFFC3FBFF7FEFFA10F7F7CED8DFF8670C63F
|
||||
C1387F7FAFFDFFFFF9FFFFC37BFF847EFDFFC7FFFF7BFFFFE3FFE01DFF,
|
||||
82384208C1082F0421863FB7EFFF18DFF82304108E31C23FDEFFDFFBFFFC2FFC3FBFF0
|
||||
C2FDC109C1842D8610C678431AFBF3FF8FFFFC3FBFF7FEFFA11FDF7CEF8DFF8670863D
|
||||
DF387F7EEFFDFF7FF9FFFFC77BFF847FFDFFC7FFFF7BFFFFE3FFE09DFF,
|
||||
82384608C3082F0C218E3FBFEFFF18DFF82304308E31C23FFEFFDFFBFFFC6FFC3FBFF0
|
||||
C2FFC1096184260611C6784319FFF3FF87DFFC2FBFF7FEFFA11FFF7CEF8DFF8670C63F
|
||||
C1387F7FEFFDFFFFF9FFFFC77BFF847EFDFFC7EFFF7BFFFFE3FFE09DDF,
|
||||
82384608C3082F0C218E3DAFEFFF18DFF82104308E31C23FEEFFDFFBFFFC6FFC3DBFF0
|
||||
C2FFC109A184290611C6784319FDF3FF8FFFFC3FBFF7FEFFA119FF7CEF8DFF8630C63F
|
||||
DF387F7FEFFDFFFFF9FDFFC77BFF847BFDFFC7FFFF7BFFFFE3FFE09CFF,
|
||||
82284608C3082C0C210A3FBFEFFF18DFF82304308E31C23FFEFFDFFBFFFC6FFC3FBFF0
|
||||
C2FBC10961842E8610C678431AFFF3FF8FFFFC3FBFF7FEFFA11FFF7CEF8DFF8670C63F
|
||||
DF387F7F6FFDFFFFF9FFFFC77BFF845FFDFFC7FFFF7BFFFFE3FFE01DFF,
|
||||
82380608C3082F0C218E3FB7EFFF18DFF82304308E11C22BFEFFDEFBFFFC6FFC3FBFF0
|
||||
C2BFC101E1842F8611C678431BFFE3FF8BFFFC3FBFF7FEFFA11FFF7CEF8DFF8430443F
|
||||
9F387F7FEFFDFFFFF9BFFFC67BFF847FDDFFC7FFFF7BFFFFE3FFE08DFF,
|
||||
82384608C3082F0C218E3FBFEFFF18DFF82304308E31C23FFEFFDFFBFFFC6FFC3FBFF0
|
||||
C2FFC109E1842F8611C678431BFFF3FF8FFFFC3FBFF7FCFFA11AFF7CEF8DFF8660C63F
|
||||
C1387F7EEFFDFFFFF8FFFFC37BFF847FFDFFC7FFFF7BFFFFE3FFE091FB,
|
||||
82384208C3082F0C21863FBFCFFF18DFF80304308E31C23BFEFFDFFBFFFC4FFC3FBFF0
|
||||
C2FFC109E1842F8611C678431BF7F3FF8FFFFC3FBFF7FEFFA11FFF7CEF8DFF8670C63E
|
||||
DE383F7FEFFDFFFFF93FFFC77BFF847FFDFFC7FFFF7BFFFFE3FFE09DFF,
|
||||
82384608C3082F0C218E3FBFEFFF18DFF82304308E31C23FFEFFDFFBFFFC6FFC37BFF0
|
||||
C2FBC109E1842F8611C638431BFFF3FF8FFFFC3FBFF7FEFFA11FFF7CEF8DFF8670C63F
|
||||
C1385F7BEFFDFFFFF9FFFFC77BFF847FEDFFC7FFFF7BFFFFE3FFE095EF,
|
||||
82384608C3082F0C200E3FBFEFFF18DFF82304308E31C23FFEFFDFFBFFFC6FFC3FBFF0
|
||||
C2DFC109A1842B0611C678431B7FF3FF8FFFFC3FBFF7FEFFA11FEF7CEC8DFF8670C237
|
||||
DF387F7FEFFDFFFFF9FFFFC77BFF847FFDFFC7FFFF7BFFFFE3FFE09DBF,
|
||||
82084608C3082F0C218E3FBDEFFF08DFF82304308E10C23FDEFFDFFBFFFC6FFC3DBFF0
|
||||
C2FFC109E1842C8610C678431ABF73FF87DFFC2FBFF7FEFFA11FFF7CA78DFF8670C63F
|
||||
C1387F7EEFFDFFFFF9FFFFC77BFF847FFDFFC7FFFF7BFFFFE3FFE01DFF,
|
||||
82384208C3082F0C218E2F9FEFFF185FF82304308E31C23FFAFFDFFBFFFC6FFC3DBFF0
|
||||
C2FFC109E1842F8611C678431BFFF3FF8FFFFC3FBFF7FEFFA11FBF7CEF8DFF8670C63F
|
||||
DF387F6FEFFDFFFFF9FFFFC753FF847DFDFFC7FFFF7BFFFFE3FFE01DFF,
|
||||
82384608C3082F0C218E3FBFEFFF18DFF82304308E31C23FFEFFDFFBFFFC6FFC3FBFF0
|
||||
C2FBC109E1842F8211C678431BFFD3FF8FFFFC3FBFF7FEFFA11BFF7C2F8DFF8670C63F
|
||||
DF287F7FEFFDFFFFF9FFFFC73BFF847FFDFFC7FFFF7BFFFFE3FFE09DF7,
|
||||
82384608C3082F0C218E37BFEFFF18DFF82304308E21C22FDEFFDFFBFFFC6FFC3F3FF0
|
||||
C2FFC109E1842F8611C6784119FFF3FF8FFFFC3FBFF7FEFFA11FFF7CEF8DFF0670C63F
|
||||
DF387F77EFFDFFFFF9FFFF877BFF847DFDFFC7FFFF7BFFFFE3FFE01DFF,
|
||||
82384608C3082A0C218E3FB7EFFF18DFF82304308E31C23FFEFFDFFBFFFC6FFC3FBFF0
|
||||
C2BFC109E1842F8611C678431BEFF3FF8FDFFC2FBFF7FEFFA11EFF7CEF8DFF8670C63F
|
||||
DF387F7FEFFDFFFFF9FFFFC77BFF847FFDFFC7FFFF7BFFFFE3FFE09DF7,
|
||||
8238460843082F0C218E3FBBEFFF18DFF82304308E31C23F7EFFDFFBFFFC6FFC30BFF0
|
||||
C2FBC109E1840F8611C678431BFFE3FF8FEFFC3FBFF7FEFFA11FFF7CEF8DFF8670C63F
|
||||
DF387F77EFFDFFFFF9FFFFC753FF847EFDFFC7FFFF6BFFF7E3FFE09DFF,
|
||||
8238420881082F0421863FBFEFFF08DFF82304308E10C23FFEFFDFFBFFFC4FFC3FBFF0
|
||||
C2FFC109E1842F8611C678431BFFF3FF8FFFFC3FBFF7FEFFA11F7F7C2F8DFF8670C63F
|
||||
DF287F7FEFFDFFFFF9FFFFC73BFF847FFDFFC7FFFF7BFFFFE3FFE09CFF,
|
||||
82384408C3082F0C218E3FBBEFFF18DFF82304308E11C22F7EFFDFFBFFFC4FFC3FBFF0
|
||||
C2FF4109E1842F8611C658431BFFE3FF8FDFFC2FBFF7FEFFA11EFF7CEF89FF8670C62F
|
||||
DF187F7FEFFDFFFFF8FFFFC77BFF847FFDFFC7FFFF7BFFFFE3FFE09DFF,
|
||||
82384608C3082F0C218E3FBFEFFF18DFF82304308E31C23FFEFFDFFBFFFC6FFC3FBFF0
|
||||
C2FFC109E1842F8601C678431BFFF3FF8FFFFC3FBFF7FEFFA11FFF7CEF8DFF8670C63F
|
||||
C1387F7DEFFDFFFFF9FFFFC37BFF847FDDFFC7FFFF7BFFFFE3FFE09DFF,
|
||||
82384208C1082F0421863FAFEFFF18DFF82204308E31C23FFEFFDFFBFFFC6FFC3FBFF0
|
||||
82FEC109E1842F86114678431BF7F3FF8FFFFC3FBFF7FEFFA11FFF7CE38DFF8670C63F
|
||||
DF307F7F6FFDFFFFF9FFFFC77BFF807FFDFFC7FFFF5BFFFFE3FFE09DFF,
|
||||
82384608C3082F0C218E3FBFEFFF18DFF82304308E31C23FDEFFDFFBFFFC6FFC3FBFF0
|
||||
42FFC109E1842F8611C678431BFFF3FF8FFFFC3FBFF7FEFFA115FF7C2F8DFF8670C63F
|
||||
DF287F7FEFFDFFFFF9FFFFC77BFF847DFDFFC7FFFF7BFFFFE3FFE09DBF,
|
||||
82384608C3082F0C218E3FBFEFFF18DFF82300308E31C23FBEFFDFFBFFFC6FFC3FBFF0
|
||||
C2DFC109E1842F8611C678431BEFF3FF8FFFFC3FBFF7FEFFA11FEF7CEF85FF8670C63B
|
||||
DF385F7FEFFDFFFFF9FFFFC37BFF847FFDFFC7FFFF7BFFFFE3FFE09DBF,
|
||||
82384608C3082F0C218E3FBFEFFF18DFF82304308E31C23FFEFFDFFBFFFC6FFC3DBFF0
|
||||
C2FFC109E1842F8611C678430BFFF3FF87DFFC2FBFF7FEFFA11FFF7CEF8DFF8670C63F
|
||||
C1387F7FAFFDFFFFF9FFFFC77BFF847FEDFFC7FFFF7BFFFFE3FFE01DFF,
|
||||
82384208C1082F0421863FBEEFFF08DFF82304308E11422FDEFFDFFBFFFC6FFC3FBFF0
|
||||
C27FC109E1842F8611C618431BFFF3FF8FDFFC2FBFF7FEFFA11FFF7CEF8DFF8670C63F
|
||||
DF387F7FEFFDFFFFF9FFFFC77BFF847FFDFFC7FFFF7BFFFFE1FFE09DBF,
|
||||
82384608C3082F0C218E3FBFEFFF18DFF82304308E31C23FFEFFDFFBFFFC6FFC3FBFF0
|
||||
42FFC109E1842F8611C678431BFDF3FF8FFFFC3FBFF7FEFFA11DFF7CEF8DFF8270C63F
|
||||
DF387F7F6FFDFFFFF9FFFFC77BFF847FFDFFC7FFFF7BFFFFE3FFE099FF,
|
||||
82384608C3080F0C218E3FBFEFFF08DFF82304308E11C22EFEFFDFFBFFFC6FFC3FBFF0
|
||||
C2FFC109E1842F8611C678431BFFF3FF8FFFFC3FBFF7FEFFA11FFB7CEF8DFF8670C63F
|
||||
DF387F7FEFFDEFFFF9FFFFC77BFF847FFDFFC7FFFF7BFFFFC3FFE09DFF,
|
||||
82384608C3082F0C218E3FBFAFFF18DFF82304308E31C23FFEFFDFFBFFFC6FFC3FBFF0
|
||||
C2FFC109E1842F8611C678431BFFF3FF87DFFC2FBFF7FEFFA11FFF7CEF8DFF8670C63F
|
||||
DF387F7FEFFDFFFFF9FFFFC77BFF847DFDFFC7FFFF7BFFFFE3FFE01D7F,
|
||||
82384608C3082F0C218E37BFEFFF18DFF82304308E31C23FFEFFDFFBFFFC6FFC2FBFF0
|
||||
C2DFC109E1842F8611C278431BFEF3FF8FDFFC2FBFF7FEFFA11FFF7CEF8DFF8650C63F
|
||||
DF387F7FEFFDFFFFF9FFFFC77BFF847FFDFFC5FFFF79FFFFE3FFE09D7F,
|
||||
82384608C3082A0C218E3BBFCFFF18DFF82304308E31C23FFEFFDFFBFFFC6FFC3FBFF0
|
||||
C2FFC109E1842F8611C678431BFFF3FF8FFFFC3FBFF7FEFFA11DFF7CEF8DFF8670C63F
|
||||
DF387F7EEFFDFFBFF1FCFFC77BFF841BFDFFC3FFFF7BFFFFE3FFE09DFF,
|
||||
82384608C3082F0C218E3FBFEFFF189FF82304308E31C23FFEFFDFFBFFFC6FFC3FBFF0
|
||||
C2FFC109E1802F8611C678431BFEF3FF8FFFFC3FBFF7FEFFA11FF77C2F8DFF8670C63F
|
||||
DF287F77EFFDFFFFF9FFFFC77BFF847FFDFFC7FFFF7BFFFFE3FFE09DFF,
|
||||
02384608C3082F0C218E3F9FEFFF18DFF82304308E31C23FECFFDFFBFFFC6FFC3FBFF0
|
||||
C27FC009E1842F8611C678431BFFF3FF87DFFC2FBFF7FEFFA11FFF7CEF8DFF8670C63F
|
||||
DF387F7FEFFDFFFFF9FFFFC77BFF841DF9FFC7FFFF7BFFFFE3FFE09CFF,
|
||||
82384608C308250C218E37B7EFFF18DFF82304308A31C23FFEFFDFFBFFFC6FFC3FBFF0
|
||||
C2EFC109E1842F8611C678031BFF73FF8FFFFC3FBFF7FEFFA11FF77CEF8DFF8670C61F
|
||||
DF387F7BEFFDFFFFF9FFFFC77BFF8477FDFFC7EFFF7BFFFFE3FFE09CFF,
|
||||
82384608C3082F0C218E1FBFEFFF18DFF82304308E31C23FEEFFDFFBFFFC6FFC3FBFF0
|
||||
42FFC109E1842F8611C678431BFFF3FF87DFFC2FBFF7FEFFA11FFF7CEF8DFF8670C63F
|
||||
DF387F7FEFFDFF7FF9FFFFC77BFF847FFDFFC7FFFF7BFFFFE3FFE09DFF,
|
||||
80384608C3082F0C218E3FBFEFFF18DFF02304308E31C23FF6FFDFFBFFFC6FFC3FBFF0
|
||||
C2FFC109E1842F84118478431BFFF3FF8FFFFC3FBFF7FEFFA11FFF7CCF8DFF8670C63F
|
||||
DF387F7FAFFDFFFFF9FFFFC77BFF847FFDFFC7FFFC7BBFFFE2FFE09DFF,
|
||||
82384608C3082F0C218E3FBEEFFF18DFF82304308E31C23FFEFFDFFBFFFC6FFC3FBFF0
|
||||
C0BFC109E1842F8611C268431BF7F3FF8FFFFC1FBFF7FEFFA11FBF7CEF8DFF8670C63F
|
||||
D7387F7FEFFDFFFFF9FFFFC77BFF847FFDFFC1F7FF7BFFFBE3FFE09D7F,
|
||||
82384608C3002F0C218E3FBF6FFF18DFF82304308E31C23FFEFFDFFBFFF86FFC3FBFF0
|
||||
C2FFC109E1842F8611C678431BFFF3FF8FFFFC3FBFF7FEFFA11BFF7CEF8DFF8670C63F
|
||||
DF387F7FEFFDFFFFF9FFFFC77BFF847DFDFFC7FFFF7BFFFFE3FFE01DFF,
|
||||
82384608C3082F0C218E3FBFE7FF18DFF82304308E31C23BFEFFDFFBFFFC6FFC3FBFF0
|
||||
C2FF0109E1842F8611C678431BEFF3FF8FFFFC3FBFF7FEFFA11FF77CEF8DFF8670C63F
|
||||
DF387F7FEFFDFFFFF9FDFFC77BFF843FFDFFC7FFFF7BFFFFE3FFE09DFB,
|
||||
82384600C3082F0C218E3FBFEFFF08DFF82304308E10C23EFEFFDFFBFFFC6FFC3FBFF0
|
||||
C2DFC109E1842F8611C678431BFFF3FF8FFFFC3FBFF7FEFFA11FFB7CEF8DFF8670C63F
|
||||
DF387F77EFFDFFFFF9FFFFC77BFF847FFDFFC7FFFF7BFFFFE3FFE09DFF,
|
||||
82384608C3082F0C218E3FBFCFFF18DFF82304308E31C23FFEFFDFFBFFFC6FFC3FBFF0
|
||||
42FFC109E1842F8611C678431BFFF3FF87DFFC2FBFF7FEFFA11FFF7CE38DFF8670C63F
|
||||
DF307F7FEFFDFFFFF9FFFFC77BFF847FFDFFC7FFFF7BFFFFE3FFE08DFD,
|
||||
82384608C3082F0C218E3EBFEFFF18DFF82304308E31C21FBEFFDFFBFFFC6FFC3FBFF0
|
||||
C2FFC109E1842F8611C67843192FF3FF8FFFFC3FBFF7FEFFA11F7F7CEF8DFF8670C63F
|
||||
DF387F3FEFFDFFFFF9FFFFC77BFF847FFDFFC7FFFF7AFFFFE3FFE09DFF,
|
||||
82084608C308200C200A3F9FEFFF18DFF82304308E31C23FFEFFDFFBFFFC6FFC3FBFF0
|
||||
C2FFC109E1842F8611C678431AFFF3FF8FFFFC3FBFF7FEFFA11BFF7C2F8DFF8670C63F
|
||||
DF287F7FEFFDFFFFF9FDFFC77BFF8417FDFFC1FFFF7BFFFFE3FFE09CFF,
|
||||
82384608C3082F0C218E3DB7EFFF18DFF82304308631C23FDEFFDFFBFFFC6FFC3FBFF0
|
||||
C2EFC109E1842F8611C6784313FFF3FF8FFFFC3FBFF7FEFFA11BFF7CEF8DFF8670C63F
|
||||
DF387F7FEFFDFFFFF9FFFFC77BFF847FFDFFC7FFFF7BFFFFE3FFE09DFF,
|
||||
82184608C308230C208A3FBFEFFF18DFF82304308E31C23FFEFFDFFBFFFC6FFC3DBFF0
|
||||
C2FFC109E1842F8611C678431BF7F3FF8FFFFC3FBFF7FEFFA11FEF7CEF8DFF8670C63F
|
||||
DF387F7FEFFDFFFFF9FFFFC77BFF847FFDFFC7FFFF3BFFFFE3FFE0917F,
|
||||
82384208C3082F0821863FAFEFFF10DFF82304308E11C22FFAFFDFFBFFFC6FFC3FBFE0
|
||||
C2F7C1092184298610C678431BEFF3FF8FFFFC1FBFF7FEFFA11FF77CEF8DFF8670C63F
|
||||
DF387F7EEFFDFFFFF9FFFFC713FF8477FDFFC7FFFF7BDFFFE3FFE09DFB,
|
||||
82384608C3082F0C218E3FBFEFFF18DFF82304308E31C23FFEFFDFFBFFFC6FFC3FBFF0
|
||||
C2FFC108E184278611C678431BFFF3FF8FFFFC3FBFF7FEFFA117FF7CEF8DFF8670C63F
|
||||
DD387F7FEFFDFFFFF9FFFFC77BFF847FFDFFC7F7FF7BFFFBE3FFE09DFF,
|
||||
82384208C2082F0421863FB7EFFF189FF82204308A31C23FFEFFDFFBFFFC6FFC3FBFF0
|
||||
42EFC109E1842F8611C458431BFFF3FF8FDFFC2FBFF7FEFFA11EFF7CEF8DFF8670C63F
|
||||
DB387F7DEFFDFFFFF8FFFFC37BFF847FDDFFC7FFFF7BFFFFE3FFE09DFF,
|
||||
82384608C3082F0C218E3FBFEFFF185FF82104308631C23BFEFFDFFBFFFC6FFC3FBFF0
|
||||
C2FFC109E1842F8611C638431BFF73FF8FFFFC3FBFF7FEFFA11FFF7CEF8DFF8670C63F
|
||||
DF387F7FEFFDFFFFF97FFFC57BFF847FFDFFC7FFFF7BFFFFE3FFE091F7,
|
||||
82384608C3082F0C218E3FBFEFFF18DFF82304308E31C03FFEFFDFF3FFFC6FFC3FBFF0
|
||||
C2EFC109E1842F8601C6784313FDF3FF8FFFFC3FBFF7FEFFA01FFF7CEF8DFF8670C63F
|
||||
CF387F77EFFDFFFFF9FFFFC77BFF847FFDFFC7FFFF7BFFFFE3FFE09DFF,
|
||||
82384608C3082F0C218E3FBFEFFF18DFF82304308E31C23EFEFFDFFBFFFC4FFC3FBFF0
|
||||
C2FFC109E1842F8611C658431BFFF3FF8FFFFC3FBFF7FEFFA11EFF7CCF8DFF8670C63F
|
||||
DF387F7FEFFDFFFFF9FFFFC77BFF847FFDFFC7FFFF7BFFFFE3FFE090FF,
|
||||
82384608C3082F0C218E3FBF6FFF18DFF82304308E31C23FFEFFDFFBFFFC4FFC3FBFF0
|
||||
C2FDC109E1842F8611C678431BFFD3FF8FFFFC3FBFF7FEFFA11F7F7CEF8DFF8670C63F
|
||||
DF387F7FEFFDFFFFF9FFFFC77BFF847FDDFFC7FFFF43FFFFE3FFE09DFF,
|
||||
82304608C3082F0C218E3FBFEFFF18DFF82304308E31C23FFEFFDFFBFFFC6FFC3BBFF0
|
||||
C2FFC109E1842F8611C6784319FFF3FF8FFFFC3FBFF7FEFFA11BFF7CEF8DFF8670C63F
|
||||
DF387F7FEFFDFFFFF1FEFFC77BFF847FFDFFC7FFFF7BFFFFE3FFE09DFE,
|
||||
82384608C3082F0C218E3FBFEFFF18DFF82304308E31C23FFEFFDFFBFFFC6FFC3FBFF0
|
||||
C2BFC109E1842F8611C678431BFFF3FF8FFFFC3FBFF7FEFFA11FFF7CEF8DFF8670C63F
|
||||
DF387F7FEFFDFFFFF9FFFFC77BFF847FFDFFC7FFFF7BFFFFE0FFE01DDF,
|
||||
82384608C3082F0C218E3FBFEFFF18DFF82304308E31C23FFEFFDFFBFFFC6FFC3FBFF0
|
||||
C0FFC109E0842F8611C678431BFF73FF8FFFFC3FBFF7FCFFA11FFB7CEF8DFF8670C63F
|
||||
DF387F7FEFFDFFFFF9FFFFC77BFF847FFDFFC7FFFF7BFFFFE3FFE09DFF,
|
||||
010000040000100000800800004004010010000040000100000C000030020080080200
|
||||
400000002000008000030000080000300400C01002004008008000040040100300600C
|
||||
0180300000C00003004008010020020000180200400C01001004004000,
|
||||
010000000000000000800000004000010000000000000000000C000030000080000200
|
||||
60000000100000C000010000080000300400C000020060080000000400001002004000
|
||||
0100100000C0000300000800002002000018000040080100000400C000,
|
||||
0300600C0180300600C0180000400C0100300600C01803000008008020020080180200
|
||||
60000180300600C0180300600C00002006008018010020080180000600C0100300200C
|
||||
0080300000800802006008018020060000100300400C0100100400C000,
|
||||
000000000000000000401000002000008000000000000000000C008030000040100100
|
||||
000000000000000000000000000000300200C008010020040000000200000800000008
|
||||
0100000000C00803002004000010000000180100200000800002000000,
|
||||
0000000000000002000000000040000000000000000002000004000020000080000200
|
||||
4000000010000000000200000000002004008010020020080000000000001000000000
|
||||
0100000000400801000000000020040000180000400000000004008000,
|
||||
0300600C0180300400C0180000200C0080300600C01801000004018000060040180300
|
||||
4000018020060080180300600C0000300000C008030000080100000200C0180300200C
|
||||
0080200000401001006004018010020000100200600C00803002004000,
|
||||
0300400C0080200200C00800006008018000060000180300000C0180300400C0180300
|
||||
60000180300600C0100300600C0000300600C0180300600C0180000600001802004004
|
||||
0100100000C0180300600C018030060000180300600C0180300600C000,
|
||||
000000000000000200000000004000010000000000000200000C000030000080000200
|
||||
600000001000004000020000000000300600C0100200600C0080000400001000004000
|
||||
0100100000C00803000008000020040000180100400001000004008000,
|
||||
000000000000000200000000004000010000000000000200000C000030000080000200
|
||||
600000001000004000020000000000300600C0100200600C0080000400001000004000
|
||||
0100100000C00803000008000020040000180100400001000004008000,
|
||||
0300600C0180300600C0180020600C0180300600C0180300040C0180300600C0180300
|
||||
60008180300600C0180300600C0010300600C0180300600C0180020600C0180300600C
|
||||
0180300040C0180300600C018030060008180300600C0180300600C001,
|
||||
0000000000000002008008000040040000100400801003000008000020000000000000
|
||||
2000000030000000000200600800002004008010020060000000000600C01801002004
|
||||
0080100000800000000000008020060000180000000C00002000004000,
|
||||
010000000000000000C000000060000000000600801802000008000030000000000000
|
||||
0000000020000000080200600800003004008010020040040080000600C01801002004
|
||||
0080100000800001000000000030040000180000200800802000004000,
|
||||
0200400801002004008010000040080100200600C01002000008010030040080100200
|
||||
40000100300400C0100200400800002004008010020040080100000600C0180300600C
|
||||
0180300000801802004008010020040000100200600801002004008000,
|
||||
030040000180000600800000006008000030040000180000040C000030040000100000
|
||||
40000180200000800003004000000000020080180000400C0100000400C01000006000
|
||||
018020000080180200000C000030000000100300400001800006000000
|
||||
)
|
||||
terminate
|
||||
-- ROW_WIDTH = 792
|
||||
-- COLUMN_WIDTH = 1
|
||||
(
|
||||
0000010020040080100000400000002004008000000000080000200400801002004008
|
||||
0100000400001000000008010000000080000200400801000000000010020040080100
|
||||
2004008000020000000000200400001000004000000000000000100200
|
||||
)
|
||||
data_CRC (
|
||||
D7C2C15B
|
||||
)
|
||||
),
|
||||
data e_fuse (
|
||||
initialize
|
||||
-- ROW_WIDTH = 792
|
||||
-- COLUMN_WIDTH = 1
|
||||
(
|
||||
0000010020040080100000400000002004008000000000080000200400801002004008
|
||||
0100000400001000000008010000000080000200400801000000000010020040080100
|
||||
2004008000020000000000200400001000004000000000000000100200
|
||||
)
|
||||
data_CRC (
|
||||
1D981639
|
||||
)
|
||||
),
|
||||
data array_tdo (
|
||||
repeat
|
||||
-- ROW_WIDTH = 792
|
||||
-- COLUMN_WIDTH = 80
|
||||
(
|
||||
FDB907FFC7FFFF9EFFFFC3FFBFFE21FFDEE3FFFF9FFFFFBFF7FEFE1CFBFC630E61FFB1
|
||||
F73EFFF081FF7FEFFDFC3FFFF1FFCDFFC8C21A638861F421879083F7430FFDFC3FF63F
|
||||
FFDFFBFF5FFC438C710C20C41FFB18BFF7FCFC718430F410C310621C41,
|
||||
FFB907FFC7FFFFDEFFFFA3FFBFEE21FFDEE3FFFF9FFFFFBFF3FCFE1CFBFC630E61FFB1
|
||||
F73E7F6885FF7FEFFDFC3FFFF1FFCFFFD8C21E638861F421879083FF410FFDFC3FF63F
|
||||
FFDFFBFF7FFC438C710C20C41FFB18FFF7F5FC5004300410C310620041,
|
||||
FF8907FFC7FFFFDCFFFFE3FFBF7E21FFCEE3FFFF9FFFFFBFF7FEFC18FBFC420A41FFA0
|
||||
C43EFFD885FF7FEFFDFC3FFFF1FFCFBF18C21E6308613421831083FF430FFDFC3FF43F
|
||||
FFDFFBFF7EFC4308710C20C41FFB10FFF7DDFC618420F4108310421C41,
|
||||
FF3907FFC7FFFFDEFFFFE3FFBFFE21FFD8E3FFFF9FFFFFBFF7FCFE1CF800630E61FFB1
|
||||
773EF7F885FF7FEFFDFC3FFFF1FFCFFFD8C21E638861D421879083FE430FFDF83FF63F
|
||||
FFDFFBFF7FFC438C710C20C41FFB18FFF7FDFC718430F410C310621C41,
|
||||
DFB903FFC7FFFFCAFFFFE3FFBFFE21FFC6E3FFFF9FFFFFBFF7FEFE14FBFC630E61FFB1
|
||||
F43EDFF885FF7FE7FDFC3FFFF1FFCFFFD8C21E638841F421079083FF420FFDFC3FF63F
|
||||
FFDFFBFF7FB44388710C20C41FFB10FFF7FDFC718430F410C310621C41,
|
||||
FFB907FFC7FFFFDEFFFFE3FFBDFE21FFDEE3FFFF9FFFFFBFF7BEFE1CFBFC630E61FFB1
|
||||
F73EFFF885FF7FEFFDFC3FFFF1FFCDFFD8C21E638861F421879083DF430FFDFC3FF63F
|
||||
FFDFFBFF7FFC438C710C20C41FFB18FFF77DFC618420F4108310421C41,
|
||||
FFB907FFC7FFFEDEFFFFE3FFBFFE21FFDE23FFFF9FFFFFBFF7F6FE1C7BFC610E61FF91
|
||||
373EFDF885FF7FEFFCFC3FFFF1FFCFDF58C21E638861F421879083FB430FFDFC3FF63F
|
||||
FFDFFBFF7FDC4308710C20C41FFB10FFF7F9FC618420F4108110421C41,
|
||||
FDB907FFC7FFFFDEFFFFE3FFBDFE21FFDEE3FFFF9FFFFFBFF7FEFC18FBA4430E61FFB1
|
||||
D63EFFF885FF7FEFFDFC3FFFF1FFCFFFD8C21E638861F421879083FF430FFDFC3FF43F
|
||||
FFDFFBFF7FFC438C710C20C41FFB18FFF7FDFC718430F410C210621C41,
|
||||
FFB907FFC7FFFFDEFFFFE3FFBFFE21FFDEE3FFFF9FFFFFBFF7FEFE1CFBFC630E61FFB1
|
||||
F73EFDD885FF7FEFFDFC3FFFF1FFCBFFD8C21E638861F421879083F7430FFDFC3FF63F
|
||||
FFDFFBFF7FB44308710C20C41FFB10FFF7F9D8718430F410C310621C41,
|
||||
7FB907FFC7FFFECEFFFFE3FFBFFE21FFDEE3FFFF9FFFFFBFF7FAFE1CFBFC630A41FFB1
|
||||
F73EFFF885FF7FEFFDFC3FFFF1FFCFFFC0C21E638861F421879083FF430FFD7C3FF63F
|
||||
FFDFFBFF7FFC438C710C20C41FFB18FFF7FDFC718430F410C310621C41,
|
||||
FFB907FFC7FFFFDEFFFFE3FFBFFE217FDEE3FFFF9FFFFFBFF7FEFA04FBFC230E61FFB1
|
||||
C43EEFF885FF7FEFFDFC3FFFF1FFCF7FD8C21E638861F421879083EF430FFDFC1FF63F
|
||||
FFDFFBFF6FFC438C700C20C41FFB18FFF7FDFC718430F410C310621C41,
|
||||
FDB907FFC7FFFFDCFFFFE3FFBBFE21FFDEE3FFFF9FFFFFBFF7FCFE1CF8DC620E61FFA1
|
||||
F73EFFF885FF7FEFFDF43FFBE1FFCFFFD8C21E638841F421079083FF430FFDFC3FF63F
|
||||
FFDFFBFF7FFC438C710C20C41FFB18FFF7FDFC718430F410C310621C41,
|
||||
FBB907FFC7FFFFDEFFFFE3FFBFFE21FFDEE3FFFF9FFFFFBFF7FEFE04FAF8630661FFB0
|
||||
C43EFFE885FF7FEFFDFC3FFFF1FFCEFFD8C21E638861F421879083FF430FFDBC3FF63F
|
||||
FFDFFBFF7FFC438C710C20C41FFB18FFF7FDFC718430F410C310621C41,
|
||||
FFB807FFC7FFFFDEFFFFE3FFBF7E21FFDEC3FFFF9FFFFFBFF5FEFE1C83FC630E61FFB1
|
||||
B73EFEF085FF7FEFFDFC3FFFF1FFCFFFD8C21A638861F421879083BF430FFDFC3FF63F
|
||||
FFDFFBFF7FFC438C710C20C41FFB18FFF7EDC8718430F410C310621C41,
|
||||
FFB907FFC7FFFFDEFFFFE3FFBFFE21FFDEE3FFFF9FFEFFBFF77EFE1CFBBC610E61FFB1
|
||||
F73EFBF885FF7FEFFDFC3FFFF1FFCFDF58C21E630861B421839083BF430FFDFC3FF43F
|
||||
FFDFFBFF7BFC438C710820C41FFB18FFF7EDFC618420F4108310421C41,
|
||||
FBB907FFC7FFFFDEFFF7E3FFBF7E21FFDEE3FFFF9FFFFFBFF7FEFE1C83FC630E61FFB1
|
||||
F73EFFF885FF7FEFFDF43FFBE1FFCFFF98C21E6388606421869083FF430FFDFC3FF63F
|
||||
FFDFFBFF7FFC438C710C20C41FFB18FFF7FDFC718430F410C310621C41,
|
||||
FF3907FFC7FFFFDEFFFFE3FFBFDE21FFDEE3FFBF9FFFFFBFF7FEFE1CFBFC630C61FFB1
|
||||
F73EFF9885FF7FEFFDFC3FFFF1FFCFBF98C21E6388609421859083FF430FFDBC3FF63F
|
||||
FFDFFBFF77FC438C710C20841FFB18FFF7F5BC718430F410C310621C41,
|
||||
FFB807FFC7FFFFDEFFFFE3FFBFFA21FFDEE3FFFF9FFFFFBFF6FEFE1CFBFC630E61FFB1
|
||||
F73EFFF885FF7FEFFDFC3FFFF1FFCFFF58C21E6308617421869083DF430FFDFC3FF63F
|
||||
FFDFFBFF7FFC438C710C20C41FFB18FFF7FDFC5084303410C310621441,
|
||||
FFB107FFC7FFFFDEFFFFE3FFBBFE21FFDE63FFFD9FFFFFBFF7FEFE1CF9FC220C21FFB1
|
||||
F73EFFF885FF7FEFFDFC3FFFD1FFC7FFD8C21E638861F421878083FD430FFDFC3FF63F
|
||||
FFDF7BFF7FD44388710C20C41FFB18FFF7EDFC718430F410C310601C41,
|
||||
DF8907FFC7FFFFDEFFFFE3FFBFFE21FFDEC3FFFF1FFFFFBFF77EFE1C83FC630661FFB1
|
||||
F73EFF5885FF3FEFFDFC3FFFF1FFCFFFD8C21E638861F421879083FF430FFDFC3FF63F
|
||||
FFDFFBFF7FFC438C710C20C41FFB18FFF7FDFC718430F410C310621C41,
|
||||
FFB907FFC7FFFFDEFFFFE3FFBFFE21FFDEE3FFFC9FFFFFBFF7FEFC1C7B7C630E61FFB1
|
||||
F73EFFF885FF7FEFFDFC3FFFF1FFCFEFD8C21E638861F421879083FF430FFDFC3FF23F
|
||||
FFDFFBFF7FDC438C710C20C01FFB18FFF3FDFC618430F410C310421C41,
|
||||
F7A907FFC7FFFFDEFFFFE3FFB7FE21FFDEE3FFFF9FFFFFBFF7DEFA1C83FC630E61FFB1
|
||||
F73EFFF885FF7FEFFDFC3FFFF1FFCFFFD8C21C638861F421879083DF430FFDEC3FF63F
|
||||
FFDFFBFF7FFC438C710C20C41FFB18FFF7FDFC718430F410C310621C41,
|
||||
FDB907FFC7FFFFDEFFFFE3FFBFFE21FFDEE3FFFF9FFFFFBFF7FEFE1CFBEC430E61FFB1
|
||||
373EF7F885FF7FEFFDFC3FFFF1FFCFFED8C21E638860D421859083FB430FFDFC3FF63F
|
||||
FFDFFBFF7FFC438C710C20C41FFB18FFF7FDFC700430F410C310621C41,
|
||||
FFB807FFC7FFFFDEFFFFE3FFBFFE21FFDEE3FFFF9FFFFFBFF77EFE1C83FC630E61FFB1
|
||||
E53EFFF885FF7FEFFDF43FFBE1FFCEFD58C21E6308613421879083FF430FFDBC3FF63F
|
||||
FFDFFBFF7BFC4308710C20C41FFB10FFF7BDFC718430F410C310621041,
|
||||
FFB807FFC7FFFFDEFFFFE3FFBFBE21FFCAE3FFFF9FFFFFBFF7F6FE1CFBFC630E61FFB1
|
||||
F73EFDF885FF7FEFFDFC3FFFF1FFCFFFD8C21E638861F421879083FF430FFDBC3FF63F
|
||||
FFDFFBFF5FFC438C710C20C41FFA18FFF7F9F4718430F410C310421C41,
|
||||
EFB907FFC7FFFFDEFFFFE3FFBFFE21FFDCE3FFFF9FFFFFBFF7FEFE14FBFC630E61FFB1
|
||||
F43EFFD885FF7FEFFDFC3FFFF1FFCBFFD8C21E638841F421879083DF430FFDFC3FF63F
|
||||
FFDFFBFF7FFC438C710C20C41FFB18FFF7FDFC718430F410C310621C41,
|
||||
FFB807FFC7FFFFDEFFFFE3FFBFBE21FFDEE1FFFF9FFFFFBFF7EEFE1CFBFC630E60FFB1
|
||||
F73EFFF885FF7FEFFDFC3FFFF1FFCFFF98821E638861F421879083FF430FFCFC3FF63F
|
||||
FFDFFBFF7BF44384710C20C41FFB18FFF7FDEC718430F410C310621C41,
|
||||
EFB907FFC7FFFFDEFFFFE3FFBFFE21FFDEE3FFFF9FFFFFBFF7FEFE1CFBFC630E61FFB1
|
||||
F73EFF7885FF7FEFFDF43FFBF1FFCFF7D8C21E638861F421879083FD430FFDFC3FF63F
|
||||
FFDFFBFF7FFC438C710C20C41FFB18FFF7EDFC7184305410C310621C41,
|
||||
FFB907FFC7EFFFD6FFFFE3FFBF7E21FFCAE3FFFF9FFFFFBFF7EEFE1CFBFC630E61FFB1
|
||||
F73EFFF885FF7FEFFDFC3FF7F1FFC7FFD8C21E638861F021879083DF430FFD0C3FF63F
|
||||
FFDFFBFF7EFC438C710C20C41FFB18FFF7DDFC718430F410C210621C41,
|
||||
FF3907FFC7FFFFDEFFFFE3FFBFFE21FFDCE3FFFF9FFFFFBFF7FEFE14FBFC630E61FFB1
|
||||
F43EFEF885FF7FEFFDFC3FFFF1FFCFFFD8C21E638861F421879083FF430FFDFC3FF23F
|
||||
FFDFFBFF7FFC4308710C20C41FFB10FFF7FDFC618420F4108110421C41,
|
||||
FFB907FFC7FFFFDEFFFFE3FFBFFE21FFDEE3FFFF1FFFFFBFF7FEFE18FBF4630E61FF91
|
||||
F73EFF7885FF7FEFFDF43FFBF1FFC7FFD8C21A638861F421879082FF430FFDFC3FF23F
|
||||
FFDFFBFF7EF44388710C20C41FFB18FFF7DDFC718430F410C310221C41,
|
||||
FFB907FFC7FFFFDEFFFFE3FFBBFE21FFDEC3FFFF9FFFFFBFF7BEFE1C83FC630E61FFB1
|
||||
F73EFFF885FF7FEFFDFC3FFFF1FFCFFFD8C21E638061F421879083FF430FFDFC3FF63F
|
||||
FFDFFBFF7FFC438C710C20C41FFB18FFF7FDFC718430F410C310621C41,
|
||||
FFB907FFC7FFFFDAFFFFE3FFBFFE01FFDEE3FFFF9FFFFFBFF6FEFE0CFBFC630E61FFB1
|
||||
C73EFFF885FF7FEFFDFC3FFFF1FFCFEFD8C21E628861F4218790837F410FFDFC3FF63F
|
||||
FFDFFBFF7FFC438C710C20441FFB18FFF7F5FC618420F4108310421C41,
|
||||
FDB907FFC7FFFFDEFFFFE3FFBFBE21FFDEE3FFFF9FFFFFBFF7FEFE14FBFC630E61FFB1
|
||||
F43EFFA885FF7FEFFDFC3FFFF1FFCFFFD8C21E638861F421879083FF420FFDFC3FF63F
|
||||
FFDFFBFF7BFC438C710C20C41FFB18FFF7FDFC718430F410C310621C41,
|
||||
FDB907FFC7FFFFDEFFFFE3FFBFFE21FFDEC3FFFF9FFFFFBFF7FEFA1CFBDC630E61FFA1
|
||||
F73EF7F885FF7FEFFDFC3FFFF1FFCFF7D8C21E638861F421879083FB430FFDFC3FF63F
|
||||
FFDFFBFF7DFC438C710C00C41FFB18FFF7FDFC718430F410C310621C41,
|
||||
FFB807FFC7FFFFDEFFFFE3FFB7FE21FFDEE3FFFF9FFFFFBFF5FEFE1C83FC630E61FFB1
|
||||
F73EFFF885FF7FEFFDF43FFBE1FFCFFFD0C21E638861F421879083FF430FFDBC3FF63F
|
||||
FFDFFBFF7FFC438C710C20C41FFB18FFF7FDFC718430F410C310621C41,
|
||||
FDB907FF87FFFFDEFFFFE3FFBFFE21FFDEE3FFFF9FFFFFBFF7FEFE1CFBFC630E61FFB1
|
||||
F73EFFF885FF7FEFFDF43FFBF1FFCFFFD8C218638861F421879083FE430FFDFC3FF63F
|
||||
FFDFFBFF7BF44288710C20C41FFB10FFF77DFC618420F4108310421C41,
|
||||
FF9907FFC7FFFFDEFFFFE3FFBFFE21FFDEE3FFFF9FFFFFBFF6FEFE1CFBFC630E41FFB1
|
||||
F73EFFB885FF7FEFFDFC3FFFF1FFCFBFD8C21E638861F421879083FF420FFDFC3FF63F
|
||||
FFDFFBFF7FFC438C710C20C41FFB18FFF7FDFC718430F410C310621C41,
|
||||
FFB907FFC3FFFFDEFFFFE3FFBFFE21FFDEE3FFFF9FFFF7BFF7FEFE1CFBFC630E61FFB1
|
||||
F73EDFF885FF7FEFFDFC3FFFF1FFCFFFD8C21E638861F421879083FF430FFDFC3FF63F
|
||||
FFDFFBFF7F744388710C20C41FFB10FFF7FDFC718430F010C310621C41,
|
||||
FEB807FFC7FFFFDEFFFFE3FFBFBE21FFDEE3FFFF9FFFFFBFF7FEFE1CFBFC630E61FFB1
|
||||
F73EFFF885FF7FEFFDF43FFBE1FFCFFFD8C21E638861F421879083FF430FFDFC3FF63F
|
||||
FFDFFBFF7FFC438C710C20C41FFB18FFF5FDFC718430F410C310621C41,
|
||||
FEB907FFC7FFFF9EFFFFA3FFBFFE21FFDEE3FFFF9FFFFFBFF7FEFE1CFBFC630A61FFB1
|
||||
F73EFFF885FF7FEFFDF43FFBF1FFCF7FD8C21E438861F421879083FB430FFDF43FF63F
|
||||
FFDFFBFF7FFC438C710C20C41FFB18FFF7FDEC718430F410C310621C41,
|
||||
FFB907FFC7FFFFDEFFFFC3FFBFD821FFDEE3FF3F8FFDFFBFF77EFE1CFBFC630E61FFB1
|
||||
F73EFFB885FF7FEFFDFC3FFFF1FFCFFFD8C21E638861F421879083FF430FFDFC3FF63F
|
||||
FFDFFBFF7FFC438C710C20C41FFB18FFF3FDDC7184305410C310621C41,
|
||||
FFB907FFC7FFFFDEFFFFE3FFBFFE21FFDEE3FFFF9FFFFFBFF7EEFE14FBFC630E61FFB1
|
||||
F43EEFF885FF7FEFFDFC3FFFF1FFCF7FD8C21E638861F401879083FF430FFDFC3FF63F
|
||||
FFDFFBFF7FFC438C710C20C41FF918FFF7FDFC718430F410C310621C41,
|
||||
FF3907FFC7FFFFDEFFFFE3FF9FB821FFDEE3FFFF9FFFFFBFF7FEFE1CFBFC630E61FFB1
|
||||
F73EFFF885FF7FEFFDF43FFBE1FFCFFFD8C21E638861F421879003FE430FFDFC3FF63F
|
||||
FFDFFBFF37FC438C710C20C41FFB18FFF7F9FC718430F410C310621C40,
|
||||
FF3907FFC7FFFFDEFFF7E3FFBFEE21FFDEE3FFFF9FFFFFBFF7DEFE1CFBF8630E61FFB1
|
||||
F73EEFF885FF7FEFFDFC3FFFF1FFCEFFD8C01E638861F421879083F7430FFDFC3FF63F
|
||||
FFDFFBFF7FFC438C510C20C41FFB18FFF7EDEC718430A410C310621C41,
|
||||
FFB907FFC7FFFFDEFFFFE3FFBFFE21FFDEE3FFFF9FFEFFBFF7FEFE1CFBFC630E61FFB1
|
||||
F73EFFF885FF7FEFFDF43FFBE1FFCFFFD8C21E638861F421879083FF420FFDFC3FF63F
|
||||
FFDFFBFF77FC438C710C20C41FFB18FFF7FDF8718430F410C310621C41,
|
||||
FFB907FF47FFFDDE3FFFE3FFBFFE21FFDEE3FFFF9FFFFFBFF5FEFE1CFBFC630E61FFB1
|
||||
F33EFFF885FF7FEFFDFC3FFFF1FFCFFFD8C21E218821F421879083FF430FFDFC3FF63F
|
||||
FFDFFBFF6FFC438C710C20C40FFB18FFF7FDFC718430F410C310621C01,
|
||||
FEB907FFC7DFFFDEFFEF83FFBFFE21FFDEE3FFFF9FFFFFBFF7FEFE1CEBFC630E61FFB1
|
||||
F73EFDF885FF7FEFFDF83FFFF1FFCFEFD8C216438861F421879083FD030FFDFC3FF63F
|
||||
FFDFFBFF7FFC438C710C20C41FFB18FFF77DFC718430F410C310621C41,
|
||||
FFB807FFC7FFFFDEFFFFE3FFBFBE21FFDEE3FFFF9FFFFFBFF7FEFE1CFBFC630E61FFB1
|
||||
F73EFFD885FF7FEFFDFC3FFFF1FFCFFFD8C21E638861F421879083FF430FFDFC3FF61F
|
||||
FFDFFBFF7FFC438C710C20C41FFB18FFF6FDFC718430F400C310621C41,
|
||||
DFB907FFC7FFFFDEFFFFE3FFBFFC21FFDEE3FFBF9FFFFFBFF7FEFE1CFBFC630E61FFB1
|
||||
F73EEFF885FF7FEFFDFC3FFFF1FFCFF7D8C21E638861F421879080FF430FFDFC3FF63F
|
||||
FFDFFBFF7FDC438C710C20C41FFB18FFE7FDFC718430F410C310621C41,
|
||||
FFB907FFC7FFFFDEFFFFE3FFBFFE21FFDEE3FFFF9FFFFFBFF7EEFE1CFBFC630E61FFB1
|
||||
F73EDFF885FF7FEFFDFC3FFFF1FFCFFFD8C21E638861F421879083FB430FFDFC3FF63F
|
||||
FFDFFBFF7F7C4308710C20C41FFB10FFF7FDFC718430F410C300621C41,
|
||||
BFB107FFC7FFFFDEFFFFE3FFBFFE21FFDEE3FFFF9FFFFFBFF7FEFE0CFBFC630E61FFB1
|
||||
C73EFFF885FF7FEFFDF43FFBE1FFCFFFD8C21E638861F421879083FF420FFDFC3FF63F
|
||||
FFDFFBFF7FFC438C710C20C41FFB18FFF3FDFC718430F410C310621C41,
|
||||
FFB907FFC7FFFF5EFFFFE3FFBFFE21FFDEE3FFFF9FFFFFBFF7FCFE1CFBFC630E61FFB1
|
||||
F73EFEF885FF7FEFFDFC3FFFF1FFCFF498C21E638861F421879083FF430FFDFC3FF63F
|
||||
FFDFFBFF7DF8438C710C20C41FFB18FFF7FD7C718430F410C310621C41,
|
||||
FF3907FFC7FFFFDEFFFF83FFBFE821FFDEE3FFBF9FFFFFBFF7FEFE14FBFC630E61FFB1
|
||||
F43EFFD885FF7FEFFDFC3FFFF1FFCFFF58C21E638861F421879083FF430FFDFC3FF63F
|
||||
FFDFFBFF7FFC438C710C20C41FFB18FFF7F9FC5004300410C310621041,
|
||||
FFB907FFC7FFFFDEFFFFE3FFBFFE21FFDEE3FFFF9FFFFFBFF7FEFE1CFBFC630E61FFB1
|
||||
F73EFFD885FF7FEFFDFC3FFFF1FFCFFFC8C21E638861F421879083F7430FFDFC3FF63F
|
||||
FFDFFBFF7BFC438C610C20C41FFB18FFF7EDBC718430F410C310621C41,
|
||||
FE8907FFC7FFFFDCFFFFE3FFBFFE21FFDEE3FFFF9FFFFFBFF7FEFE1CFBFC630E61FFB1
|
||||
F73EF7F885FF7FEFFDFC3FFFF1FFCFEFD8C21E638861F421879083FF430FFDBC3FF63F
|
||||
FFDFFBFF7FFC438C710C20C41FFB18FFF7FDFC510430C410C310621841,
|
||||
DFB907FFC7FFFBDEFFFFE3FFBFEE21FFC8E3FFFF9FFFFFBFF77EFE1CFBFC630E61FFB1
|
||||
F73EEFF885FF7FEFFDF83FFFF1FFCFF7D8C21E6308619421849083EF4307FDFC3FF63F
|
||||
FFDFFBFF5FF44388710C20C41FFB08FFF7F5FC618410F410C310421C41,
|
||||
FFB907FFC7DFFFDEFFEFE3FFBFFE21FFDEE3FFFF9FFFFFBFF7FEFE1CBBFC630E61FFB1
|
||||
F73EFFE885FF7FEFFDFC3FFFF1FFCFFFD8C21E638861E421871083FF430FFDFC3FF63F
|
||||
FFDFFBFF7FFC438C710C20C41FFB18FFF7FDFC718430F410C310621C41,
|
||||
FFB907FFC7FFFFDEFFFFE3FFBBFE21FFDEC3FFFF1FFFFFBFF7BEFE1CDBFC630E61FFB1
|
||||
F73EFF7885FF7FEFFDF43FFBF1FFCFFFD8C21A238861F421879083F7420FFDFC3FF63F
|
||||
FFDFFBFF7FFC438C510C20441FF918FFF7EDFC618420F4104310421C41,
|
||||
EF8907FFC7FFFFDEFFFFE3FFBFFE21FFDEA3FFFE9FFFFFBFF7FEFE1CFBFC630E61FFB1
|
||||
F73EFFF885FF7FEFFDFC3FFFF1FFCEFFD8C21C638861F421879083FF430FFDFC3FF63F
|
||||
FFDFFBFF7FDC438C610C20841FFA18FFF7FDFC718430F410C310621C41,
|
||||
FFB907FFC7FFFFDEFFFFE3FFBFFE21FFDEE3FFFF9FFFFFBFF7EEFE1CF3FC630E61FFB1
|
||||
F73EFFF805FF7FEFFDFC3FFFF1FFCFBFC8C21E638061F421879083F7430FFDFC3FF63F
|
||||
FFCFFBFF7FFC038C710C20C41FFB18FFF7FDFC718430F410C310621C41,
|
||||
FF0907FFC7FFFFDEFFFFE3FFBFFE21FFDEE3FFFF9FFFFFBFF7FEFE1CFBFC630E61FFB1
|
||||
F33EFF7885FF7FEFFDFC3FFFF1FFCFFFD8C21A638861F421879083FF430FFDFC3FF23F
|
||||
FFDFFBFF7F7C438C710C20C41FFB18FFF7FDFC718430F410C310621C41,
|
||||
FFB907FFC7FFFFC2FFFFE3FFBBFE21FFDEE3FFFF9FFFFFBFF7FEFE1CFBFC630E61FFB1
|
||||
F73EFEF885FF7FEFFDFC3FFFF1FFCBFFD8C21E638861F421879083BF430FFDFC3FF23F
|
||||
FFDFFBFF7FFC438C710C20C41FFB18FFF6FDFC718430F410C310621C41,
|
||||
7FB907FFC7FFFFDEFFFFE3FFBFFE21FFDEE3FF7F8FFFFFBFF7FEFE1CFBFC630E61FFB1
|
||||
F73EFFD885FF7FEFFDFC3FFFF1FFCFFF98C21E638861F421879083FF430FFDDC3FF63F
|
||||
FFDFFBFF7FFC438C710C20C41FFB18FFF7FDFC718430F410C310620C41,
|
||||
FBB807FF07FFFFDEFFFFE3FFBFFE21FFDEE3FFFF9FFFFFBFF7FEFE1CFBFC630E61FFB1
|
||||
F73EFFF885FF7FEFFDFC3FFFF1FFCFFFD8C21E638861F421879083FD430FFDFC3FF63F
|
||||
FFDFFBFF7FFC438C710C20C41FFB18FFF7FDFC718430F410C310621C41,
|
||||
FFB907FFC7FFFFDEFFFFE3FFBFFE21FFDEE3FFFF9FFFFFBFF7FEFE1CFBFC630E61FFB1
|
||||
F73EDFF885FF3FEFFDFC3FFFF1FFCEFFD8C21E638861F421079083FF030FFDFC3FF63F
|
||||
FFDFFBFF7FFC438C710C20C41FFB18FFF7FDFC718430F410C310621C41,
|
||||
0002000208000821002004108000400040080100208400021000084108210420840082
|
||||
0002000100010020040082100208400001000084000010000040000000200410001040
|
||||
0840002100008000020000080008200020001000100008000020000080,
|
||||
0002100200000801002000108000400040000100008400021000080008000020040080
|
||||
0002000000010420040002100208400001000080000210000800000004200400001000
|
||||
0840002100000000000000000008000020000000100000000000000080,
|
||||
0002100208000821002084008000420041080104200410001000084100210400840082
|
||||
1042000108010400801080104200400021042084108210420841080004200410801040
|
||||
0041000100008410821042084008210020001082104208410821042084,
|
||||
0000004000010000040080108000000800002004008410021000000008010000001000
|
||||
0040000000200400801002104008400000000000000000000000000000008000820000
|
||||
0841002100000000000000000100000400000082000000000000000000,
|
||||
0000100200000000002000108000020040000000008010020000000008000000000080
|
||||
0000000000010400040080100200400000000004000000000800000000200400001000
|
||||
0040002000000400000000000000000020000000004000000000000000,
|
||||
0002004008410021042004008000400801082004208000820000004100210400841082
|
||||
1040000008010000841002100008400021042084108010420041080000208410820042
|
||||
0001082000008010821042084100210400001082100208410821042084,
|
||||
0002104208410821042084108000420841082104208410821000080008200020041080
|
||||
0042000108210420841082104208400021042084008210420841080004208410821002
|
||||
0841082100008410800042000108010420001002104000410021002084,
|
||||
0000100200000800002080108000020040000100008410021000080008000020000080
|
||||
0002000100210420040082104208400000000004000200000800000004200400001000
|
||||
0840002100000400000000000008000020000000004000000000000000,
|
||||
0000100200000800002080108000020040000100008410021000080008000020000080
|
||||
0002000100210420040082104208400000000004000200000800000004200400001000
|
||||
0840002100000400000000000008000020000000004000000000000000,
|
||||
8002104208410821042084109000420841082104208410821200084108210420841082
|
||||
1042400108210420841082104208480021042084108210420841090004208410821042
|
||||
0841082120008410821042084108210424001082104208410821042084,
|
||||
0002000000400021000000108000420041000000000000001000080100200400801082
|
||||
1042000000000420040080100200400001042004000000000840000004000000000000
|
||||
0040000100008400801002080000200020001000104000000000000000,
|
||||
0002000000410001040000108000020840000000008000001000080100200400801082
|
||||
1042000100200020040080100208400001042004100000000040000000000000000000
|
||||
0840000100000410801042000000000420000002100000000000000080,
|
||||
0000100200400801042004008000020040080100200410801000084108210420841082
|
||||
1042000008010020040080100200400001002004008210020840080000200400801002
|
||||
0840080100000400821042004008010020000080100200400801002004,
|
||||
0000004200010800002084008000000840002100000410801000004108000420000082
|
||||
1002000008210020001080104000000000002084000010000041080000200000800002
|
||||
0840002120000010800002084000010420000000104200010800002084
|
||||
)
|
||||
terminate
|
||||
-- ROW_WIDTH = 792
|
||||
-- COLUMN_WIDTH = 1
|
||||
(
|
||||
0040080000000000000002000008000020040000000000400001002004008010020040
|
||||
0800000000008010020040000100000000801000000008000020000080100200400801
|
||||
0020040000100000000001002004000000020000080100200400800000
|
||||
)
|
||||
data_CRC (
|
||||
9F0B9D43
|
||||
)
|
||||
),
|
||||
data usercode_tdo (
|
||||
initialize
|
||||
-- ROW_WIDTH = 32
|
||||
-- COLUMN_WIDTH = 1
|
||||
(
|
||||
00000000
|
||||
)
|
||||
),
|
||||
data e_fuse_tdo (
|
||||
initialize
|
||||
-- ROW_WIDTH = 792
|
||||
-- COLUMN_WIDTH = 1
|
||||
(
|
||||
0040080000000000000002000008000020040000000000400001002004008010020040
|
||||
0800000000008010020040000100000000801000000008000020000080100200400801
|
||||
0020040000100000000001002004000000020000080100200400800000
|
||||
)
|
||||
data_CRC (
|
||||
97784E45
|
||||
)
|
||||
),
|
||||
data array_mask (
|
||||
repeat
|
||||
-- ROW_WIDTH = 792
|
||||
-- COLUMN_WIDTH = 80
|
||||
(
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF,
|
||||
0002104208410821042084108000420841082104208410821000084108210420841082
|
||||
1042000108210420841082104208400021042084108210420841080004208410821042
|
||||
0841082100008410821042084108210420001082104208410821042084,
|
||||
0002104208410821042084108000420841082104208410821000084108210420841082
|
||||
1042000108210420841082104208400021042084108210420841080004208410821042
|
||||
0841082100008410821042084108210420001082104208410821042084,
|
||||
0002104208410821042084108000420841082104208410821000084108210420841082
|
||||
1042000108210420841082104208400021042084108210420841080004208410821042
|
||||
0841082100008410821042084108210420001082104208410821042084,
|
||||
8002104208410821042084109000420841082104208410821200084108210420841082
|
||||
1042400108210420841082104208480021042084108210420841090004208410821042
|
||||
0841082120008410821042084108210424001082104208410821042084,
|
||||
0002104208410821042084108000420841082104208410821000084108210420841082
|
||||
1042000108210420841082104208400021042084108210420841080004208410821042
|
||||
0841082100008410821042084108210420001082104208410821042084,
|
||||
0002104208410821042084108000420841082104208410821000084108210420841082
|
||||
1042000108210420841082104208400021042084108210420841080004208410821042
|
||||
0841082100008410821042084108210420001082104208410821042084,
|
||||
0002104208410821042084108000420841082104208410821000084108210420841082
|
||||
1042000108210420841082104208400021042084108210420841080004208410821042
|
||||
0841082100008410821042084108210420001082104208410821042084,
|
||||
8002104208410821042084109000420841082104208410821200084108210420841082
|
||||
1042400108210420841082104208480021042084108210420841090004208410821042
|
||||
0841082120008410821042084108210424001082104208410821042084,
|
||||
0002104208410821042084108000420841082104208410821000084108210420841082
|
||||
1042000108210420841082104208400021042084108210420841080004208410821042
|
||||
0841082100008410821042084108210420001082104208410821042084,
|
||||
8002104208410821042084109000420841082104208410821200084108210420841082
|
||||
1042400108210420841082104208480021042084108210420841090004208410821042
|
||||
0841082120008410821042084108210424001082104208410821042084,
|
||||
0002104208410821042084108000420841082104208410821000084108210420841082
|
||||
1042000108210420841082104208400021042084108210420841080004208410821042
|
||||
0841082100008410821042084108210420001082104208410821042084,
|
||||
8002104208410821042084109000420841082104208410821200084108210420841082
|
||||
1042400108210420841082104208480021042084108210420841090004208410821042
|
||||
0841082120008410821042084108210424001082104208410821042084,
|
||||
0002104208410821042084108000420841082104208410821000084108210420841082
|
||||
1042000108210420841082104208400021042084108210420841080004208410821042
|
||||
0841082100008410821042084108210420001082104208410821042084,
|
||||
0002104208410821042084108000420841082104208410821000084108210420841082
|
||||
1042000108210420841082104208400021042084108210420841080004208410821042
|
||||
0841082120008410821042084108210420001082104208410821042084
|
||||
)
|
||||
)
|
||||
)
|
||||
51A7
|
||||
@ -1,254 +0,0 @@
|
||||
[DEVICE]
|
||||
Family = M4A5;
|
||||
PartType = M4A5-128/64;
|
||||
Package = 100TQFP;
|
||||
PartNumber = M4A5-128/64-10VC;
|
||||
Speed = -10;
|
||||
Operating_condition = COM;
|
||||
EN_Segment = No;
|
||||
Pin_MC_1to1 = No;
|
||||
EN_PinReserve_IO = Yes;
|
||||
EN_PinReserve_BIDIR = Yes;
|
||||
Voltage = 5.0;
|
||||
|
||||
[REVISION]
|
||||
RCS = "$Revision: 1.2 $";
|
||||
Parent = m4a5.lci;
|
||||
SDS_File = m4a5.sds;
|
||||
Design = 68030_tk.tt4;
|
||||
DATE = 2/1/15;
|
||||
TIME = 21:36:55;
|
||||
Source_Format = Pure_VHDL;
|
||||
Type = TT2;
|
||||
Pre_Fit_Time = 1;
|
||||
|
||||
[IGNORE ASSIGNMENTS]
|
||||
Pin_Assignments = No;
|
||||
Pin_Keep_Block = No;
|
||||
Pin_Keep_Segment = No;
|
||||
Group_Assignments = No;
|
||||
Macrocell_Assignments = No;
|
||||
Macrocell_Keep_Block = No;
|
||||
Macrocell_Keep_Segment = No;
|
||||
Pin_Reservation = No;
|
||||
Block_Reservation = No;
|
||||
Segment_Reservation = No;
|
||||
Timing_Constraints = No;
|
||||
|
||||
[CLEAR ASSIGNMENTS]
|
||||
Pin_Assignments = No;
|
||||
Pin_Keep_Block = No;
|
||||
Pin_Keep_Segment = No;
|
||||
Group_Assignments = No;
|
||||
Macrocell_Assignments = No;
|
||||
Macrocell_Keep_Block = No;
|
||||
Macrocell_Keep_Segment = No;
|
||||
Pin_Reservation = No;
|
||||
Block_Reservation = No;
|
||||
Segment_Reservation = No;
|
||||
Timing_Constraints = No;
|
||||
|
||||
[BACKANNOTATE ASSIGNMENTS]
|
||||
Pin_Block = No;
|
||||
Pin_Macrocell_Block = No;
|
||||
Routing = No;
|
||||
|
||||
[GLOBAL CONSTRAINTS]
|
||||
Max_PTerm_Split = 16;
|
||||
Max_PTerm_Collapse = 16;
|
||||
Max_Pin_Percent = 100;
|
||||
Max_Macrocell_Percent = 100;
|
||||
Max_GLB_Input_Percent = 100;
|
||||
Max_Seg_In_Percent = 100;
|
||||
Logic_Reduction = Yes;
|
||||
XOR_Synthesis = Yes;
|
||||
DT_Synthesis = Yes;
|
||||
Node_Collapse = Yes;
|
||||
Run_Time = 0;
|
||||
Set_Reset_Dont_Care = Yes;
|
||||
Clock_Optimize = No;
|
||||
In_Reg_Optimize = Yes;
|
||||
Balanced_Partitioning = Yes;
|
||||
Device_max_fanin = 33;
|
||||
Device_max_pterms = 20;
|
||||
Usercode = 0;
|
||||
Usercode_Format = Hex;
|
||||
|
||||
[LOCATION ASSIGNMENTS]
|
||||
Layer = OFF;
|
||||
A_23_ = pin,85,-,H,-;
|
||||
A_22_ = pin,84,-,H,-;
|
||||
SIZE_1_ = pin,79,-,H,-;
|
||||
A_21_ = pin,94,-,A,-;
|
||||
A_20_ = pin,93,-,A,-;
|
||||
A_31_ = pin,4,-,B,-;
|
||||
A_19_ = pin,97,-,A,-;
|
||||
A_18_ = pin,95,-,A,-;
|
||||
A_17_ = pin,59,-,F,-;
|
||||
A_16_ = pin,96,-,A,-;
|
||||
IPL_2_ = pin,68,-,G,-;
|
||||
FC_1_ = pin,58,-,F,-;
|
||||
IPL_1_ = pin,56,-,F,-;
|
||||
IPL_0_ = pin,67,-,G,-;
|
||||
AS_000 = pin,42,-,E,-;
|
||||
FC_0_ = pin,57,-,F,-;
|
||||
UDS_000 = pin,32,-,D,-;
|
||||
LDS_000 = pin,31,-,D,-;
|
||||
A1 = pin,60,-,F,-;
|
||||
nEXP_SPACE = pin,14,-,-,-;
|
||||
BERR = pin,41,-,E,-;
|
||||
BG_030 = pin,21,-,C,-;
|
||||
BGACK_000 = pin,28,-,D,-;
|
||||
CLK_030 = pin,64,-,-,-;
|
||||
CLK_000 = pin,11,-,-,-;
|
||||
CLK_OSZI = pin,61,-,-,-;
|
||||
CLK_DIV_OUT = pin,65,-,G,-;
|
||||
CLK_EXP = pin,10,-,B,-;
|
||||
FPU_CS = pin,78,-,H,-;
|
||||
FPU_SENSE = pin,91,-,A,-;
|
||||
DTACK = pin,30,-,D,-;
|
||||
AVEC = pin,92,-,A,-;
|
||||
VPA = pin,36,-,-,-;
|
||||
RST = pin,86,-,-,-;
|
||||
AMIGA_BUS_DATA_DIR = pin,48,-,E,-;
|
||||
AMIGA_BUS_ENABLE_LOW = pin,20,-,C,-;
|
||||
AMIGA_BUS_ENABLE_HIGH = pin,34,-,D,-;
|
||||
CIIN = pin,47,-,E,-;
|
||||
SIZE_0_ = pin,70,-,G,-;
|
||||
A_30_ = pin,5,-,B,-;
|
||||
A_29_ = pin,6,-,B,-;
|
||||
A_28_ = pin,15,-,C,-;
|
||||
A_27_ = pin,16,-,C,-;
|
||||
A_26_ = pin,17,-,C,-;
|
||||
A_25_ = pin,18,-,C,-;
|
||||
A_24_ = pin,19,-,C,-;
|
||||
IPL_030_2_ = pin,9,-,B,-;
|
||||
IPL_030_1_ = pin,7,-,B,-;
|
||||
IPL_030_0_ = pin,8,-,B,-;
|
||||
AS_030 = pin,82,-,H,-;
|
||||
RW_000 = pin,80,-,H,-;
|
||||
DS_030 = pin,98,-,A,-;
|
||||
A0 = pin,69,-,G,-;
|
||||
BG_000 = pin,29,-,D,-;
|
||||
BGACK_030 = pin,83,-,H,-;
|
||||
DSACK1 = pin,81,-,H,-;
|
||||
E = pin,66,-,G,-;
|
||||
VMA = pin,35,-,D,-;
|
||||
RESET = pin,3,-,B,-;
|
||||
RW = pin,71,-,G,-;
|
||||
AMIGA_ADDR_ENABLE = pin,33,-,D,-;
|
||||
cpu_est_0_ = node,-,-,A,8;
|
||||
cpu_est_1_ = node,-,-,C,8;
|
||||
inst_AS_000_INT = node,-,-,C,9;
|
||||
inst_AMIGA_BUS_ENABLE_DMA_LOW = node,-,-,B,2;
|
||||
inst_AS_030_D0 = node,-,-,H,5;
|
||||
inst_nEXP_SPACE_D0reg = node,-,-,C,4;
|
||||
inst_DS_030_D0 = node,-,-,D,6;
|
||||
inst_AS_030_000_SYNC = node,-,-,F,12;
|
||||
inst_BGACK_030_INT_D = node,-,-,H,2;
|
||||
SIZE_DMA_0_ = node,-,-,B,9;
|
||||
SIZE_DMA_1_ = node,-,-,H,13;
|
||||
inst_VPA_D = node,-,-,C,13;
|
||||
inst_UDS_000_INT = node,-,-,G,2;
|
||||
inst_LDS_000_INT = node,-,-,B,5;
|
||||
inst_DTACK_D0 = node,-,-,G,11;
|
||||
inst_CLK_OUT_PRE_50 = node,-,-,E,2;
|
||||
inst_CLK_000_D1 = node,-,-,D,2;
|
||||
inst_CLK_000_D0 = node,-,-,G,10;
|
||||
inst_CLK_000_PE = node,-,-,G,9;
|
||||
SM_AMIGA_7_ = node,-,-,F,0;
|
||||
SM_AMIGA_5_ = node,-,-,F,8;
|
||||
inst_CLK_OUT_PRE = node,-,-,E,13;
|
||||
inst_CLK_000_NE = node,-,-,E,8;
|
||||
CLK_000_N_SYNC_11_ = node,-,-,B,6;
|
||||
CLK_000_P_SYNC_9_ = node,-,-,C,11;
|
||||
cpu_est_2_ = node,-,-,G,5;
|
||||
inst_CLK_000_NE_D0 = node,-,-,C,12;
|
||||
SM_AMIGA_3_ = node,-,-,C,1;
|
||||
SM_AMIGA_0_ = node,-,-,F,13;
|
||||
inst_AMIGA_BUS_ENABLE_DMA_HIGH = node,-,-,A,6;
|
||||
SM_AMIGA_6_ = node,-,-,F,4;
|
||||
RESET_DLY_0_ = node,-,-,D,9;
|
||||
RESET_DLY_1_ = node,-,-,D,13;
|
||||
RESET_DLY_2_ = node,-,-,A,13;
|
||||
RESET_DLY_3_ = node,-,-,A,9;
|
||||
RESET_DLY_4_ = node,-,-,A,5;
|
||||
RESET_DLY_5_ = node,-,-,A,1;
|
||||
RESET_DLY_6_ = node,-,-,A,12;
|
||||
RESET_DLY_7_ = node,-,-,A,11;
|
||||
CLK_000_P_SYNC_0_ = node,-,-,D,7;
|
||||
CLK_000_P_SYNC_1_ = node,-,-,F,6;
|
||||
CLK_000_P_SYNC_2_ = node,-,-,D,3;
|
||||
CLK_000_P_SYNC_3_ = node,-,-,C,7;
|
||||
CLK_000_P_SYNC_4_ = node,-,-,A,7;
|
||||
CLK_000_P_SYNC_5_ = node,-,-,C,3;
|
||||
CLK_000_P_SYNC_6_ = node,-,-,C,14;
|
||||
CLK_000_P_SYNC_7_ = node,-,-,A,3;
|
||||
CLK_000_P_SYNC_8_ = node,-,-,A,14;
|
||||
CLK_000_N_SYNC_0_ = node,-,-,D,14;
|
||||
CLK_000_N_SYNC_1_ = node,-,-,C,10;
|
||||
CLK_000_N_SYNC_2_ = node,-,-,G,7;
|
||||
CLK_000_N_SYNC_3_ = node,-,-,D,10;
|
||||
CLK_000_N_SYNC_4_ = node,-,-,A,10;
|
||||
CLK_000_N_SYNC_5_ = node,-,-,G,3;
|
||||
CLK_000_N_SYNC_6_ = node,-,-,C,6;
|
||||
CLK_000_N_SYNC_7_ = node,-,-,F,2;
|
||||
CLK_000_N_SYNC_8_ = node,-,-,G,14;
|
||||
CLK_000_N_SYNC_9_ = node,-,-,G,6;
|
||||
CLK_000_N_SYNC_10_ = node,-,-,B,13;
|
||||
inst_CLK_030_H = node,-,-,A,2;
|
||||
inst_DS_000_ENABLE = node,-,-,F,1;
|
||||
SM_AMIGA_1_ = node,-,-,F,9;
|
||||
SM_AMIGA_4_ = node,-,-,F,5;
|
||||
SM_AMIGA_2_ = node,-,-,C,5;
|
||||
CLK_OUT_PRE_Dreg = node,-,-,G,13;
|
||||
un8_ciin = node,-,-,E,9;
|
||||
state_machine_un15_clk_000_ne_i_n = node,-,-,C,2;
|
||||
CIIN_0 = node,-,-,E,5;
|
||||
|
||||
[GROUP ASSIGNMENTS]
|
||||
Layer = OFF;
|
||||
|
||||
[RESOURCE RESERVATIONS]
|
||||
Layer = OFF;
|
||||
|
||||
[SLEWRATE]
|
||||
Default = SLOW;
|
||||
FAST = CLK_DIV_OUT,CLK_EXP,FPU_CS,AMIGA_BUS_DATA_DIR,AMIGA_BUS_ENABLE_LOW,AMIGA_ADDR_ENABLE,AMIGA_BUS_ENABLE_HIGH;
|
||||
|
||||
[PULLUP]
|
||||
Default = Up;
|
||||
|
||||
[NETLIST/DELAY FORMAT]
|
||||
Delay_File = SDF;
|
||||
Netlist = VHDL;
|
||||
|
||||
[OSM BYPASS]
|
||||
|
||||
[FITTER REPORT FORMAT]
|
||||
Fitter_Options = Yes;
|
||||
Pinout_Diagram = No;
|
||||
Pinout_Listing = Yes;
|
||||
Detailed_Block_Segment_Summary = Yes;
|
||||
Input_Signal_List = Yes;
|
||||
Output_Signal_List = Yes;
|
||||
Bidir_Signal_List = Yes;
|
||||
Node_Signal_List = Yes;
|
||||
Signal_Fanout_List = Yes;
|
||||
Block_Segment_Fanin_List = Yes;
|
||||
Postfit_Eqn = Yes;
|
||||
Prefit_Eqn = Yes;
|
||||
Page_Break = Yes;
|
||||
|
||||
[POWER]
|
||||
Powerlevel = Low,High;
|
||||
Default = High;
|
||||
Low = H,G,F,E,D,C,B,A;
|
||||
Type = GLB;
|
||||
|
||||
[SOURCE CONSTRAINT OPTION]
|
||||
|
||||
[TIMING ANALYZER]
|
||||
Last_source=;
|
||||
Last_source_type=Fmax;
|
||||
|
||||
@ -1,135 +0,0 @@
|
||||
MODEL
|
||||
MODEL_VERSION "1.0";
|
||||
DESIGN "68030_tk";
|
||||
DATE "Sun Feb 01 21:13:56 2015";
|
||||
VENDOR "Lattice Semiconductor Corporation";
|
||||
PROGRAM "STAMP Model Generator";
|
||||
|
||||
/* port name and type */
|
||||
INPUT A1;
|
||||
INPUT A_16;
|
||||
INPUT A_17;
|
||||
INPUT A_18;
|
||||
INPUT A_19;
|
||||
INPUT A_20;
|
||||
INPUT A_21;
|
||||
INPUT A_22;
|
||||
INPUT A_23;
|
||||
INPUT A_24;
|
||||
INPUT A_25;
|
||||
INPUT A_26;
|
||||
INPUT A_27;
|
||||
INPUT A_28;
|
||||
INPUT A_29;
|
||||
INPUT A_30;
|
||||
INPUT A_31;
|
||||
INPUT BGACK_000;
|
||||
INPUT BG_030;
|
||||
INPUT CLK_000;
|
||||
INPUT CLK_030;
|
||||
INPUT CLK_OSZI;
|
||||
INPUT DTACK;
|
||||
INPUT FC_0;
|
||||
INPUT FC_1;
|
||||
INPUT FPU_SENSE;
|
||||
INPUT IPL_0;
|
||||
INPUT IPL_1;
|
||||
INPUT IPL_2;
|
||||
INPUT RST;
|
||||
INPUT VPA;
|
||||
INPUT nEXP_SPACE;
|
||||
OUTPUT AMIGA_ADDR_ENABLE;
|
||||
OUTPUT AMIGA_BUS_DATA_DIR;
|
||||
OUTPUT AMIGA_BUS_ENABLE_HIGH;
|
||||
OUTPUT AMIGA_BUS_ENABLE_LOW;
|
||||
OUTPUT AVEC;
|
||||
OUTPUT BGACK_030;
|
||||
OUTPUT BG_000;
|
||||
OUTPUT CIIN;
|
||||
OUTPUT CLK_DIV_OUT;
|
||||
OUTPUT CLK_EXP;
|
||||
OUTPUT DSACK1;
|
||||
OUTPUT E;
|
||||
OUTPUT FPU_CS;
|
||||
OUTPUT IPL_030_0;
|
||||
OUTPUT IPL_030_1;
|
||||
OUTPUT IPL_030_2;
|
||||
OUTPUT RESET;
|
||||
OUTPUT VMA;
|
||||
INOUT A0;
|
||||
INOUT AS_000;
|
||||
INOUT AS_030;
|
||||
INOUT BERR;
|
||||
INOUT DS_030;
|
||||
INOUT LDS_000;
|
||||
INOUT RW;
|
||||
INOUT RW_000;
|
||||
INOUT SIZE_0;
|
||||
INOUT SIZE_1;
|
||||
INOUT UDS_000;
|
||||
|
||||
/* timing arc definitions */
|
||||
AS_030_AS_000_delay: DELAY AS_030 AS_000;
|
||||
A_20_CIIN_delay: DELAY A_20 CIIN;
|
||||
A_21_CIIN_delay: DELAY A_21 CIIN;
|
||||
A_22_CIIN_delay: DELAY A_22 CIIN;
|
||||
A_23_CIIN_delay: DELAY A_23 CIIN;
|
||||
A_24_CIIN_delay: DELAY A_24 CIIN;
|
||||
A_25_CIIN_delay: DELAY A_25 CIIN;
|
||||
A_26_CIIN_delay: DELAY A_26 CIIN;
|
||||
A_27_CIIN_delay: DELAY A_27 CIIN;
|
||||
A_28_CIIN_delay: DELAY A_28 CIIN;
|
||||
A_29_CIIN_delay: DELAY A_29 CIIN;
|
||||
A_30_CIIN_delay: DELAY A_30 CIIN;
|
||||
A_31_CIIN_delay: DELAY A_31 CIIN;
|
||||
DS_030_LDS_000_delay: DELAY DS_030 LDS_000;
|
||||
DS_030_UDS_000_delay: DELAY DS_030 UDS_000;
|
||||
AS_000_AMIGA_BUS_DATA_DIR_delay: DELAY AS_000 AMIGA_BUS_DATA_DIR;
|
||||
AS_030_FPU_CS_delay: DELAY AS_030 FPU_CS;
|
||||
A_16_FPU_CS_delay: DELAY A_16 FPU_CS;
|
||||
A_17_FPU_CS_delay: DELAY A_17 FPU_CS;
|
||||
A_18_FPU_CS_delay: DELAY A_18 FPU_CS;
|
||||
A_19_FPU_CS_delay: DELAY A_19 FPU_CS;
|
||||
BGACK_000_FPU_CS_delay: DELAY BGACK_000 FPU_CS;
|
||||
FC_0_FPU_CS_delay: DELAY FC_0 FPU_CS;
|
||||
FC_1_FPU_CS_delay: DELAY FC_1 FPU_CS;
|
||||
FPU_SENSE_FPU_CS_delay: DELAY FPU_SENSE FPU_CS;
|
||||
RW_000_AMIGA_BUS_DATA_DIR_delay: DELAY RW_000 AMIGA_BUS_DATA_DIR;
|
||||
CLK_OSZI_AS_000_delay: DELAY CLK_OSZI AS_000;
|
||||
CLK_OSZI_CIIN_delay: DELAY CLK_OSZI CIIN;
|
||||
CLK_OSZI_LDS_000_delay: DELAY CLK_OSZI LDS_000;
|
||||
CLK_OSZI_LDS_000_delay: DELAY CLK_OSZI LDS_000;
|
||||
CLK_OSZI_SIZE_0_delay: DELAY CLK_OSZI SIZE_0;
|
||||
CLK_OSZI_SIZE_0_delay: DELAY CLK_OSZI SIZE_0;
|
||||
CLK_OSZI_SIZE_1_delay: DELAY CLK_OSZI SIZE_1;
|
||||
CLK_OSZI_SIZE_1_delay: DELAY CLK_OSZI SIZE_1;
|
||||
CLK_OSZI_UDS_000_delay: DELAY CLK_OSZI UDS_000;
|
||||
CLK_OSZI_UDS_000_delay: DELAY CLK_OSZI UDS_000;
|
||||
CLK_OSZI_AMIGA_BUS_DATA_DIR_delay: DELAY CLK_OSZI AMIGA_BUS_DATA_DIR;
|
||||
CLK_OSZI_AMIGA_BUS_DATA_DIR_delay: DELAY CLK_OSZI AMIGA_BUS_DATA_DIR;
|
||||
CLK_OSZI_AMIGA_BUS_ENABLE_HIGH_delay: DELAY CLK_OSZI AMIGA_BUS_ENABLE_HIGH;
|
||||
CLK_OSZI_AMIGA_BUS_ENABLE_HIGH_delay: DELAY CLK_OSZI AMIGA_BUS_ENABLE_HIGH;
|
||||
CLK_OSZI_AMIGA_BUS_ENABLE_HIGH_delay: DELAY CLK_OSZI AMIGA_BUS_ENABLE_HIGH;
|
||||
CLK_OSZI_AMIGA_BUS_ENABLE_LOW_delay: DELAY CLK_OSZI AMIGA_BUS_ENABLE_LOW;
|
||||
CLK_OSZI_AMIGA_BUS_ENABLE_LOW_delay: DELAY CLK_OSZI AMIGA_BUS_ENABLE_LOW;
|
||||
CLK_OSZI_CLK_DIV_OUT_delay: DELAY CLK_OSZI CLK_DIV_OUT;
|
||||
CLK_OSZI_CLK_EXP_delay: DELAY CLK_OSZI CLK_EXP;
|
||||
CLK_OSZI_A0_delay: DELAY CLK_OSZI A0;
|
||||
CLK_OSZI_AS_030_delay: DELAY CLK_OSZI AS_030;
|
||||
CLK_OSZI_BGACK_030_delay: DELAY CLK_OSZI BGACK_030;
|
||||
CLK_OSZI_BG_000_delay: DELAY CLK_OSZI BG_000;
|
||||
CLK_OSZI_DSACK1_delay: DELAY CLK_OSZI DSACK1;
|
||||
CLK_OSZI_DS_030_delay: DELAY CLK_OSZI DS_030;
|
||||
CLK_OSZI_E_delay: DELAY CLK_OSZI E;
|
||||
CLK_OSZI_IPL_030_0_delay: DELAY CLK_OSZI IPL_030_0;
|
||||
CLK_OSZI_IPL_030_1_delay: DELAY CLK_OSZI IPL_030_1;
|
||||
CLK_OSZI_IPL_030_2_delay: DELAY CLK_OSZI IPL_030_2;
|
||||
CLK_OSZI_RESET_delay: DELAY CLK_OSZI RESET;
|
||||
CLK_OSZI_RW_delay: DELAY CLK_OSZI RW;
|
||||
CLK_OSZI_RW_000_delay: DELAY CLK_OSZI RW_000;
|
||||
CLK_OSZI_VMA_delay: DELAY CLK_OSZI VMA;
|
||||
CLK_OSZI_AMIGA_ADDR_ENABLE_delay: DELAY CLK_OSZI AMIGA_ADDR_ENABLE;
|
||||
|
||||
/* timing check arc definitions */
|
||||
|
||||
ENDMODEL
|
||||
@ -1,165 +0,0 @@
|
||||
|--------------------------------------------|
|
||||
|- ispLEVER Fitter Report File -|
|
||||
|- Version 1.7.00.05.28.13 -|
|
||||
|- (c)Copyright, Lattice Semiconductor 2002 -|
|
||||
|--------------------------------------------|
|
||||
|
||||
|
||||
; Source file 68030_tk.tt4
|
||||
; FITTER-generated Placements.
|
||||
; DEVICE mach447a
|
||||
; DATE Sun Feb 01 21:36:55 2015
|
||||
|
||||
|
||||
Pin 85 A_23_
|
||||
Pin 84 A_22_
|
||||
Pin 79 SIZE_1_ Comb ; S6=1 S9=1 Pair 287
|
||||
Pin 94 A_21_
|
||||
Pin 93 A_20_
|
||||
Pin 4 A_31_
|
||||
Pin 97 A_19_
|
||||
Pin 95 A_18_
|
||||
Pin 59 A_17_
|
||||
Pin 96 A_16_
|
||||
Pin 68 IPL_2_
|
||||
Pin 58 FC_1_
|
||||
Pin 56 IPL_1_
|
||||
Pin 67 IPL_0_
|
||||
Pin 42 AS_000 Comb ; S6=1 S9=1 Pair 203
|
||||
Pin 57 FC_0_
|
||||
Pin 32 UDS_000 Comb ; S6=1 S9=1 Pair 185
|
||||
Pin 31 LDS_000 Comb ; S6=1 S9=1 Pair 191
|
||||
Pin 60 A1
|
||||
Pin 14 nEXP_SPACE
|
||||
Pin 41 BERR Comb ; S6=1 S9=1 Pair 197
|
||||
Pin 21 BG_030
|
||||
Pin 28 BGACK_000
|
||||
Pin 64 CLK_030
|
||||
Pin 11 CLK_000
|
||||
Pin 61 CLK_OSZI
|
||||
Pin 65 CLK_DIV_OUT Comb ; S6=1 S9=1 Pair 247
|
||||
Pin 10 CLK_EXP Comb ; S6=1 S9=1 Pair 127
|
||||
Pin 78 FPU_CS Comb ; S6=1 S9=1 Pair 271
|
||||
Pin 91 FPU_SENSE
|
||||
Pin 30 DTACK
|
||||
Pin 92 AVEC Comb ; S6=1 S9=1 Pair 107
|
||||
Pin 36 VPA
|
||||
Pin 86 RST
|
||||
Pin 48 AMIGA_BUS_DATA_DIR Comb ; S6=1 S9=1 Pair 199
|
||||
Pin 20 AMIGA_BUS_ENABLE_LOW Comb ; S6=1 S9=1 Pair 149
|
||||
Pin 34 AMIGA_BUS_ENABLE_HIGH Comb ; S6=1 S9=1 Pair 181
|
||||
Pin 47 CIIN Comb ; S6=1 S9=1 Pair 215
|
||||
Pin 70 SIZE_0_ Comb ; S6=1 S9=1 Pair 263
|
||||
Pin 5 A_30_
|
||||
Pin 6 A_29_
|
||||
Pin 15 A_28_
|
||||
Pin 16 A_27_
|
||||
Pin 17 A_26_
|
||||
Pin 18 A_25_
|
||||
Pin 19 A_24_
|
||||
Pin 9 IPL_030_2_ Reg ; S6=0 S9=1 Pair 131
|
||||
Pin 7 IPL_030_1_ Reg ; S6=0 S9=1 Pair 143
|
||||
Pin 8 IPL_030_0_ Reg ; S6=0 S9=1 Pair 137
|
||||
Pin 82 AS_030 Reg ; S6=1 S9=1 Pair 281
|
||||
Pin 80 RW_000 Reg ; S6=1 S9=1 Pair 269
|
||||
Pin 98 DS_030 Reg ; S6=1 S9=1 Pair 101
|
||||
Pin 69 A0 Reg ; S6=1 S9=1 Pair 257
|
||||
Pin 29 BG_000 Reg ; S6=1 S9=1 Pair 175
|
||||
Pin 83 BGACK_030 Reg ; S6=1 S9=1 Pair 275
|
||||
Pin 81 DSACK1 Reg ; S6=1 S9=1 Pair 283
|
||||
Pin 66 E Reg ; S6=1 S9=1 Pair 251
|
||||
Pin 35 VMA Reg ; S6=1 S9=1 Pair 173
|
||||
Pin 3 RESET Reg ; S6=1 S9=1 Pair 125
|
||||
Pin 71 RW Reg ; S6=1 S9=1 Pair 245
|
||||
Pin 33 AMIGA_ADDR_ENABLE Reg ; S6=1 S9=1 Pair 179
|
||||
Node 287 RN_SIZE_1_ Comb ; S6=1 S9=1
|
||||
Node 203 RN_AS_000 Comb ; S6=1 S9=1
|
||||
Node 185 RN_UDS_000 Comb ; S6=1 S9=1
|
||||
Node 191 RN_LDS_000 Comb ; S6=1 S9=1
|
||||
Node 197 RN_BERR Comb ; S6=1 S9=1
|
||||
Node 263 RN_SIZE_0_ Comb ; S6=1 S9=1
|
||||
Node 131 RN_IPL_030_2_ Reg ; S6=0 S9=1
|
||||
Node 143 RN_IPL_030_1_ Reg ; S6=0 S9=1
|
||||
Node 137 RN_IPL_030_0_ Reg ; S6=0 S9=1
|
||||
Node 281 RN_AS_030 Reg ; S6=1 S9=1
|
||||
Node 269 RN_RW_000 Reg ; S6=1 S9=1
|
||||
Node 101 RN_DS_030 Reg ; S6=1 S9=1
|
||||
Node 257 RN_A0 Reg ; S6=1 S9=1
|
||||
Node 175 RN_BG_000 Reg ; S6=1 S9=1
|
||||
Node 275 RN_BGACK_030 Reg ; S6=1 S9=1
|
||||
Node 283 RN_DSACK1 Reg ; S6=1 S9=1
|
||||
Node 251 RN_E Reg ; S6=1 S9=1
|
||||
Node 173 RN_VMA Reg ; S6=1 S9=1
|
||||
Node 125 RN_RESET Reg ; S6=1 S9=1
|
||||
Node 245 RN_RW Reg ; S6=1 S9=1
|
||||
Node 179 RN_AMIGA_ADDR_ENABLE Reg ; S6=1 S9=1
|
||||
Node 113 cpu_est_0_ Reg ; S6=1 S9=1
|
||||
Node 161 cpu_est_1_ Reg ; S6=1 S9=1
|
||||
Node 163 inst_AS_000_INT Reg ; S6=0 S9=1
|
||||
Node 128 inst_AMIGA_BUS_ENABLE_DMA_LOW Reg ; S6=0 S9=1
|
||||
Node 277 inst_AS_030_D0 Reg ; S6=1 S9=1
|
||||
Node 155 inst_nEXP_SPACE_D0reg Reg ; S6=0 S9=1
|
||||
Node 182 inst_DS_030_D0 Reg ; S6=1 S9=1
|
||||
Node 239 inst_AS_030_000_SYNC Reg ; S6=1 S9=1
|
||||
Node 272 inst_BGACK_030_INT_D Reg ; S6=1 S9=1
|
||||
Node 139 SIZE_DMA_0_ Reg ; S6=0 S9=1
|
||||
Node 289 SIZE_DMA_1_ Reg ; S6=1 S9=1
|
||||
Node 169 inst_VPA_D Reg ; S6=0 S9=1
|
||||
Node 248 inst_UDS_000_INT Reg ; S6=1 S9=1
|
||||
Node 133 inst_LDS_000_INT Reg ; S6=0 S9=1
|
||||
Node 262 inst_DTACK_D0 Reg ; S6=1 S9=1
|
||||
Node 200 inst_CLK_OUT_PRE_50 Reg ; S6=1 S9=1
|
||||
Node 176 inst_CLK_000_D1 Reg ; S6=1 S9=1
|
||||
Node 260 inst_CLK_000_D0 Reg ; S6=1 S9=1
|
||||
Node 259 inst_CLK_000_PE Reg ; S6=1 S9=1
|
||||
Node 221 SM_AMIGA_7_ Reg ; S6=1 S9=1
|
||||
Node 233 SM_AMIGA_5_ Reg ; S6=0 S9=1
|
||||
Node 217 inst_CLK_OUT_PRE Reg ; S6=1 S9=1
|
||||
Node 209 inst_CLK_000_NE Reg ; S6=1 S9=1
|
||||
Node 134 CLK_000_N_SYNC_11_ Reg ; S6=1 S9=1
|
||||
Node 166 CLK_000_P_SYNC_9_ Reg ; S6=1 S9=1
|
||||
Node 253 cpu_est_2_ Reg ; S6=1 S9=1
|
||||
Node 167 inst_CLK_000_NE_D0 Reg ; S6=1 S9=1
|
||||
Node 151 SM_AMIGA_3_ Reg ; S6=1 S9=1
|
||||
Node 241 SM_AMIGA_0_ Reg ; S6=0 S9=1
|
||||
Node 110 inst_AMIGA_BUS_ENABLE_DMA_HIGH Reg ; S6=1 S9=1
|
||||
Node 227 SM_AMIGA_6_ Reg ; S6=0 S9=1
|
||||
Node 187 RESET_DLY_0_ Reg ; S6=0 S9=1
|
||||
Node 193 RESET_DLY_1_ Reg ; S6=0 S9=1
|
||||
Node 121 RESET_DLY_2_ Reg ; S6=0 S9=1
|
||||
Node 115 RESET_DLY_3_ Reg ; S6=0 S9=1
|
||||
Node 109 RESET_DLY_4_ Reg ; S6=0 S9=1
|
||||
Node 103 RESET_DLY_5_ Reg ; S6=0 S9=1
|
||||
Node 119 RESET_DLY_6_ Reg ; S6=0 S9=1
|
||||
Node 118 RESET_DLY_7_ Reg ; S6=0 S9=1
|
||||
Node 184 CLK_000_P_SYNC_0_ Reg ; S6=1 S9=1
|
||||
Node 230 CLK_000_P_SYNC_1_ Reg ; S6=1 S9=1
|
||||
Node 178 CLK_000_P_SYNC_2_ Reg ; S6=1 S9=1
|
||||
Node 160 CLK_000_P_SYNC_3_ Reg ; S6=1 S9=1
|
||||
Node 112 CLK_000_P_SYNC_4_ Reg ; S6=1 S9=1
|
||||
Node 154 CLK_000_P_SYNC_5_ Reg ; S6=1 S9=1
|
||||
Node 170 CLK_000_P_SYNC_6_ Reg ; S6=1 S9=1
|
||||
Node 106 CLK_000_P_SYNC_7_ Reg ; S6=1 S9=1
|
||||
Node 122 CLK_000_P_SYNC_8_ Reg ; S6=1 S9=1
|
||||
Node 194 CLK_000_N_SYNC_0_ Reg ; S6=1 S9=1
|
||||
Node 164 CLK_000_N_SYNC_1_ Reg ; S6=1 S9=1
|
||||
Node 256 CLK_000_N_SYNC_2_ Reg ; S6=1 S9=1
|
||||
Node 188 CLK_000_N_SYNC_3_ Reg ; S6=1 S9=1
|
||||
Node 116 CLK_000_N_SYNC_4_ Reg ; S6=1 S9=1
|
||||
Node 250 CLK_000_N_SYNC_5_ Reg ; S6=1 S9=1
|
||||
Node 158 CLK_000_N_SYNC_6_ Reg ; S6=1 S9=1
|
||||
Node 224 CLK_000_N_SYNC_7_ Reg ; S6=1 S9=1
|
||||
Node 266 CLK_000_N_SYNC_8_ Reg ; S6=1 S9=1
|
||||
Node 254 CLK_000_N_SYNC_9_ Reg ; S6=1 S9=1
|
||||
Node 145 CLK_000_N_SYNC_10_ Reg ; S6=1 S9=1
|
||||
Node 104 inst_CLK_030_H Reg ; S6=0 S9=1
|
||||
Node 223 inst_DS_000_ENABLE Reg ; S6=0 S9=1
|
||||
Node 235 SM_AMIGA_1_ Reg ; S6=0 S9=1
|
||||
Node 229 SM_AMIGA_4_ Reg ; S6=0 S9=1
|
||||
Node 157 SM_AMIGA_2_ Reg ; S6=1 S9=1
|
||||
Node 265 CLK_OUT_PRE_Dreg Reg ; S6=1 S9=1
|
||||
Node 211 un8_ciin Comb ; S6=1 S9=1
|
||||
Node 152 state_machine_un15_clk_000_ne_i_n Comb ; S6=1 S9=1
|
||||
Node 205 CIIN_0 Comb ; S6=1 S9=1
|
||||
; Unused Pins & Nodes
|
||||
; -> None Found.
|
||||
1981
Logic/68030_tk.prd
1981
Logic/68030_tk.prd
File diff suppressed because it is too large
Load Diff
1932
Logic/68030_tk.rpt
1932
Logic/68030_tk.rpt
File diff suppressed because it is too large
Load Diff
@ -1,2 +0,0 @@
|
||||
Part Number: M4A5-128/64-10VC
|
||||
Need not generate svf file according to the constraints, exit
|
||||
@ -1,135 +0,0 @@
|
||||
|
||||
|
||||
Design Name = 68030_tk.tt4
|
||||
~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
|
||||
|
||||
*******************
|
||||
* TIMING ANALYSIS *
|
||||
*******************
|
||||
|
||||
Timing Analysis KEY:
|
||||
One unit of delay time is equivalent to one pass
|
||||
through the Central Switch Matrix.
|
||||
.. Delay ( in this column ) not applicable to the indicated signal.
|
||||
TSU, Set-Up Time ( 0 for input-paired signals ),
|
||||
represents the number of switch matrix passes between
|
||||
an input pin and a register setup before clock.
|
||||
TSU is reported on the register.
|
||||
TCO, Clocked Output-to-Pin Time ( 0 for output-paired signals ),
|
||||
represents the number of switch matrix passes between
|
||||
a clocked register and an output pin.
|
||||
TCO is reported on the register.
|
||||
TPD, Propagation Delay Time ( calculated only for combinatorial eqns.),
|
||||
represents the number of switch matrix passes between
|
||||
an input pin and an output pin.
|
||||
TPD is reported on the output pin.
|
||||
TCR, Clocked Output-to-Register Time,
|
||||
represents the number of switch matrix passes between
|
||||
a clocked register and the register it drives ( before clock ).
|
||||
TCR is reported on the driving register.
|
||||
|
||||
TSU TCO TPD TCR
|
||||
#passes #passes #passes #passes
|
||||
SIGNAL NAME min max min max min max min max
|
||||
AMIGA_BUS_DATA_DIR .. .. .. .. 1 2 .. ..
|
||||
AS_030 1 2 0 0 .. .. 1 1
|
||||
RN_AS_030 1 2 0 0 .. .. 1 1
|
||||
DS_030 1 2 0 0 .. .. 1 1
|
||||
RN_DS_030 1 2 0 0 .. .. 1 1
|
||||
A0 1 2 0 0 .. .. .. ..
|
||||
E .. .. 0 0 .. .. 1 2
|
||||
RN_E .. .. 0 0 .. .. 1 2
|
||||
VMA .. .. 0 0 .. .. 1 2
|
||||
RN_VMA .. .. 0 0 .. .. 1 2
|
||||
RW 1 2 0 0 .. .. .. ..
|
||||
cpu_est_0_ .. .. .. .. .. .. 1 2
|
||||
cpu_est_1_ .. .. .. .. .. .. 1 2
|
||||
inst_AS_000_INT 1 1 1 2 .. .. 2 2
|
||||
inst_AMIGA_BUS_ENABLE_DMA_LOW 1 2 1 1 .. .. .. ..
|
||||
SIZE_DMA_0_ 1 2 1 1 .. .. 2 2
|
||||
SIZE_DMA_1_ 1 2 1 1 .. .. 2 2
|
||||
inst_VPA_D 1 1 .. .. .. .. 1 2
|
||||
inst_UDS_000_INT 1 1 1 1 .. .. 2 2
|
||||
inst_LDS_000_INT 1 1 1 1 .. .. 2 2
|
||||
inst_DTACK_D0 1 1 .. .. .. .. 1 2
|
||||
cpu_est_2_ .. .. .. .. .. .. 1 2
|
||||
inst_AMIGA_BUS_ENABLE_DMA_HIGH 1 2 1 1 .. .. .. ..
|
||||
inst_CLK_030_H 1 2 .. .. .. .. 1 1
|
||||
inst_DS_000_ENABLE 1 1 1 1 .. .. 2 2
|
||||
CIIN_0 .. .. .. .. 1 2 .. ..
|
||||
AS_000 .. .. .. .. 1 1 .. ..
|
||||
UDS_000 .. .. .. .. 1 1 .. ..
|
||||
LDS_000 .. .. .. .. 1 1 .. ..
|
||||
FPU_CS .. .. .. .. 1 1 .. ..
|
||||
CIIN .. .. .. .. 1 1 .. ..
|
||||
IPL_030_2_ 1 1 0 0 .. .. 1 1
|
||||
RN_IPL_030_2_ 1 1 0 0 .. .. 1 1
|
||||
IPL_030_1_ 1 1 0 0 .. .. 1 1
|
||||
RN_IPL_030_1_ 1 1 0 0 .. .. 1 1
|
||||
IPL_030_0_ 1 1 0 0 .. .. 1 1
|
||||
RN_IPL_030_0_ 1 1 0 0 .. .. 1 1
|
||||
RW_000 1 1 0 0 .. .. 1 1
|
||||
RN_RW_000 1 1 0 0 .. .. 1 1
|
||||
BG_000 1 1 0 0 .. .. 1 1
|
||||
RN_BG_000 1 1 0 0 .. .. 1 1
|
||||
BGACK_030 1 1 0 1 .. .. 1 1
|
||||
RN_BGACK_030 1 1 0 1 .. .. 1 1
|
||||
DSACK1 1 1 0 0 .. .. 1 1
|
||||
RN_DSACK1 1 1 0 0 .. .. 1 1
|
||||
RESET .. .. 0 0 .. .. 1 1
|
||||
RN_RESET .. .. 0 0 .. .. 1 1
|
||||
AMIGA_ADDR_ENABLE .. .. 0 0 .. .. 1 1
|
||||
RN_AMIGA_ADDR_ENABLE .. .. 0 0 .. .. 1 1
|
||||
inst_AS_030_D0 1 1 1 1 .. .. 1 1
|
||||
inst_nEXP_SPACE_D0reg 1 1 1 1 .. .. 1 1
|
||||
inst_DS_030_D0 1 1 .. .. .. .. 1 1
|
||||
inst_AS_030_000_SYNC 1 1 .. .. .. .. 1 1
|
||||
inst_BGACK_030_INT_D .. .. .. .. .. .. 1 1
|
||||
inst_CLK_OUT_PRE_50 .. .. .. .. .. .. 1 1
|
||||
inst_CLK_000_D1 .. .. .. .. .. .. 1 1
|
||||
inst_CLK_000_D0 1 1 .. .. .. .. 1 1
|
||||
inst_CLK_000_PE .. .. .. .. .. .. 1 1
|
||||
SM_AMIGA_7_ 1 1 1 1 .. .. 1 1
|
||||
SM_AMIGA_5_ 1 1 .. .. .. .. 1 1
|
||||
inst_CLK_OUT_PRE .. .. .. .. .. .. 1 1
|
||||
inst_CLK_000_NE .. .. .. .. .. .. 1 1
|
||||
CLK_000_N_SYNC_11_ .. .. .. .. .. .. 1 1
|
||||
CLK_000_P_SYNC_9_ .. .. .. .. .. .. 1 1
|
||||
inst_CLK_000_NE_D0 .. .. .. .. .. .. 1 1
|
||||
SM_AMIGA_3_ 1 1 .. .. .. .. 1 1
|
||||
SM_AMIGA_0_ 1 1 .. .. .. .. 1 1
|
||||
SM_AMIGA_6_ 1 1 .. .. .. .. 1 1
|
||||
RESET_DLY_0_ .. .. .. .. .. .. 1 1
|
||||
RESET_DLY_1_ .. .. .. .. .. .. 1 1
|
||||
RESET_DLY_2_ .. .. .. .. .. .. 1 1
|
||||
RESET_DLY_3_ .. .. .. .. .. .. 1 1
|
||||
RESET_DLY_4_ .. .. .. .. .. .. 1 1
|
||||
RESET_DLY_5_ .. .. .. .. .. .. 1 1
|
||||
RESET_DLY_6_ .. .. .. .. .. .. 1 1
|
||||
RESET_DLY_7_ .. .. .. .. .. .. 1 1
|
||||
CLK_000_P_SYNC_0_ .. .. .. .. .. .. 1 1
|
||||
CLK_000_P_SYNC_1_ .. .. .. .. .. .. 1 1
|
||||
CLK_000_P_SYNC_2_ .. .. .. .. .. .. 1 1
|
||||
CLK_000_P_SYNC_3_ .. .. .. .. .. .. 1 1
|
||||
CLK_000_P_SYNC_4_ .. .. .. .. .. .. 1 1
|
||||
CLK_000_P_SYNC_5_ .. .. .. .. .. .. 1 1
|
||||
CLK_000_P_SYNC_6_ .. .. .. .. .. .. 1 1
|
||||
CLK_000_P_SYNC_7_ .. .. .. .. .. .. 1 1
|
||||
CLK_000_P_SYNC_8_ .. .. .. .. .. .. 1 1
|
||||
CLK_000_N_SYNC_0_ .. .. .. .. .. .. 1 1
|
||||
CLK_000_N_SYNC_1_ .. .. .. .. .. .. 1 1
|
||||
CLK_000_N_SYNC_2_ .. .. .. .. .. .. 1 1
|
||||
CLK_000_N_SYNC_3_ .. .. .. .. .. .. 1 1
|
||||
CLK_000_N_SYNC_4_ .. .. .. .. .. .. 1 1
|
||||
CLK_000_N_SYNC_5_ .. .. .. .. .. .. 1 1
|
||||
CLK_000_N_SYNC_6_ .. .. .. .. .. .. 1 1
|
||||
CLK_000_N_SYNC_7_ .. .. .. .. .. .. 1 1
|
||||
CLK_000_N_SYNC_8_ .. .. .. .. .. .. 1 1
|
||||
CLK_000_N_SYNC_9_ .. .. .. .. .. .. 1 1
|
||||
CLK_000_N_SYNC_10_ .. .. .. .. .. .. 1 1
|
||||
SM_AMIGA_1_ 1 1 .. .. .. .. 1 1
|
||||
SM_AMIGA_4_ 1 1 .. .. .. .. 1 1
|
||||
SM_AMIGA_2_ 1 1 .. .. .. .. 1 1
|
||||
CLK_OUT_PRE_Dreg .. .. 1 1 .. .. 1 1
|
||||
un8_ciin .. .. .. .. 1 1 .. ..
|
||||
@ -1,267 +0,0 @@
|
||||
[DEVICE]
|
||||
|
||||
Family = M4A5;
|
||||
PartType = M4A5-128/64;
|
||||
Package = 100TQFP;
|
||||
PartNumber = M4A5-128/64-10VC;
|
||||
Speed = -10;
|
||||
Operating_condition = COM;
|
||||
EN_Segment = NO;
|
||||
Pin_MC_1to1 = NO;
|
||||
Voltage = 5.0;
|
||||
|
||||
[REVISION]
|
||||
|
||||
RCS = "$Revision: 1.2 $";
|
||||
Parent = m4a5.lci;
|
||||
SDS_file = m4a5.sds;
|
||||
Design = 68030_tk.tt4;
|
||||
Rev = 0.01;
|
||||
DATE = 2/1/15;
|
||||
TIME = 21:36:55;
|
||||
Type = TT2;
|
||||
Pre_Fit_Time = 1;
|
||||
Source_Format = Pure_VHDL;
|
||||
|
||||
[IGNORE ASSIGNMENTS]
|
||||
|
||||
Pin_Assignments = NO;
|
||||
Pin_Keep_Block = NO;
|
||||
Pin_Keep_Segment = NO;
|
||||
Group_Assignments = NO;
|
||||
Macrocell_Assignments = NO;
|
||||
Macrocell_Keep_Block = NO;
|
||||
Macrocell_Keep_Segment = NO;
|
||||
Pin_Reservation = NO;
|
||||
Timing_Constraints = NO;
|
||||
Block_Reservation = NO;
|
||||
Segment_Reservation = NO;
|
||||
Ignore_Source_Location = NO;
|
||||
Ignore_Source_Optimization = NO;
|
||||
Ignore_Source_Timing = NO;
|
||||
|
||||
[CLEAR ASSIGNMENTS]
|
||||
|
||||
Pin_Assignments = NO;
|
||||
Pin_Keep_Block = NO;
|
||||
Pin_Keep_Segment = NO;
|
||||
Group_Assignments = NO;
|
||||
Macrocell_Assignments = NO;
|
||||
Macrocell_Keep_Block = NO;
|
||||
Macrocell_Keep_Segment = NO;
|
||||
Pin_Reservation = NO;
|
||||
Timing_Constraints = NO;
|
||||
Block_Reservation = NO;
|
||||
Segment_Reservation = NO;
|
||||
Ignore_Source_Location = NO;
|
||||
Ignore_Source_Optimization = NO;
|
||||
Ignore_Source_Timing = NO;
|
||||
|
||||
[BACKANNOTATE NETLIST]
|
||||
|
||||
Netlist = VHDL;
|
||||
Delay_File = SDF;
|
||||
Generic_VCC = ;
|
||||
Generic_GND = ;
|
||||
|
||||
[BACKANNOTATE ASSIGNMENTS]
|
||||
|
||||
Pin_Assignment = NO;
|
||||
Pin_Block = NO;
|
||||
Pin_Macrocell_Block = NO;
|
||||
Routing = NO;
|
||||
|
||||
[GLOBAL PROJECT OPTIMIZATION]
|
||||
|
||||
Balanced_Partitioning = YES;
|
||||
Spread_Placement = YES;
|
||||
Max_Pin_Percent = 100;
|
||||
Max_Macrocell_Percent = 100;
|
||||
Max_Inter_Seg_Percent = 100;
|
||||
Max_Seg_In_Percent = 100;
|
||||
Max_Blk_In_Percent = 100;
|
||||
|
||||
[FITTER REPORT FORMAT]
|
||||
|
||||
Fitter_Options = YES;
|
||||
Pinout_Diagram = NO;
|
||||
Pinout_Listing = YES;
|
||||
Detailed_Block_Segment_Summary = YES;
|
||||
Input_Signal_List = YES;
|
||||
Output_Signal_List = YES;
|
||||
Bidir_Signal_List = YES;
|
||||
Node_Signal_List = YES;
|
||||
Signal_Fanout_List = YES;
|
||||
Block_Segment_Fanin_List = YES;
|
||||
Prefit_Eqn = YES;
|
||||
Postfit_Eqn = YES;
|
||||
Page_Break = YES;
|
||||
|
||||
[OPTIMIZATION OPTIONS]
|
||||
|
||||
Logic_Reduction = YES;
|
||||
Max_PTerm_Split = 16;
|
||||
Max_PTerm_Collapse = 16;
|
||||
XOR_Synthesis = YES;
|
||||
Node_Collapse = Yes;
|
||||
DT_Synthesis = Yes;
|
||||
|
||||
[FITTER GLOBAL OPTIONS]
|
||||
|
||||
Run_Time = 0;
|
||||
Set_Reset_Dont_Care = YES;
|
||||
In_Reg_Optimize = YES;
|
||||
Clock_Optimize = NO;
|
||||
Conf_Unused_IOs = OUT_LOW;
|
||||
|
||||
[POWER]
|
||||
Powerlevel = Low, High;
|
||||
Default = High;
|
||||
Low = 8, H, G, F, E, D, C, B, A;
|
||||
Type = GLB;
|
||||
|
||||
[HARDWARE DEVICE OPTIONS]
|
||||
Zero_Hold_Time = Yes;
|
||||
Signature_Word = 0;
|
||||
Pull_up = Yes;
|
||||
Out_Slew_Rate = SLOW, FAST, 7, CLK_DIV_OUT, CLK_EXP, FPU_CS, AMIGA_BUS_DATA_DIR, AMIGA_BUS_ENABLE_LOW,
|
||||
AMIGA_ADDR_ENABLE, AMIGA_BUS_ENABLE_HIGH;
|
||||
Device_max_fanin = 33;
|
||||
Device_max_pterms = 20;
|
||||
Usercode_Format = Hex;
|
||||
|
||||
[PIN RESERVATIONS]
|
||||
layer = OFF;
|
||||
|
||||
[LOCATION ASSIGNMENT]
|
||||
|
||||
Layer = OFF;
|
||||
A_23_ = INPUT,85, H,-;
|
||||
A_22_ = INPUT,84, H,-;
|
||||
SIZE_1_ = BIDIR,79, H,-;
|
||||
A_21_ = INPUT,94, A,-;
|
||||
A_20_ = INPUT,93, A,-;
|
||||
A_31_ = INPUT,4, B,-;
|
||||
A_19_ = INPUT,97, A,-;
|
||||
A_18_ = INPUT,95, A,-;
|
||||
A_17_ = INPUT,59, F,-;
|
||||
A_16_ = INPUT,96, A,-;
|
||||
IPL_2_ = INPUT,68, G,-;
|
||||
FC_1_ = INPUT,58, F,-;
|
||||
IPL_1_ = INPUT,56, F,-;
|
||||
IPL_0_ = INPUT,67, G,-;
|
||||
AS_000 = BIDIR,42, E,-;
|
||||
FC_0_ = INPUT,57, F,-;
|
||||
UDS_000 = BIDIR,32, D,-;
|
||||
LDS_000 = BIDIR,31, D,-;
|
||||
A1 = INPUT,60, F,-;
|
||||
nEXP_SPACE = INPUT,14,-,-;
|
||||
BERR = BIDIR,41, E,-;
|
||||
BG_030 = INPUT,21, C,-;
|
||||
BGACK_000 = INPUT,28, D,-;
|
||||
CLK_030 = INPUT,64,-,-;
|
||||
CLK_000 = INPUT,11,-,-;
|
||||
CLK_OSZI = INPUT,61,-,-;
|
||||
CLK_DIV_OUT = OUTPUT,65, G,-;
|
||||
CLK_EXP = OUTPUT,10, B,-;
|
||||
FPU_CS = OUTPUT,78, H,-;
|
||||
FPU_SENSE = INPUT,91, A,-;
|
||||
DTACK = INPUT,30, D,-;
|
||||
AVEC = OUTPUT,92, A,-;
|
||||
VPA = INPUT,36,-,-;
|
||||
RST = INPUT,86,-,-;
|
||||
AMIGA_BUS_DATA_DIR = OUTPUT,48, E,-;
|
||||
AMIGA_BUS_ENABLE_LOW = OUTPUT,20, C,-;
|
||||
AMIGA_BUS_ENABLE_HIGH = OUTPUT,34, D,-;
|
||||
CIIN = OUTPUT,47, E,-;
|
||||
SIZE_0_ = BIDIR,70, G,-;
|
||||
A_30_ = INPUT,5, B,-;
|
||||
A_29_ = INPUT,6, B,-;
|
||||
A_28_ = INPUT,15, C,-;
|
||||
A_27_ = INPUT,16, C,-;
|
||||
A_26_ = INPUT,17, C,-;
|
||||
A_25_ = INPUT,18, C,-;
|
||||
A_24_ = INPUT,19, C,-;
|
||||
IPL_030_2_ = OUTPUT,9, B,-;
|
||||
IPL_030_1_ = OUTPUT,7, B,-;
|
||||
IPL_030_0_ = OUTPUT,8, B,-;
|
||||
AS_030 = BIDIR,82, H,-;
|
||||
RW_000 = BIDIR,80, H,-;
|
||||
DS_030 = BIDIR,98, A,-;
|
||||
A0 = BIDIR,69, G,-;
|
||||
BG_000 = OUTPUT,29, D,-;
|
||||
BGACK_030 = OUTPUT,83, H,-;
|
||||
DSACK1 = OUTPUT,81, H,-;
|
||||
E = OUTPUT,66, G,-;
|
||||
VMA = OUTPUT,35, D,-;
|
||||
RESET = OUTPUT,3, B,-;
|
||||
RW = BIDIR,71, G,-;
|
||||
AMIGA_ADDR_ENABLE = OUTPUT,33, D,-;
|
||||
cpu_est_0_ = NODE,8, A,-;
|
||||
cpu_est_1_ = NODE,8, C,-;
|
||||
inst_AS_000_INT = NODE,9, C,-;
|
||||
inst_AMIGA_BUS_ENABLE_DMA_LOW = NODE,2, B,-;
|
||||
inst_AS_030_D0 = NODE,5, H,-;
|
||||
inst_nEXP_SPACE_D0reg = NODE,4, C,-;
|
||||
inst_DS_030_D0 = NODE,6, D,-;
|
||||
inst_AS_030_000_SYNC = NODE,12, F,-;
|
||||
inst_BGACK_030_INT_D = NODE,2, H,-;
|
||||
SIZE_DMA_0_ = NODE,9, B,-;
|
||||
SIZE_DMA_1_ = NODE,13, H,-;
|
||||
inst_VPA_D = NODE,13, C,-;
|
||||
inst_UDS_000_INT = NODE,2, G,-;
|
||||
inst_LDS_000_INT = NODE,5, B,-;
|
||||
inst_DTACK_D0 = NODE,11, G,-;
|
||||
inst_CLK_OUT_PRE_50 = NODE,2, E,-;
|
||||
inst_CLK_000_D1 = NODE,2, D,-;
|
||||
inst_CLK_000_D0 = NODE,10, G,-;
|
||||
inst_CLK_000_PE = NODE,9, G,-;
|
||||
SM_AMIGA_7_ = NODE,0, F,-;
|
||||
SM_AMIGA_5_ = NODE,8, F,-;
|
||||
inst_CLK_OUT_PRE = NODE,13, E,-;
|
||||
inst_CLK_000_NE = NODE,8, E,-;
|
||||
CLK_000_N_SYNC_11_ = NODE,6, B,-;
|
||||
CLK_000_P_SYNC_9_ = NODE,11, C,-;
|
||||
cpu_est_2_ = NODE,5, G,-;
|
||||
inst_CLK_000_NE_D0 = NODE,12, C,-;
|
||||
SM_AMIGA_3_ = NODE,1, C,-;
|
||||
SM_AMIGA_0_ = NODE,13, F,-;
|
||||
inst_AMIGA_BUS_ENABLE_DMA_HIGH = NODE,6, A,-;
|
||||
SM_AMIGA_6_ = NODE,4, F,-;
|
||||
RESET_DLY_0_ = NODE,9, D,-;
|
||||
RESET_DLY_1_ = NODE,13, D,-;
|
||||
RESET_DLY_2_ = NODE,13, A,-;
|
||||
RESET_DLY_3_ = NODE,9, A,-;
|
||||
RESET_DLY_4_ = NODE,5, A,-;
|
||||
RESET_DLY_5_ = NODE,1, A,-;
|
||||
RESET_DLY_6_ = NODE,12, A,-;
|
||||
RESET_DLY_7_ = NODE,11, A,-;
|
||||
CLK_000_P_SYNC_0_ = NODE,7, D,-;
|
||||
CLK_000_P_SYNC_1_ = NODE,6, F,-;
|
||||
CLK_000_P_SYNC_2_ = NODE,3, D,-;
|
||||
CLK_000_P_SYNC_3_ = NODE,7, C,-;
|
||||
CLK_000_P_SYNC_4_ = NODE,7, A,-;
|
||||
CLK_000_P_SYNC_5_ = NODE,3, C,-;
|
||||
CLK_000_P_SYNC_6_ = NODE,14, C,-;
|
||||
CLK_000_P_SYNC_7_ = NODE,3, A,-;
|
||||
CLK_000_P_SYNC_8_ = NODE,14, A,-;
|
||||
CLK_000_N_SYNC_0_ = NODE,14, D,-;
|
||||
CLK_000_N_SYNC_1_ = NODE,10, C,-;
|
||||
CLK_000_N_SYNC_2_ = NODE,7, G,-;
|
||||
CLK_000_N_SYNC_3_ = NODE,10, D,-;
|
||||
CLK_000_N_SYNC_4_ = NODE,10, A,-;
|
||||
CLK_000_N_SYNC_5_ = NODE,3, G,-;
|
||||
CLK_000_N_SYNC_6_ = NODE,6, C,-;
|
||||
CLK_000_N_SYNC_7_ = NODE,2, F,-;
|
||||
CLK_000_N_SYNC_8_ = NODE,14, G,-;
|
||||
CLK_000_N_SYNC_9_ = NODE,6, G,-;
|
||||
CLK_000_N_SYNC_10_ = NODE,13, B,-;
|
||||
inst_CLK_030_H = NODE,2, A,-;
|
||||
inst_DS_000_ENABLE = NODE,1, F,-;
|
||||
SM_AMIGA_1_ = NODE,9, F,-;
|
||||
SM_AMIGA_4_ = NODE,5, F,-;
|
||||
SM_AMIGA_2_ = NODE,5, C,-;
|
||||
CLK_OUT_PRE_Dreg = NODE,13, G,-;
|
||||
un8_ciin = NODE,9, E,-;
|
||||
state_machine_un15_clk_000_ne_i_n = NODE,2, C,-;
|
||||
CIIN_0 = NODE,5, E,-;
|
||||
@ -1,219 +0,0 @@
|
||||
[DEVICE]
|
||||
Family = M4A5;
|
||||
PartType = M4A5-128/64;
|
||||
Package = 100TQFP;
|
||||
PartNumber = M4A5-128/64-10VC;
|
||||
Speed = -10;
|
||||
Operating_condition = COM;
|
||||
EN_Segment = No;
|
||||
Pin_MC_1to1 = No;
|
||||
EN_PinReserve_IO = Yes;
|
||||
EN_PinReserve_BIDIR = Yes;
|
||||
Voltage = 5.0;
|
||||
|
||||
[REVISION]
|
||||
RCS = "$Revision: 1.2 $";
|
||||
Parent = m4a5.lci;
|
||||
SDS_File = m4a5.sds;
|
||||
DATE = 02/01/2015;
|
||||
TIME = 21:17:58;
|
||||
Source_Format = Pure_VHDL;
|
||||
Type = TT2;
|
||||
Pre_Fit_Time = 1;
|
||||
|
||||
[IGNORE ASSIGNMENTS]
|
||||
Pin_Assignments = No;
|
||||
Pin_Keep_Block = No;
|
||||
Pin_Keep_Segment = No;
|
||||
Group_Assignments = No;
|
||||
Macrocell_Assignments = No;
|
||||
Macrocell_Keep_Block = No;
|
||||
Macrocell_Keep_Segment = No;
|
||||
Pin_Reservation = No;
|
||||
Block_Reservation = No;
|
||||
Segment_Reservation = No;
|
||||
Timing_Constraints = No;
|
||||
|
||||
[CLEAR ASSIGNMENTS]
|
||||
Pin_Assignments = No;
|
||||
Pin_Keep_Block = No;
|
||||
Pin_Keep_Segment = No;
|
||||
Group_Assignments = No;
|
||||
Macrocell_Assignments = No;
|
||||
Macrocell_Keep_Block = No;
|
||||
Macrocell_Keep_Segment = No;
|
||||
Pin_Reservation = No;
|
||||
Block_Reservation = No;
|
||||
Segment_Reservation = No;
|
||||
Timing_Constraints = No;
|
||||
|
||||
[BACKANNOTATE ASSIGNMENTS]
|
||||
Pin_Block = No;
|
||||
Pin_Macrocell_Block = No;
|
||||
Routing = No;
|
||||
|
||||
[GLOBAL PROJECT OPTIMIZATION]
|
||||
Balanced_Partitioning = Yes;
|
||||
Spread_Placement = Yes;
|
||||
Max_Pin_Percent = 100;
|
||||
Max_Macrocell_Percent = 100;
|
||||
Max_Blk_In_Percent = 100;
|
||||
|
||||
[OPTIMIZATION OPTIONS]
|
||||
Logic_Reduction = Yes;
|
||||
Max_PTerm_Split = 16;
|
||||
Max_PTerm_Collapse = 16;
|
||||
XOR_Synthesis = Yes;
|
||||
EN_XOR_Synthesis = Yes;
|
||||
XOR_Gate = Yes;
|
||||
Node_Collapse = Yes;
|
||||
Keep_XOR = Yes;
|
||||
DT_Synthesis = Yes;
|
||||
Clock_PTerm = Min;
|
||||
Reset_PTerm = On;
|
||||
Preset_PTerm = On;
|
||||
Clock_Enable_PTerm = On;
|
||||
Output_Enable_PTerm = On;
|
||||
EN_DT_Synthesis = Yes;
|
||||
Cluster_PTerm = 5;
|
||||
FF_inv = No;
|
||||
EN_Use_CE = No;
|
||||
Use_CE = No;
|
||||
Use_Internal_COM_FB = Yes;
|
||||
EN_use_Internal_COM_FB = Yes;
|
||||
Set_Reset_Swap = No;
|
||||
EN_Set_Reset_Swap = No;
|
||||
Density = No;
|
||||
DeMorgan = Yes;
|
||||
T_FF = Yes;
|
||||
Max_Symbols = 32;
|
||||
|
||||
[FITTER GLOBAL OPTIONS]
|
||||
Run_Time = 0;
|
||||
Set_Reset_Dont_Care = Yes;
|
||||
EN_Set_Reset_Dont_Care = Yes;
|
||||
In_Reg_Optimize = Yes;
|
||||
EN_In_Reg_Optimize = No;
|
||||
Clock_Optimize = No;
|
||||
Global_Clock_As_Pterm = No;
|
||||
Show_Iterations = No;
|
||||
Routing_Attempts = 2;
|
||||
Conf_Unused_IOs = Out_Low;
|
||||
|
||||
[HARDWARE DEVICE OPTIONS]
|
||||
Zero_Hold_Time = Yes;
|
||||
Signature_Word = 0;
|
||||
Pull_up = Yes;
|
||||
Out_Slew_Rate = SLOW,FAST,7,CLK_DIV_OUT,CLK_EXP,FPU_CS,AMIGA_BUS_DATA_DIR,AMIGA_BUS_ENABLE_LOW,AMIGA_ADDR_ENABLE,AMIGA_BUS_ENABLE_HIGH;
|
||||
Device_max_fanin = 33;
|
||||
Device_max_pterms = 20;
|
||||
Usercode_Format = Hex;
|
||||
|
||||
[PIN RESERVATIONS]
|
||||
Layer = OFF;
|
||||
|
||||
[LOCATION ASSIGNMENT]
|
||||
Layer = OFF;
|
||||
AS_030 = input,82,H,-;
|
||||
A_16_ = input,96,A,-;
|
||||
A_17_ = input,59,F,-;
|
||||
A_18_ = input,95,A,-;
|
||||
A_19_ = input,97,A,-;
|
||||
BGACK_000 = input,28,D,-;
|
||||
BG_030 = input,21,C,-;
|
||||
CLK_000 = input,11,-,-;
|
||||
CLK_030 = input,64,-,-;
|
||||
CLK_OSZI = input,61,-,-;
|
||||
FC_0_ = input,57,F,-;
|
||||
FC_1_ = input,58,F,-;
|
||||
IPL_0_ = input,67,G,-;
|
||||
IPL_1_ = input,56,F,-;
|
||||
IPL_2_ = input,68,G,-;
|
||||
RST = input,86,-,-;
|
||||
RW = input,71,G,-;
|
||||
SIZE_1_ = input,79,H,-;
|
||||
SIZE_0_ = input,70,G,-;
|
||||
VPA = input,36,-,-;
|
||||
AVEC = input,92,A,-;
|
||||
BGACK_030 = input,83,H,-;
|
||||
BG_000 = input,29,D,-;
|
||||
CLK_DIV_OUT = input,65,G,-;
|
||||
CLK_EXP = input,10,B,-;
|
||||
E = input,66,G,-;
|
||||
FPU_CS = input,78,H,-;
|
||||
IPL_030_0_ = input,8,B,-;
|
||||
IPL_030_1_ = input,7,B,-;
|
||||
IPL_030_2_ = input,9,B,-;
|
||||
LDS_000 = input,31,D,-;
|
||||
UDS_000 = input,32,D,-;
|
||||
VMA = input,35,D,-;
|
||||
DTACK = input,30,D,-;
|
||||
RESET = input,3,B,-;
|
||||
AMIGA_BUS_DATA_DIR = input,48,E,-;
|
||||
AMIGA_BUS_ENABLE_LOW = input,20,C,-;
|
||||
CIIN = input,47,E,-;
|
||||
A_20_ = input,93,A,-;
|
||||
A_21_ = input,94,A,-;
|
||||
A_22_ = input,84,H,-;
|
||||
A_24_ = input,19,C,-;
|
||||
A_25_ = input,18,C,-;
|
||||
A_26_ = input,17,C,-;
|
||||
A_27_ = input,16,C,-;
|
||||
A_28_ = input,15,C,-;
|
||||
A_29_ = input,6,B,-;
|
||||
A_30_ = input,5,B,-;
|
||||
A_31_ = input,4,B,-;
|
||||
DS_030 = input,98,A,-;
|
||||
BERR = input,41,E,-;
|
||||
nEXP_SPACE = input,14,-,-;
|
||||
A0 = input,69,G,-;
|
||||
DSACK1 = input,81,H,-;
|
||||
RW_000 = input,80,H,-;
|
||||
AS_000 = input,42,E,-;
|
||||
AMIGA_ADDR_ENABLE = input,33,D,-;
|
||||
AMIGA_BUS_ENABLE_HIGH = input,34,D,-;
|
||||
A_23_ = input,85,H,-;
|
||||
FPU_SENSE = input,91,A,-;
|
||||
A1 = input,60,F,-;
|
||||
|
||||
[GROUP ASSIGNMENT]
|
||||
Layer = OFF;
|
||||
|
||||
[SPACE RESERVATIONS]
|
||||
Layer = OFF;
|
||||
|
||||
[BACKANNOTATE NETLIST]
|
||||
Delay_File = SDF;
|
||||
Netlist = VHDL;
|
||||
VCC_GND = Cell;
|
||||
|
||||
[FITTER REPORT FORMAT]
|
||||
Fitter_Options = Yes;
|
||||
Pinout_Diagram = No;
|
||||
Pinout_Listing = Yes;
|
||||
Detailed_Block_Segment_Summary = Yes;
|
||||
Input_Signal_List = Yes;
|
||||
Output_Signal_List = Yes;
|
||||
Bidir_Signal_List = Yes;
|
||||
Node_Signal_List = Yes;
|
||||
Signal_Fanout_List = Yes;
|
||||
Block_Segment_Fanin_List = Yes;
|
||||
Postfit_Eqn = Yes;
|
||||
Page_Break = Yes;
|
||||
|
||||
[POWER]
|
||||
Powerlevel = Low,High;
|
||||
Default = High;
|
||||
Low = 8,H,G,F,E,D,C,B,A;
|
||||
Type = GLB;
|
||||
|
||||
[SOURCE CONSTRAINT OPTION]
|
||||
Import_source_constraint = Yes;
|
||||
Disable_warning_message = No;
|
||||
|
||||
[TIMING ANALYZER]
|
||||
Last_source=;
|
||||
Last_source_type=Fmax;
|
||||
|
||||
[INPUT REGISTERS]
|
||||
|
||||
@ -1,16 +0,0 @@
|
||||
Signal Name Cross Reference File
|
||||
|
||||
ispLEVER Classic 1.7.00.05.28.13
|
||||
|
||||
Design '68030_tk' created Sun Feb 01 21:36:50 2015
|
||||
|
||||
|
||||
LEGEND: '>' Functional Block Port Separator
|
||||
'/' Hierarchy Path Separator
|
||||
'@' Automatically Generated Node
|
||||
|
||||
|
||||
Short Name Hierarchical Name
|
||||
---------- -----------------
|
||||
|
||||
*** Shortened names not required for this design. ***
|
||||
3737
Logic/BUS68030.edi
3737
Logic/BUS68030.edi
File diff suppressed because it is too large
Load Diff
@ -1,20 +1,20 @@
|
||||
|
||||
fsm_encoding {7143321431} onehot
|
||||
fsm_encoding {7144321441} onehot
|
||||
|
||||
fsm_state_encoding {7143321431} idle_p {00000001}
|
||||
fsm_state_encoding {7144321441} idle_p {00000001}
|
||||
|
||||
fsm_state_encoding {7143321431} idle_n {00000010}
|
||||
fsm_state_encoding {7144321441} idle_n {00000010}
|
||||
|
||||
fsm_state_encoding {7143321431} as_set_p {00000100}
|
||||
fsm_state_encoding {7144321441} as_set_p {00000100}
|
||||
|
||||
fsm_state_encoding {7143321431} as_set_n {00001000}
|
||||
fsm_state_encoding {7144321441} as_set_n {00001000}
|
||||
|
||||
fsm_state_encoding {7143321431} sample_dtack_p {00010000}
|
||||
fsm_state_encoding {7144321441} sample_dtack_p {00010000}
|
||||
|
||||
fsm_state_encoding {7143321431} data_fetch_n {00100000}
|
||||
fsm_state_encoding {7144321441} data_fetch_n {00100000}
|
||||
|
||||
fsm_state_encoding {7143321431} data_fetch_p {01000000}
|
||||
fsm_state_encoding {7144321441} data_fetch_p {01000000}
|
||||
|
||||
fsm_state_encoding {7143321431} end_cycle_n {10000000}
|
||||
fsm_state_encoding {7144321441} end_cycle_n {10000000}
|
||||
|
||||
fsm_registers {7143321431} {SM_AMIGA[0]} {SM_AMIGA[1]} {SM_AMIGA[2]} {SM_AMIGA[3]} {SM_AMIGA[4]} {SM_AMIGA[5]} {SM_AMIGA[6]} {SM_AMIGA[7]}
|
||||
fsm_registers {7144321441} {SM_AMIGA[0]} {SM_AMIGA[1]} {SM_AMIGA[2]} {SM_AMIGA[3]} {SM_AMIGA[4]} {SM_AMIGA[5]} {SM_AMIGA[6]} {SM_AMIGA[7]}
|
||||
|
||||
@ -1,61 +0,0 @@
|
||||
AS_030 b
|
||||
AS_000 b
|
||||
RW_000 b
|
||||
DS_030 b
|
||||
UDS_000 b
|
||||
LDS_000 b
|
||||
SIZE[1] b
|
||||
SIZE[0] b
|
||||
A[31] i
|
||||
A[30] i
|
||||
A[29] i
|
||||
A[28] i
|
||||
A[27] i
|
||||
A[26] i
|
||||
A[25] i
|
||||
A[24] i
|
||||
A[23] i
|
||||
A[22] i
|
||||
A[21] i
|
||||
A[20] i
|
||||
A[19] i
|
||||
A[18] i
|
||||
A[17] i
|
||||
A[16] i
|
||||
A0 b
|
||||
A1 i
|
||||
nEXP_SPACE i
|
||||
BERR b
|
||||
BG_030 i
|
||||
BG_000 o
|
||||
BGACK_030 o
|
||||
BGACK_000 i
|
||||
CLK_030 i
|
||||
CLK_000 i
|
||||
CLK_OSZI i
|
||||
CLK_DIV_OUT o
|
||||
CLK_EXP o
|
||||
FPU_CS o
|
||||
FPU_SENSE i
|
||||
IPL_030[2] o
|
||||
IPL_030[1] o
|
||||
IPL_030[0] o
|
||||
IPL[2] i
|
||||
IPL[1] i
|
||||
IPL[0] i
|
||||
DSACK1 b
|
||||
DTACK b
|
||||
AVEC o
|
||||
E o
|
||||
VPA i
|
||||
VMA o
|
||||
RST i
|
||||
RESET o
|
||||
RW b
|
||||
FC[1] i
|
||||
FC[0] i
|
||||
AMIGA_ADDR_ENABLE o
|
||||
AMIGA_BUS_DATA_DIR o
|
||||
AMIGA_BUS_ENABLE_LOW o
|
||||
AMIGA_BUS_ENABLE_HIGH o
|
||||
CIIN o
|
||||
@ -1,6 +1,6 @@
|
||||
#-- Lattice Semiconductor Corporation Ltd.
|
||||
#-- Synplify OEM project file c:/users/matze/documents/github/68030tk/logic\BUS68030.prj
|
||||
#-- Written on Sun Feb 01 21:36:43 2015
|
||||
#-- Written on Tue Feb 03 09:23:39 2015
|
||||
|
||||
|
||||
#device options
|
||||
|
||||
@ -6,7 +6,7 @@
|
||||
#Implementation: logic
|
||||
|
||||
$ Start of Compile
|
||||
#Sun Feb 01 21:36:43 2015
|
||||
#Tue Feb 03 09:23:39 2015
|
||||
|
||||
Synopsys VHDL Compiler, version comp201209rcp1, Build 283R, built Mar 19 2013
|
||||
@N|Running in 64-bit mode
|
||||
@ -18,23 +18,24 @@ File C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd changed -
|
||||
VHDL syntax check successful!
|
||||
File C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd changed - recompiling
|
||||
@N: CD630 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":13:7:13:14|Synthesizing work.bus68030.behavioral
|
||||
@W: CD638 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":125:7:125:20|Signal clk_out_pre_33 is undriven
|
||||
@W: CD638 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":126:7:126:22|Signal clk_out_pre_33_d is undriven
|
||||
@W: CD638 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":127:8:127:17|Signal clk_pre_66 is undriven
|
||||
@W: CD638 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":125:7:125:20|Signal clk_out_pre_25 is undriven
|
||||
@W: CD638 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":126:7:126:20|Signal clk_out_pre_33 is undriven
|
||||
@W: CD638 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":127:7:127:22|Signal clk_out_pre_33_d is undriven
|
||||
@W: CD638 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":128:8:128:17|Signal clk_pre_66 is undriven
|
||||
@W: CD638 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":129:7:129:17|Signal clk_out_pre is undriven
|
||||
@W: CD638 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":131:7:131:16|Signal clk_out_ne is undriven
|
||||
@W: CD638 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":132:7:132:17|Signal clk_out_int is undriven
|
||||
Post processing for work.bus68030.behavioral
|
||||
@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":143:32:143:34|Pruning register CLK_REF(1 downto 0)
|
||||
@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":136:34:136:36|Pruning register CLK_000_D4
|
||||
@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":135:34:135:36|Pruning register CLK_000_D3
|
||||
@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":134:34:134:36|Pruning register CLK_000_D2
|
||||
@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":129:35:129:37|Pruning register CLK_OUT_INT
|
||||
@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":129:35:129:37|Pruning register CLK_OUT_NE
|
||||
@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":123:38:123:40|Pruning register CLK_OUT_PRE_25
|
||||
@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":122:36:122:38|Pruning register CLK_OUT_PRE_50_D
|
||||
@W: CL265 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":138:61:138:75|Pruning bit 12 of CLK_000_N_SYNC(12 downto 0) -- not in use ...
|
||||
@W: CL271 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":137:34:137:36|Pruning bits 12 to 10 of CLK_000_P_SYNC(12 downto 0) -- not in use ...
|
||||
@A: CL282 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":142:37:142:39|Feedback mux created for signal CLK_000_PE -- possible set/reset assignment for signal missing. Specifying a reset value will improve timing and area.
|
||||
@A: CL282 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":140:34:140:36|Feedback mux created for signal CLK_000_NE -- possible set/reset assignment for signal missing. Specifying a reset value will improve timing and area.
|
||||
@N: CL201 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":143:32:143:34|Trying to extract state machine for register SM_AMIGA
|
||||
@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":144:32:144:34|Pruning register CLK_REF(1 downto 0)
|
||||
@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":248:2:248:3|Pruning register RESET_DLY(5 downto 0)
|
||||
@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":137:34:137:36|Pruning register CLK_000_D4
|
||||
@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":136:34:136:36|Pruning register CLK_000_D3
|
||||
@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":135:34:135:36|Pruning register CLK_000_D2
|
||||
@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":123:36:123:38|Pruning register CLK_OUT_PRE_50_D
|
||||
@W: CL265 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":139:61:139:75|Pruning bit 12 of CLK_000_N_SYNC(12 downto 0) -- not in use ...
|
||||
@W: CL271 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":138:34:138:36|Pruning bits 12 to 10 of CLK_000_P_SYNC(12 downto 0) -- not in use ...
|
||||
@N: CL201 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":143:37:143:39|Trying to extract state machine for register cpu_est
|
||||
@N: CL201 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":144:32:144:34|Trying to extract state machine for register SM_AMIGA
|
||||
Extracted state machine for register SM_AMIGA
|
||||
State machine has 8 reachable states with original encodings of:
|
||||
000
|
||||
@ -45,10 +46,9 @@ State machine has 8 reachable states with original encodings of:
|
||||
101
|
||||
110
|
||||
111
|
||||
@N: CL201 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":142:37:142:39|Trying to extract state machine for register cpu_est
|
||||
@END
|
||||
Process took 0h:00m:01s realtime, 0h:00m:01s cputime
|
||||
# Sun Feb 01 21:36:43 2015
|
||||
# Tue Feb 03 09:23:39 2015
|
||||
|
||||
###########################################################]
|
||||
Map & Optimize Report
|
||||
@ -67,22 +67,22 @@ original code -> new code
|
||||
101 -> 00100000
|
||||
110 -> 01000000
|
||||
111 -> 10000000
|
||||
@N: MO106 :"c:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":214:4:214:7|Found ROM, 'pos_clk\.cpu_est_12[3:0]', 16 words by 4 bits
|
||||
@N: MO106 :"c:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":215:4:215:7|Found ROM, 'pos_clk\.cpu_est_11[3:0]', 16 words by 4 bits
|
||||
---------------------------------------
|
||||
Resource Usage Report
|
||||
|
||||
Simple gate primitives:
|
||||
DFFRH 12 uses
|
||||
DFF 33 uses
|
||||
DFFSH 28 uses
|
||||
DFFRH 18 uses
|
||||
DFF 34 uses
|
||||
BI_DIR 11 uses
|
||||
IBUF 32 uses
|
||||
OBUF 16 uses
|
||||
BUFTH 2 uses
|
||||
AND2 237 uses
|
||||
INV 176 uses
|
||||
AND2 215 uses
|
||||
INV 181 uses
|
||||
XOR2 4 uses
|
||||
OR2 21 uses
|
||||
XOR2 9 uses
|
||||
|
||||
|
||||
@N: FC100 |Timing Report not generated for this device, please use place and route tools for timing analysis.
|
||||
@ -92,6 +92,6 @@ Mapper successful!
|
||||
At Mapper Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 31MB peak: 96MB)
|
||||
|
||||
Process took 0h:00m:01s realtime, 0h:00m:01s cputime
|
||||
# Sun Feb 01 21:36:45 2015
|
||||
# Tue Feb 03 09:23:41 2015
|
||||
|
||||
###########################################################]
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
#-- Synopsys, Inc.
|
||||
#-- Version G-2012.09LC-SP1
|
||||
#-- Project file C:\users\matze\documents\github\68030tk\logic\run_options.txt
|
||||
#-- Written on Sun Feb 01 21:36:43 2015
|
||||
#-- Written on Tue Feb 03 09:23:39 2015
|
||||
|
||||
|
||||
#project files
|
||||
|
||||
@ -1,39 +0,0 @@
|
||||
ABEL5DEV=C:\Program Files (x86)\ispLever\ispcpld\lib5
|
||||
DIOEDA_ABEL5DEV=C:\Program Files (x86)\ispLever\ispcpld\lib5
|
||||
DIOEDA_ActiveHDL=C:\Program Files (x86)\ispLever\active-hdl\BIN
|
||||
DIOEDA_ActiveHDLPath=C:\Program Files (x86)\ispLever\active-hdl\BIN
|
||||
DIOEDA_AppNotes=C:\Program Files (x86)\ispLever\ispcpld\bin
|
||||
DIOEDA_Bin=C:\Program Files (x86)\ispLever\ispcpld\bin
|
||||
DIOEDA_Config=C:\Program Files (x86)\ispLever\ispcpld\config
|
||||
DIOEDA_CONTEXT=ispLEVER CLASSIC
|
||||
DIOEDA_DSPPATH=C:\Program Files (x86)\ispLever\ispLeverDSP
|
||||
DIOEDA_EPICPATH=C:\Program Files (x86)\ispLever\ispfpga\bin\nt
|
||||
DIOEDA_Examples=C:\Program Files (x86)\ispLever\examples
|
||||
DIOEDA_FPGABinPath=C:\Program Files (x86)\ispLever\ispfpga\bin\nt
|
||||
DIOEDA_FPGAPath=C:\Program Files (x86)\ispLever\ispfpga
|
||||
DIOEDA_HDLExplorer=C:\Program Files (x86)\ispLever\hdle\win32
|
||||
DIOEDA_INI=C:\lsc_env
|
||||
DIOEDA_ispVM=C:\Program Files (x86)\ispLever\ispvmsystem
|
||||
DIOEDA_ispVMSystem=C:\Program Files (x86)\ispLever\ispvmsystem
|
||||
DIOEDA_License=C:\Program Files (x86)\ispLever\license
|
||||
DIOEDA_MachPath=C:\Program Files (x86)\ispLever\ispcpld\bin
|
||||
DIOEDA_Manuals=C:\Program Files (x86)\ispLever\ispcpld\manuals
|
||||
DIOEDA_ModelSim=C:\Program Files (x86)\ispLever\modelsim\win32loem
|
||||
DIOEDA_ModelsimPath=C:\Program Files (x86)\ispLever\modelsim\win32loem
|
||||
DIOEDA_PDSPath=C:\Program Files (x86)\ispLever\ispcomp
|
||||
DIOEDA_Precision=C:\isptools\precision
|
||||
DIOEDA_PrecisionPath=C:\isptools\precision
|
||||
DIOEDA_ProductName=ispLEVER
|
||||
DIOEDA_ProductPrefix=SYN
|
||||
DIOEDA_ProductTitle=ispLEVER
|
||||
DIOEDA_ProductType=1.7.00.05.28.13_LS_HDL_BASE_PC_N
|
||||
DIOEDA_ProductVersion=1.7.00.05
|
||||
DIOEDA_ProgramFolder=Lattice Semiconductor ispLEVER Classic 1.7
|
||||
DIOEDA_Root=C:\Program Files (x86)\ispLever\ispcpld
|
||||
DIOEDA_Spectrum=C:\isptools\spectrum
|
||||
DIOEDA_SpectrumPath=C:\isptools\spectrum
|
||||
DIOEDA_Synplify=C:\Program Files (x86)\ispLever\synpbase
|
||||
DIOEDA_SynplifyPath=C:\Program Files (x86)\ispLever\synpbase
|
||||
DIOEDA_Tutorial=C:\Program Files (x86)\ispLever\ispcpld\tutorial
|
||||
DIOPRODUCT=ispLEVER
|
||||
PATH=C:\Program Files (x86)\ispLever\ispcpld\bin
|
||||
@ -12,22 +12,22 @@ original code -> new code
|
||||
101 -> 00100000
|
||||
110 -> 01000000
|
||||
111 -> 10000000
|
||||
@N: MO106 :"c:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":214:4:214:7|Found ROM, 'pos_clk\.cpu_est_12[3:0]', 16 words by 4 bits
|
||||
@N: MO106 :"c:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":215:4:215:7|Found ROM, 'pos_clk\.cpu_est_11[3:0]', 16 words by 4 bits
|
||||
---------------------------------------
|
||||
Resource Usage Report
|
||||
|
||||
Simple gate primitives:
|
||||
DFFRH 12 uses
|
||||
DFF 33 uses
|
||||
DFFSH 28 uses
|
||||
DFFRH 18 uses
|
||||
DFF 34 uses
|
||||
BI_DIR 11 uses
|
||||
IBUF 32 uses
|
||||
OBUF 16 uses
|
||||
BUFTH 2 uses
|
||||
AND2 237 uses
|
||||
INV 176 uses
|
||||
AND2 215 uses
|
||||
INV 181 uses
|
||||
XOR2 4 uses
|
||||
OR2 21 uses
|
||||
XOR2 9 uses
|
||||
|
||||
|
||||
@N: FC100 |Timing Report not generated for this device, please use place and route tools for timing analysis.
|
||||
@ -37,6 +37,6 @@ Mapper successful!
|
||||
At Mapper Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 31MB peak: 96MB)
|
||||
|
||||
Process took 0h:00m:01s realtime, 0h:00m:01s cputime
|
||||
# Sun Feb 01 21:36:45 2015
|
||||
# Tue Feb 03 09:23:41 2015
|
||||
|
||||
###########################################################]
|
||||
|
||||
@ -1,3 +1,4 @@
|
||||
@E: CD415 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":237:5:237:11|Expecting keyword if
|
||||
@E|Parse errors encountered - exiting
|
||||
@E: CD371 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":471:18:471:43|No matching overload for "or"
|
||||
@E: CD308 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":471:18:471:43|Unable to evaluate expression type
|
||||
@E: CD676 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":471:18:471:43|Can't implement expression (no function signature?)
|
||||
|
||||
|
||||
@ -2,6 +2,6 @@
|
||||
@N: CD720 :"C:\Program Files (x86)\ispLever\synpbase\lib\vhd\std.vhd":123:18:123:21|Setting time resolution to ns
|
||||
@N:"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":13:7:13:14|Top entity is set to BUS68030.
|
||||
@N: CD630 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":13:7:13:14|Synthesizing work.bus68030.behavioral
|
||||
@N: CL201 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":143:32:143:34|Trying to extract state machine for register SM_AMIGA
|
||||
@N: CL201 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":142:37:142:39|Trying to extract state machine for register cpu_est
|
||||
@N: CL201 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":143:37:143:39|Trying to extract state machine for register cpu_est
|
||||
@N: CL201 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":144:32:144:34|Trying to extract state machine for register SM_AMIGA
|
||||
|
||||
|
||||
@ -18,7 +18,7 @@ The file contains the job information from compiler to be displayed as part of t
|
||||
<report_link name="more"><data>C:\users\matze\documents\github\68030tk\logic\synlog\report\BUS68030_compiler_notes.txt</data></report_link>
|
||||
</info>
|
||||
<info name="Warnings">
|
||||
<data>13</data>
|
||||
<data>15</data>
|
||||
<report_link name="more"><data>C:\users\matze\documents\github\68030tk\logic\synlog\report\BUS68030_compiler_warnings.txt</data></report_link>
|
||||
</info>
|
||||
<info name="Errors">
|
||||
@ -29,13 +29,13 @@ The file contains the job information from compiler to be displayed as part of t
|
||||
<data>-</data>
|
||||
</info>
|
||||
<info name="Real Time">
|
||||
<data>0h:00m:00s</data>
|
||||
<data>0h:00m:01s</data>
|
||||
</info>
|
||||
<info name="Peak Memory">
|
||||
<data>-</data>
|
||||
</info>
|
||||
<info name="Date &Time">
|
||||
<data type="timestamp">1422823003</data>
|
||||
<data type="timestamp">1422951820</data>
|
||||
</info>
|
||||
</job_info>
|
||||
</job_run_status>
|
||||
@ -1,14 +1,16 @@
|
||||
@W: CD638 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":125:7:125:20|Signal clk_out_pre_33 is undriven
|
||||
@W: CD638 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":126:7:126:22|Signal clk_out_pre_33_d is undriven
|
||||
@W: CD638 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":127:8:127:17|Signal clk_pre_66 is undriven
|
||||
@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":143:32:143:34|Pruning register CLK_REF(1 downto 0)
|
||||
@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":136:34:136:36|Pruning register CLK_000_D4
|
||||
@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":135:34:135:36|Pruning register CLK_000_D3
|
||||
@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":134:34:134:36|Pruning register CLK_000_D2
|
||||
@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":129:35:129:37|Pruning register CLK_OUT_INT
|
||||
@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":129:35:129:37|Pruning register CLK_OUT_NE
|
||||
@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":123:38:123:40|Pruning register CLK_OUT_PRE_25
|
||||
@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":122:36:122:38|Pruning register CLK_OUT_PRE_50_D
|
||||
@W: CL265 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":138:61:138:75|Pruning bit 12 of CLK_000_N_SYNC(12 downto 0) -- not in use ...
|
||||
@W: CL271 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":137:34:137:36|Pruning bits 12 to 10 of CLK_000_P_SYNC(12 downto 0) -- not in use ...
|
||||
@W: CD638 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":125:7:125:20|Signal clk_out_pre_25 is undriven
|
||||
@W: CD638 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":126:7:126:20|Signal clk_out_pre_33 is undriven
|
||||
@W: CD638 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":127:7:127:22|Signal clk_out_pre_33_d is undriven
|
||||
@W: CD638 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":128:8:128:17|Signal clk_pre_66 is undriven
|
||||
@W: CD638 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":129:7:129:17|Signal clk_out_pre is undriven
|
||||
@W: CD638 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":131:7:131:16|Signal clk_out_ne is undriven
|
||||
@W: CD638 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":132:7:132:17|Signal clk_out_int is undriven
|
||||
@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":144:32:144:34|Pruning register CLK_REF(1 downto 0)
|
||||
@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":248:2:248:3|Pruning register RESET_DLY(5 downto 0)
|
||||
@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":137:34:137:36|Pruning register CLK_000_D4
|
||||
@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":136:34:136:36|Pruning register CLK_000_D3
|
||||
@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":135:34:135:36|Pruning register CLK_000_D2
|
||||
@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":123:36:123:38|Pruning register CLK_OUT_PRE_50_D
|
||||
@W: CL265 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":139:61:139:75|Pruning bit 12 of CLK_000_N_SYNC(12 downto 0) -- not in use ...
|
||||
@W: CL271 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":138:34:138:36|Pruning bits 12 to 10 of CLK_000_P_SYNC(12 downto 0) -- not in use ...
|
||||
|
||||
|
||||
@ -1,3 +1,3 @@
|
||||
@N: MF248 |Running in 64-bit mode.
|
||||
@N: MO106 :"c:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":214:4:214:7|Found ROM, 'pos_clk\.cpu_est_12[3:0]', 16 words by 4 bits
|
||||
@N: MO106 :"c:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":215:4:215:7|Found ROM, 'pos_clk\.cpu_est_11[3:0]', 16 words by 4 bits
|
||||
@N: FC100 |Timing Report not generated for this device, please use place and route tools for timing analysis.
|
||||
|
||||
@ -39,7 +39,7 @@ The file contains the job information from mapper to be displayed as part of the
|
||||
<data>96MB</data>
|
||||
</info>
|
||||
<info name="Date & Time">
|
||||
<data type="timestamp">1422823005</data>
|
||||
<data type="timestamp">1422951821</data>
|
||||
</info>
|
||||
</job_info>
|
||||
</job_run_status>
|
||||
|
||||
@ -1,4 +0,0 @@
|
||||
Part Number: M4A5-128/64-10VC
|
||||
C:\Program Files (x86)\ispLever\ispvmsystem/ispufw -dev M4A5-128/64-XXV -if 68030_tk.jed -oft -isc -lever
|
||||
Invoke process : C:\Program Files (x86)\ispLever\ispvmsystem/ispufw -dev M4A5-128/64-XXV -if 68030_tk.jed -oft -isc -lever
|
||||
ISC file is generated successfully
|
||||
@ -3,7 +3,7 @@
|
||||
Synopsys, Inc.
|
||||
Version G-2012.09LC-SP1
|
||||
Project file C:\users\matze\documents\github\68030tk\logic\syntmp\run_option.xml
|
||||
Written on Sun Feb 01 21:36:43 2015
|
||||
Written on Tue Feb 03 09:23:39 2015
|
||||
|
||||
|
||||
-->
|
||||
|
||||
@ -10,7 +10,7 @@
|
||||
#CUR:"C:\\Program Files (x86)\\ispLever\\synpbase\\lib\\vhd\\umr_capim.vhd":1363690728
|
||||
#CUR:"C:\\Program Files (x86)\\ispLever\\synpbase\\lib\\vhd\\arith.vhd":1363690728
|
||||
#CUR:"C:\\Program Files (x86)\\ispLever\\synpbase\\lib\\vhd\\unsigned.vhd":1363690728
|
||||
#CUR:"C:\\users\\matze\\documents\\github\\68030tk\\logic\\68030-68000-bus.vhd":1422822994
|
||||
#CUR:"C:\\users\\matze\\documents\\github\\68030tk\\logic\\68030-68000-bus.vhd":1422951812
|
||||
0 "C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd" vhdl
|
||||
|
||||
# Dependency Lists (Uses list)
|
||||
|
||||
@ -10,7 +10,7 @@
|
||||
#CUR:"C:\\Program Files (x86)\\ispLever\\synpbase\\lib\\vhd\\umr_capim.vhd":1363690728
|
||||
#CUR:"C:\\Program Files (x86)\\ispLever\\synpbase\\lib\\vhd\\arith.vhd":1363690728
|
||||
#CUR:"C:\\Program Files (x86)\\ispLever\\synpbase\\lib\\vhd\\unsigned.vhd":1363690728
|
||||
#CUR:"C:\\users\\matze\\documents\\github\\68030tk\\logic\\68030-68000-bus.vhd":1422822994
|
||||
#CUR:"C:\\users\\matze\\documents\\github\\68030tk\\logic\\68030-68000-bus.vhd":1422951812
|
||||
0 "C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd" vhdl
|
||||
|
||||
# Dependency Lists (Uses list)
|
||||
|
||||
Binary file not shown.
@ -1,21 +1,22 @@
|
||||
@N: CD630 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":13:7:13:14|Synthesizing work.bus68030.behavioral
|
||||
@W: CD638 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":125:7:125:20|Signal clk_out_pre_33 is undriven
|
||||
@W: CD638 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":126:7:126:22|Signal clk_out_pre_33_d is undriven
|
||||
@W: CD638 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":127:8:127:17|Signal clk_pre_66 is undriven
|
||||
@W: CD638 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":125:7:125:20|Signal clk_out_pre_25 is undriven
|
||||
@W: CD638 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":126:7:126:20|Signal clk_out_pre_33 is undriven
|
||||
@W: CD638 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":127:7:127:22|Signal clk_out_pre_33_d is undriven
|
||||
@W: CD638 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":128:8:128:17|Signal clk_pre_66 is undriven
|
||||
@W: CD638 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":129:7:129:17|Signal clk_out_pre is undriven
|
||||
@W: CD638 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":131:7:131:16|Signal clk_out_ne is undriven
|
||||
@W: CD638 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":132:7:132:17|Signal clk_out_int is undriven
|
||||
Post processing for work.bus68030.behavioral
|
||||
@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":143:32:143:34|Pruning register CLK_REF(1 downto 0)
|
||||
@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":136:34:136:36|Pruning register CLK_000_D4
|
||||
@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":135:34:135:36|Pruning register CLK_000_D3
|
||||
@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":134:34:134:36|Pruning register CLK_000_D2
|
||||
@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":129:35:129:37|Pruning register CLK_OUT_INT
|
||||
@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":129:35:129:37|Pruning register CLK_OUT_NE
|
||||
@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":123:38:123:40|Pruning register CLK_OUT_PRE_25
|
||||
@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":122:36:122:38|Pruning register CLK_OUT_PRE_50_D
|
||||
@W: CL265 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":138:61:138:75|Pruning bit 12 of CLK_000_N_SYNC(12 downto 0) -- not in use ...
|
||||
@W: CL271 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":137:34:137:36|Pruning bits 12 to 10 of CLK_000_P_SYNC(12 downto 0) -- not in use ...
|
||||
@A: CL282 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":142:37:142:39|Feedback mux created for signal CLK_000_PE -- possible set/reset assignment for signal missing. Specifying a reset value will improve timing and area.
|
||||
@A: CL282 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":140:34:140:36|Feedback mux created for signal CLK_000_NE -- possible set/reset assignment for signal missing. Specifying a reset value will improve timing and area.
|
||||
@N: CL201 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":143:32:143:34|Trying to extract state machine for register SM_AMIGA
|
||||
@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":144:32:144:34|Pruning register CLK_REF(1 downto 0)
|
||||
@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":248:2:248:3|Pruning register RESET_DLY(5 downto 0)
|
||||
@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":137:34:137:36|Pruning register CLK_000_D4
|
||||
@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":136:34:136:36|Pruning register CLK_000_D3
|
||||
@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":135:34:135:36|Pruning register CLK_000_D2
|
||||
@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":123:36:123:38|Pruning register CLK_OUT_PRE_50_D
|
||||
@W: CL265 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":139:61:139:75|Pruning bit 12 of CLK_000_N_SYNC(12 downto 0) -- not in use ...
|
||||
@W: CL271 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":138:34:138:36|Pruning bits 12 to 10 of CLK_000_P_SYNC(12 downto 0) -- not in use ...
|
||||
@N: CL201 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":143:37:143:39|Trying to extract state machine for register cpu_est
|
||||
@N: CL201 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":144:32:144:34|Trying to extract state machine for register SM_AMIGA
|
||||
Extracted state machine for register SM_AMIGA
|
||||
State machine has 8 reachable states with original encodings of:
|
||||
000
|
||||
@ -26,4 +27,3 @@ State machine has 8 reachable states with original encodings of:
|
||||
101
|
||||
110
|
||||
111
|
||||
@N: CL201 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":142:37:142:39|Trying to extract state machine for register cpu_est
|
||||
|
||||
Loading…
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Reference in New Issue
Block a user