mirror of
https://github.com/erichelgeson/BlueSCSI.git
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Merge pull request #64 from mactcp/main
Optimize handling of reset interrupt.
This commit is contained in:
Eric Helgeson
GitHub
commit
7eb1c0d250
351
src/BlueSCSI.cpp
351
src/BlueSCSI.cpp
@ -37,6 +37,7 @@
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#include <Arduino.h> // For Platform.IO
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#include <SdFat.h>
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#include <setjmp.h>
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#ifdef USE_STM32_DMA
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#warning "warning USE_STM32_DMA"
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@ -152,22 +153,22 @@ SdFs SD;
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// IN , FLOAT : 4
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// IN , PU/PD : 8
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// OUT, PUSH/PULL : 3
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// OUT, OD : 1
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//#define DB_MODE_OUT 3
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#define DB_MODE_OUT 1
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// OUT, OD : 7
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#define DB_MODE_OUT 3
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//#define DB_MODE_OUT 7
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#define DB_MODE_IN 8
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// Put DB and DP in output mode
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#define SCSI_DB_OUTPUT() { PBREG->CRL=(PBREG->CRL &0xfffffff0)|DB_MODE_OUT; PBREG->CRH = 0x11111111*DB_MODE_OUT; }
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// Put DB and DP in input mode
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#define SCSI_DB_INPUT() { PBREG->CRL=(PBREG->CRL &0xfffffff0)|DB_MODE_IN ; PBREG->CRH = 0x11111111*DB_MODE_IN; }
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#define SCSI_DB_INPUT() { PBREG->CRL=(PBREG->CRL &0xfffffff0)|DB_MODE_IN ; PBREG->CRH = 0x11111111*DB_MODE_IN; if (DB_MODE_IN == 8) PBREG->BSRR = 0xFF01;}
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// Turn on the output only for BSY
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#define SCSI_BSY_ACTIVE() { gpio_mode(BSY, GPIO_OUTPUT_OD); SCSI_OUT(vBSY, active) }
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// BSY,REQ,MSG,CD,IO Turn on the output (no change required for OD)
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#define SCSI_TARGET_ACTIVE() { }
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#define SCSI_TARGET_ACTIVE() { if (DB_MODE_OUT != 7) gpio_mode(REQ, GPIO_OUTPUT_PP);}
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// BSY,REQ,MSG,CD,IO Turn off output, BSY is the last input
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#define SCSI_TARGET_INACTIVE() { SCSI_OUT(vREQ,inactive); SCSI_OUT(vMSG,inactive); SCSI_OUT(vCD,inactive);SCSI_OUT(vIO,inactive); SCSI_OUT(vBSY,inactive); gpio_mode(BSY, GPIO_INPUT_PU); }
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#define SCSI_TARGET_INACTIVE() { if (DB_MODE_OUT == 7) SCSI_OUT(vREQ,inactive) else { if (DB_MODE_IN == 8) gpio_mode(REQ, GPIO_INPUT_PU) else gpio_mode(REQ, GPIO_INPUT_FLOATING)} SCSI_OUT(vMSG,inactive); SCSI_OUT(vCD,inactive);SCSI_OUT(vIO,inactive); gpio_mode(BSY, GPIO_INPUT_PU); }
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// HDDiamge file
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#define HDIMG_ID_POS 2 // Position to embed ID number
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@ -187,6 +188,8 @@ HDDIMG img[NUM_SCSIID][NUM_SCSILUN]; // Maximum number
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uint8_t m_senseKey = 0; // Sense key
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unsigned m_addition_sense = 0; // Additional sense information
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volatile bool m_isBusReset = false; // Bus reset
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volatile bool m_resetJmp = false; // Call longjmp on reset
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jmp_buf m_resetJmpBuf;
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byte scsi_id_mask; // Mask list of responding SCSI IDs
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byte m_id; // Currently responding SCSI-ID
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@ -194,7 +197,7 @@ byte m_lun; // Logical unit number currently respondin
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byte m_sts; // Status byte
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byte m_msg; // Message bytes
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HDDIMG *m_img; // HDD image for current SCSI-ID, LUN
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byte m_buf[MAX_BLOCKSIZE+1]; // General purpose buffer + overrun fetch
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byte m_buf[MAX_BLOCKSIZE]; // General purpose buffer
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int m_msc;
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byte m_msb[256]; // Command storage bytes
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@ -214,14 +217,9 @@ byte m_msb[256]; // Command storage bytes
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// Set DBP, set REQ = inactive
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#define DBP(D) ((((((uint32_t)(D)<<8)|PTY(D))*0x00010001)^0x0000ff01)|BITMASK(vREQ))
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#define DBP8(D) DBP(D),DBP(D+1),DBP(D+2),DBP(D+3),DBP(D+4),DBP(D+5),DBP(D+6),DBP(D+7)
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#define DBP32(D) DBP8(D),DBP8(D+8),DBP8(D+16),DBP8(D+24)
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// BSRR register control value that simultaneously performs DB set, DP set, and REQ = H (inactrive)
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static const uint32_t db_bsrr[256]={
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DBP32(0x00),DBP32(0x20),DBP32(0x40),DBP32(0x60),
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DBP32(0x80),DBP32(0xA0),DBP32(0xC0),DBP32(0xE0)
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};
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uint32_t db_bsrr[256];
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// Parity bit acquisition
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#define PARITY(DB) (db_bsrr[DB]&1)
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@ -263,7 +261,7 @@ inline byte readIO(void)
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{
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// Port input data register
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uint32_t ret = GPIOB->regs->IDR;
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byte bret = (byte)((~ret)>>8);
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byte bret = (byte)(~(ret>>8));
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#if READ_PARITY_CHECK
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if((db_bsrr[bret]^ret)&1)
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m_sts |= 0x01; // parity error
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@ -380,6 +378,11 @@ void setup()
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// JTAG Because it is used for debugging.
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disableDebugPorts();
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// Setup BSRR table
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for (unsigned i = 0; i <= 255; i++) {
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db_bsrr[i] = DBP(i);
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}
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// Serial initialization
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#if DEBUG > 0
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Serial.begin(9600);
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@ -416,7 +419,7 @@ void setup()
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SCSI_TARGET_INACTIVE()
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//Occurs when the RST pin state changes from HIGH to LOW
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//attachInterrupt(PIN_MAP[RST].gpio_bit, onBusReset, FALLING);
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//attachInterrupt(RST, onBusReset, FALLING);
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LED_ON();
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@ -519,7 +522,7 @@ void setup()
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finalizeFileLog();
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LED_OFF();
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//Occurs when the RST pin state changes from HIGH to LOW
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attachInterrupt(PIN_MAP[RST].gpio_bit, onBusReset, FALLING);
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attachInterrupt(RST, onBusReset, FALLING);
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}
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/*
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@ -612,6 +615,37 @@ void noSDCardFound(void)
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}
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}
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/*
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* Return from exception and call longjmp
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*/
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void __attribute__ ((noinline)) longjmpFromInterrupt(jmp_buf jmpb, int retval) __attribute__ ((noreturn));
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void longjmpFromInterrupt(jmp_buf jmpb, int retval) {
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// Address of longjmp with the thumb bit cleared
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const uint32_t longjmpaddr = ((uint32_t)longjmp) & 0xfffffffe;
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const uint32_t zero = 0;
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// Default PSR value, function calls don't require any particular value
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const uint32_t PSR = 0x01000000;
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// For documentation on what this is doing, see:
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// https://developer.arm.com/documentation/dui0552/a/the-cortex-m3-processor/exception-model/exception-entry-and-return
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// Stack frame needs to have R0-R3, R12, LR, PC, PSR (from bottom to top)
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// This is being set up to have R0 and R1 contain the parameters passed to longjmp, and PC is the address of the longjmp function.
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// This is using existing stack space, rather than allocating more, as longjmp is just going to unroll the stack even further.
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// 0xfffffff9 is the EXC_RETURN value to return to thread mode.
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asm (
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"str %0, [sp];\
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str %1, [sp, #4];\
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str %2, [sp, #8];\
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str %2, [sp, #12];\
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str %2, [sp, #16];\
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str %2, [sp, #20];\
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str %3, [sp, #24];\
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str %4, [sp, #28];\
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ldr lr, =0xfffffff9;\
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bx lr"
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:: "r"(jmpb),"r"(retval),"r"(zero), "r"(longjmpaddr), "r"(PSR)
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);
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}
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/*
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* Bus reset interrupt.
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*/
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@ -635,10 +669,28 @@ void onBusReset(void)
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SCSI_DB_INPUT()
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LOGN("BusReset!");
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m_isBusReset = true;
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if (m_resetJmp) {
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m_resetJmp = false;
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// Jumping out of the interrupt handler, so need to clear the interupt source.
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uint8 exti = PIN_MAP[RST].gpio_bit;
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EXTI_BASE->PR = (1U << exti);
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longjmpFromInterrupt(m_resetJmpBuf, 1);
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} else {
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m_isBusReset = true;
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}
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}
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}
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}
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/*
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* Enable the reset longjmp, and check if reset fired while it was disabled.
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*/
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void enableResetJmp(void) {
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m_resetJmp = true;
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if (m_isBusReset) {
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longjmp(m_resetJmpBuf, 1);
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}
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}
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/*
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* Read by handshake.
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@ -647,10 +699,10 @@ inline byte readHandshake(void)
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{
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SCSI_OUT(vREQ,active)
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//SCSI_DB_INPUT()
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while( ! SCSI_IN(vACK)) { if(m_isBusReset) return 0; }
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while( ! SCSI_IN(vACK));
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byte r = readIO();
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SCSI_OUT(vREQ,inactive)
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while( SCSI_IN(vACK)) { if(m_isBusReset) return 0; }
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while( SCSI_IN(vACK));
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return r;
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}
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@ -667,12 +719,12 @@ inline void writeHandshake(byte d)
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SCSI_OUT(vREQ,inactive) // setup wait (30ns)
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SCSI_OUT(vREQ,active) // (30ns)
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//while(!SCSI_IN(vACK)) { if(m_isBusReset){ SCSI_DB_INPUT() return; }}
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while(!m_isBusReset && !SCSI_IN(vACK));
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while(!SCSI_IN(vACK));
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// ACK.Fall to REQ.Raise delay 500ns(typ.) (DTC-510B)
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GPIOB->regs->BSRR = DBP(0xff); // DB=0xFF , SCSI_OUT(vREQ,inactive)
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// REQ.Raise to DB hold time 0ns
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SCSI_DB_INPUT() // (150ns)
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while( SCSI_IN(vACK)) { if(m_isBusReset) return; }
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while( SCSI_IN(vACK));
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}
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/*
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@ -686,13 +738,72 @@ void writeDataPhase(int len, const byte* p)
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SCSI_OUT(vCD ,inactive) // gpio_write(CD, low);
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SCSI_OUT(vIO , active) // gpio_write(IO, high);
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for (int i = 0; i < len; i++) {
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if(m_isBusReset) {
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return;
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}
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writeHandshake(p[i]);
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}
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}
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#if READ_SPEED_OPTIMIZE
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#pragma GCC push_options
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#pragma GCC optimize ("-Os")
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/*
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* This loop is tuned to repeat the following pattern:
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* 1) Set REQ
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* 2) 5 cycles of work/delay
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* 3) Wait for ACK
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* Cycle time tunings are for 72MHz STM32F103
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* Alignment matters. For the 3 instruction wait loops,it looks like crossing
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* an 8 byte prefetch buffer can add 2 cycles of wait every branch taken.
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*/
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void writeDataLoop(uint32_t blocksize) __attribute__ ((aligned(8)));
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void writeDataLoop(uint32_t blocksize)
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{
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#define REQ_ON() (port_b->BRR = req_bit);
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#define FETCH_BSRR_DB() (bsrr_val = bsrr_tbl[*srcptr++])
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#define REQ_OFF_DB_SET(BSRR_VAL) port_b->BSRR = BSRR_VAL;
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#define WAIT_ACK_ACTIVE() while((*port_a_idr>>(vACK&15)&1))
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#define WAIT_ACK_INACTIVE() while(!(*port_a_idr>>(vACK&15)&1))
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register byte *srcptr= m_buf; // Source buffer
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register byte *endptr= m_buf + blocksize; // End pointer
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register const uint32_t *bsrr_tbl = db_bsrr; // Table to convert to BSRR
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register uint32_t bsrr_val; // BSRR value to output (DB, DBP, REQ = ACTIVE)
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register uint32_t req_bit = BITMASK(vREQ);
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register gpio_reg_map *port_b = PBREG;
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register volatile uint32_t *port_a_idr = &(GPIOA->regs->IDR);
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// Start the first bus cycle.
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FETCH_BSRR_DB();
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REQ_OFF_DB_SET(bsrr_val);
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REQ_ON();
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FETCH_BSRR_DB();
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WAIT_ACK_ACTIVE();
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REQ_OFF_DB_SET(bsrr_val);
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// Align the starts of the do/while and WAIT loops to an 8 byte prefetch.
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asm("nop.w;nop");
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do{
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WAIT_ACK_INACTIVE();
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REQ_ON();
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// 4 cycles of work
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FETCH_BSRR_DB();
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// Extra 1 cycle delay while keeping the loop within an 8 byte prefetch.
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asm("nop");
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WAIT_ACK_ACTIVE();
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REQ_OFF_DB_SET(bsrr_val);
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// Extra 1 cycle delay, plus 4 cycles for the branch taken with prefetch.
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asm("nop");
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}while(srcptr < endptr);
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WAIT_ACK_INACTIVE();
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// Finish the last bus cycle, byte is already on DB.
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REQ_ON();
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WAIT_ACK_ACTIVE();
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REQ_OFF_DB_SET(bsrr_val);
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WAIT_ACK_INACTIVE();
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}
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#pragma GCC pop_options
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#endif
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/*
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* Data in phase.
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* Send len block while reading from SD card.
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@ -707,105 +818,22 @@ void writeDataPhaseSD(uint32_t adds, uint32_t len)
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SCSI_OUT(vCD ,inactive) // gpio_write(CD, low);
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SCSI_OUT(vIO , active) // gpio_write(IO, high);
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SCSI_DB_OUTPUT()
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for(uint32_t i = 0; i < len; i++) {
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// Asynchronous reads will make it faster ...
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m_resetJmp = false;
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m_img->m_file.read(m_buf, m_img->m_blocksize);
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enableResetJmp();
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#if READ_SPEED_OPTIMIZE
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//#define REQ_ON() SCSI_OUT(vREQ,active)
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#define REQ_ON() (*db_dst = BITMASK(vREQ)<<16)
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#define FETCH_SRC() (src_byte = *srcptr++)
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#define FETCH_BSRR_DB() (bsrr_val = bsrr_tbl[src_byte])
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#define REQ_OFF_DB_SET(BSRR_VAL) *db_dst = BSRR_VAL
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#define WAIT_ACK_ACTIVE() while(!m_isBusReset && !SCSI_IN(vACK))
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#define WAIT_ACK_INACTIVE() do{ if(m_isBusReset) return; }while(SCSI_IN(vACK))
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SCSI_DB_OUTPUT()
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register byte *srcptr= m_buf; // Source buffer
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register byte *endptr= m_buf + m_img->m_blocksize; // End pointer
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/*register*/ byte src_byte; // Send data bytes
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register const uint32_t *bsrr_tbl = db_bsrr; // Table to convert to BSRR
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register uint32_t bsrr_val; // BSRR value to output (DB, DBP, REQ = ACTIVE)
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register volatile uint32_t *db_dst = &(GPIOB->regs->BSRR); // Output port
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// prefetch & 1st out
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FETCH_SRC();
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FETCH_BSRR_DB();
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REQ_OFF_DB_SET(bsrr_val);
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// DB.set to REQ.F setup 100ns max (DTC-510B)
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// Maybe there should be some weight here
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// WAIT_ACK_INACTIVE();
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do{
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// 0
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REQ_ON();
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FETCH_SRC();
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FETCH_BSRR_DB();
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WAIT_ACK_ACTIVE();
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// ACK.F to REQ.R 500ns typ. (DTC-510B)
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REQ_OFF_DB_SET(bsrr_val);
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WAIT_ACK_INACTIVE();
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// 1
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REQ_ON();
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FETCH_SRC();
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FETCH_BSRR_DB();
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WAIT_ACK_ACTIVE();
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REQ_OFF_DB_SET(bsrr_val);
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WAIT_ACK_INACTIVE();
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// 2
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REQ_ON();
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FETCH_SRC();
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FETCH_BSRR_DB();
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WAIT_ACK_ACTIVE();
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REQ_OFF_DB_SET(bsrr_val);
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WAIT_ACK_INACTIVE();
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// 3
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REQ_ON();
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FETCH_SRC();
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FETCH_BSRR_DB();
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WAIT_ACK_ACTIVE();
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REQ_OFF_DB_SET(bsrr_val);
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WAIT_ACK_INACTIVE();
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// 4
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REQ_ON();
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FETCH_SRC();
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FETCH_BSRR_DB();
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WAIT_ACK_ACTIVE();
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REQ_OFF_DB_SET(bsrr_val);
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WAIT_ACK_INACTIVE();
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// 5
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REQ_ON();
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FETCH_SRC();
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FETCH_BSRR_DB();
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WAIT_ACK_ACTIVE();
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REQ_OFF_DB_SET(bsrr_val);
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WAIT_ACK_INACTIVE();
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// 6
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REQ_ON();
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FETCH_SRC();
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FETCH_BSRR_DB();
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WAIT_ACK_ACTIVE();
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REQ_OFF_DB_SET(bsrr_val);
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WAIT_ACK_INACTIVE();
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// 7
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REQ_ON();
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FETCH_SRC();
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FETCH_BSRR_DB();
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WAIT_ACK_ACTIVE();
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REQ_OFF_DB_SET(bsrr_val);
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WAIT_ACK_INACTIVE();
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}while(srcptr < endptr);
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SCSI_DB_INPUT()
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writeDataLoop(m_img->m_blocksize);
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#else
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for(int j = 0; j < m_img->m_blocksize; j++) {
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if(m_isBusReset) {
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return;
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}
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writeHandshake(m_buf[j]);
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}
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#endif
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}
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SCSI_DB_INPUT()
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}
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/*
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@ -822,6 +850,49 @@ void readDataPhase(int len, byte* p)
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p[i] = readHandshake();
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}
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#if WRITE_SPEED_OPTIMIZE
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#pragma GCC push_options
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#pragma GCC optimize ("-Os")
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/*
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* See writeDataLoop for optimization info.
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*/
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void readDataLoop(uint32_t blockSize) __attribute__ ((aligned(8)));
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void readDataLoop(uint32_t blockSize)
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||||
{
|
||||
register byte *dstptr= m_buf;
|
||||
register byte *endptr= m_buf + blockSize - 1;
|
||||
|
||||
#define REQ_ON() (port_b->BRR = req_bit);
|
||||
#define REQ_OFF() (port_b->BSRR = req_bit);
|
||||
#define WAIT_ACK_ACTIVE() while((*port_a_idr>>(vACK&15)&1))
|
||||
#define WAIT_ACK_INACTIVE() while(!(*port_a_idr>>(vACK&15)&1))
|
||||
register uint32_t req_bit = BITMASK(vREQ);
|
||||
register gpio_reg_map *port_b = PBREG;
|
||||
register volatile uint32_t *port_a_idr = &(GPIOA->regs->IDR);
|
||||
REQ_ON();
|
||||
// Start of the do/while and WAIT are already aligned to 8 bytes.
|
||||
do {
|
||||
WAIT_ACK_ACTIVE();
|
||||
uint32_t ret = port_b->IDR;
|
||||
REQ_OFF();
|
||||
*dstptr++ = ~(ret >> 8);
|
||||
// Move wait loop in to a single 8 byte prefetch buffer
|
||||
asm("nop.w");
|
||||
WAIT_ACK_INACTIVE();
|
||||
REQ_ON();
|
||||
// Extra 1 cycle delay
|
||||
asm("nop");
|
||||
} while(dstptr<endptr);
|
||||
WAIT_ACK_ACTIVE();
|
||||
uint32_t ret = GPIOB->regs->IDR;
|
||||
REQ_OFF();
|
||||
*dstptr = ~(ret >> 8);
|
||||
WAIT_ACK_INACTIVE();
|
||||
}
|
||||
#pragma GCC pop_options
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Data out phase.
|
||||
* Write to SD card while reading len block.
|
||||
@ -835,34 +906,23 @@ void readDataPhaseSD(uint32_t adds, uint32_t len)
|
||||
SCSI_OUT(vCD ,inactive) // gpio_write(CD, low);
|
||||
SCSI_OUT(vIO ,inactive) // gpio_write(IO, low);
|
||||
for(uint32_t i = 0; i < len; i++) {
|
||||
m_resetJmp = true;
|
||||
#if WRITE_SPEED_OPTIMIZE
|
||||
register byte *dstptr= m_buf;
|
||||
register byte *endptr= m_buf + m_img->m_blocksize;
|
||||
|
||||
for(dstptr=m_buf;dstptr<endptr;dstptr+=8) {
|
||||
dstptr[0] = readHandshake();
|
||||
dstptr[1] = readHandshake();
|
||||
dstptr[2] = readHandshake();
|
||||
dstptr[3] = readHandshake();
|
||||
dstptr[4] = readHandshake();
|
||||
dstptr[5] = readHandshake();
|
||||
dstptr[6] = readHandshake();
|
||||
dstptr[7] = readHandshake();
|
||||
if(m_isBusReset) {
|
||||
return;
|
||||
}
|
||||
}
|
||||
readDataLoop(m_img->m_blocksize);
|
||||
#else
|
||||
for(int j = 0; j < m_img->m_blocksize; j++) {
|
||||
if(m_isBusReset) {
|
||||
return;
|
||||
}
|
||||
m_buf[j] = readHandshake();
|
||||
}
|
||||
#endif
|
||||
m_resetJmp = false;
|
||||
m_img->m_file.write(m_buf, m_img->m_blocksize);
|
||||
// If a reset happened while writing, break and let the flush happen before it is handled.
|
||||
if (m_isBusReset) {
|
||||
break;
|
||||
}
|
||||
}
|
||||
m_img->m_file.flush();
|
||||
enableResetJmp();
|
||||
}
|
||||
|
||||
/*
|
||||
@ -1235,6 +1295,11 @@ void loop()
|
||||
}
|
||||
LOGN("Selection");
|
||||
m_isBusReset = false;
|
||||
if (setjmp(m_resetJmpBuf) == 1) {
|
||||
LOGN("Reset, going to BusFree");
|
||||
goto BusFree;
|
||||
}
|
||||
enableResetJmp();
|
||||
// Set BSY to-when selected
|
||||
SCSI_BSY_ACTIVE(); // Turn only BSY output ON, ACTIVE
|
||||
|
||||
@ -1243,9 +1308,6 @@ void loop()
|
||||
|
||||
// Wait until SEL becomes inactive
|
||||
while(isHigh(gpio_read(SEL)) && isLow(gpio_read(BSY))) {
|
||||
if(m_isBusReset) {
|
||||
goto BusFree;
|
||||
}
|
||||
}
|
||||
SCSI_TARGET_ACTIVE() // (BSY), REQ, MSG, CD, IO output turned on
|
||||
//
|
||||
@ -1308,22 +1370,21 @@ void loop()
|
||||
|
||||
int len;
|
||||
byte cmd[12];
|
||||
cmd[0] = readHandshake(); if(m_isBusReset) goto BusFree;
|
||||
cmd[0] = readHandshake();
|
||||
LOGHEX(cmd[0]);
|
||||
// Command length selection, reception
|
||||
static const int cmd_class_len[8]={6,10,10,6,6,12,6,6};
|
||||
len = cmd_class_len[cmd[0] >> 5];
|
||||
cmd[1] = readHandshake(); LOG(":");LOGHEX(cmd[1]); if(m_isBusReset) goto BusFree;
|
||||
cmd[2] = readHandshake(); LOG(":");LOGHEX(cmd[2]); if(m_isBusReset) goto BusFree;
|
||||
cmd[3] = readHandshake(); LOG(":");LOGHEX(cmd[3]); if(m_isBusReset) goto BusFree;
|
||||
cmd[4] = readHandshake(); LOG(":");LOGHEX(cmd[4]); if(m_isBusReset) goto BusFree;
|
||||
cmd[5] = readHandshake(); LOG(":");LOGHEX(cmd[5]); if(m_isBusReset) goto BusFree;
|
||||
cmd[1] = readHandshake(); LOG(":");LOGHEX(cmd[1]);
|
||||
cmd[2] = readHandshake(); LOG(":");LOGHEX(cmd[2]);
|
||||
cmd[3] = readHandshake(); LOG(":");LOGHEX(cmd[3]);
|
||||
cmd[4] = readHandshake(); LOG(":");LOGHEX(cmd[4]);
|
||||
cmd[5] = readHandshake(); LOG(":");LOGHEX(cmd[5]);
|
||||
// Receive the remaining commands
|
||||
for(int i = 6; i < len; i++ ) {
|
||||
cmd[i] = readHandshake();
|
||||
LOG(":");
|
||||
LOGHEX(cmd[i]);
|
||||
if(m_isBusReset) goto BusFree;
|
||||
}
|
||||
// LUN confirmation
|
||||
m_sts = cmd[1]&0xe0; // Preset LUN in status byte
|
||||
@ -1422,18 +1483,12 @@ void loop()
|
||||
m_addition_sense = 0x2000; // Invalid Command Operation Code
|
||||
break;
|
||||
}
|
||||
if(m_isBusReset) {
|
||||
goto BusFree;
|
||||
}
|
||||
|
||||
LOGN("Sts");
|
||||
SCSI_OUT(vMSG,inactive) // gpio_write(MSG, low);
|
||||
SCSI_OUT(vCD , active) // gpio_write(CD, high);
|
||||
SCSI_OUT(vIO , active) // gpio_write(IO, high);
|
||||
writeHandshake(m_sts);
|
||||
if(m_isBusReset) {
|
||||
goto BusFree;
|
||||
}
|
||||
|
||||
LOGN("MsgIn");
|
||||
SCSI_OUT(vMSG, active) // gpio_write(MSG, high);
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user