14 Commits

Author	SHA1	Message	Date
Romain Dolbeau	9b9f0efb6e	draft non-synchronous NuBus (using sampling at sysclk to cut down on latency), minimalist support for 1/2/4 accel	2022-06-06 23:36:43 +02:00
Romain Dolbeau	94cd6a9411	Move Vex to a 128-bit Wishbone, and add a bypass to access a dedicated memory port with a 128-bits datapath. Speeds up scrolling quite nicely.	2022-06-05 18:03:23 +02:00
Romain Dolbeau	d9c21e7abb	stat module	2022-06-04 18:56:41 +02:00
Romain Dolbeau	fbcfe3152c	DMA debug with XiBus NuBus & add alternate Migen implementation of NuBus	2022-06-04 09:53:09 +02:00
Romain Dolbeau	6271ddbef8	pingmaster sort-of-work	2022-05-30 19:06:33 +02:00
Romain Dolbeau	3a52ab666f	buffers (fifo) write from NuBus to Wishbone, to improve write BW	2022-05-30 13:15:20 +02:00
Romain Dolbeau	d53a70ba9e	Update memory map ; preliminary accel stuff to test (CW project missing, code resource INIT id 0 with the sysheap flag)	2022-05-15 14:43:15 +02:00
Romain Dolbeau	f867f02c83	add 16-bits/thousands of colors	2022-04-22 23:00:25 +02:00
Romain Dolbeau	3be6333be7	32-bits 'mllions of colors'	2022-04-18 17:04:32 +02:00
Romain Dolbeau	62b2c48b32	update to first tested version	2022-04-17 11:25:48 +02:00
Romain Dolbeau	de1aaf8161	some missing stuff, minor HW update, SW	2022-02-05 15:32:44 +01:00
Romain Dolbeau	68e63497af	more updates	2022-01-29 11:03:47 +01:00
Romain Dolbeau	b664739ba2	large update	2022-01-09 11:39:59 +01:00
Romain Dolbeau	5f0bc43139	push to github	2021-12-21 08:26:30 +01:00