Uwe Seimet 23e5286267 Fix BSY pin handling in initiator mode (#1312) ... * In initiator mode configure BSY as an output pin when BSY is set		2023-11-13 08:40:03 +01:00
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.vscode	Create devices after bus creation (#954)	2022-11-02 08:58:59 -05:00
controllers	Reduce logging in controller (#1332)	2023-11-10 15:47:43 +01:00
devices	Fix daynaport statistics read count calculation (#1336)	2023-11-11 09:56:52 +01:00
hal	Fix BSY pin handling in initiator mode (#1312)	2023-11-13 08:40:03 +01:00
piscsi	Updated french translation	2023-11-10 23:40:22 +09:00
scsictl	scsictl shall accept generic key/value pairs for options that take parameters (#1240) (#1274)	2023-10-31 09:02:28 +01:00
scsidump	Fix SonarQube issues (#1276)	2023-11-01 12:53:05 +01:00
scsiloop	Re-add CONNECT_TYPE_CONNECT_TYPE_AIBOM and CONNECT_TYPE_GAMERNIUM (#1315) (#1317)	2023-11-08 13:27:49 +01:00
scsimon	Move top-level .cpp files into their respective folders (#1249)	2023-10-16 18:27:18 +02:00
shared	Update version for next development version	2023-11-11 23:17:47 +09:00
test	Fix SonarQube issues (#1276)	2023-11-01 12:53:05 +01:00
.clang-format	SCSI Dump Usability Enhancements & Cleanup (#1026)	2022-12-09 09:50:45 -06:00
.gitignore	Rebrand project to PiSCSI (#1016)	2022-12-05 09:58:23 -08:00
launch_sudo.sh	Move C++ code into cpp/ dir (#941)	2022-10-25 12:59:30 -07:00
Makefile	Only build scsidump when building for the FULLSPEC board (#1285) (#1286)	2023-11-08 00:26:07 +01:00
piscsi_interface.proto	Add statistics and make scsictl accept generic key/value parameters (#1237/#1238) (#1262)	2023-10-30 13:32:45 +01:00