BBU: Fix standard logic sim errors, naming improvement.

This commit is contained in:
Andrew Makousky 2020-11-30 13:50:53 -06:00
parent fe87fea02c
commit 6618602b1a
2 changed files with 5 additions and 5 deletions

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@ -432,8 +432,8 @@ module ls595(q_b, q_c, q_d, q_e, q_f, q_g, q_h, gnd,
reg [7:0] out_reg; reg [7:0] out_reg;
assign { q_h, q_g, q_f, q_e, q_d, q_c, q_b, q_a } assign { q_h, q_g, q_f, q_e, q_d, q_c, q_b, q_a }
= (n_oe) ? 8'bz : int_reg; = (n_oe) ? 8'bz : out_reg;
assign q_h_p = q_h; assign q_h_p = int_reg[7];
always @(negedge n_srclr) begin always @(negedge n_srclr) begin
int_reg <= 0; int_reg <= 0;

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@ -95,9 +95,9 @@ endmodule
module test_mac128pal(); module test_mac128pal();
// Instantiate individual test modules. // Instantiate individual test modules.
test_ls161 tu0(); test_ls161 tu0_ls161();
test_ls245 tu1(); test_ls245 tu1_ls245();
test_palcl tu2(); test_palcl tu2_palcl();
// Perform the remainder of global configuration here. // Perform the remainder of global configuration here.