I noticed that after I implemented the SPI optimization of cycle
counting instead of polling on SPIF, the first "normal" SPI transaction
I tried would fail. This is because nothing was clearing the SPIF flag
anymore, and the normal SPI driver still looks at it. So it was thinking
that the latest transaction was already completed (it wasn't). Worked
around this by making sure we clear the flag in SPI_Assert. I'm not
concerned about performance impact here because the actual clean SPI
driver is not used in performance-bound situations.
Fixed an issue that identified the wrong pins as shorted to ground in
the electrical test functionality. Whoops!
This makes the code pretty easily portable to other architectures if someone
wants to make a more modern SIMM programmer. I also was pretty careful to split
responsibilities of the different components and give the existing components
better names. I'm pretty happy with the organization of the code now.
As part of this change I have also heavily optimized the code. In particular,
the read and write cycle routines are very important to the overall performance
of the programmer. In these routines I had to make some tradeoffs of code
performance versus prettiness, but the overall result is much faster
programming.
Some of these performance changes are the result of what I discovered when
I upgraded my AVR compiler. I discovered that it is smarter at looking at 32-bit
variables when I use a union instead of bitwise operations.
I also shaved off more CPU cycles by carefully making a few small tweaks. I
added a bypass for the "program only some chips" mask, because it was adding
unnecessary CPU cycles for a feature that is rarely used. I removed the
verification feature from the write routine, because we can always verify the
data after the write chunk is complete, which is more efficient. I also added
assumptions about the initial/final state of the CS/OE/WE pins, which allowed me
to remove more valuable CPU cycles from the read/write cycle routines.
There are also a few enormous performance optimizations I should have done a
long time ago:
1) The code was only handling one received byte per main loop iteration. Reading
every byte available cut nearly a minute off of the 8 MB programming time.
2) The code wasn't taking advantage of the faster programming command available
in the chips used on the 8 MB SIMM.
The end result of all of these optimizations is I have programming time of the
8 MB SIMM down to 3:31 (it used to be 8:43).
Another minor issue I fixed: the Micron SIMM chip identification wasn't working
properly. It was outputting the manufacturer ID again instead of the device ID.
Finished making the electrical test work -- I had failed to realize that I have to ignore the ground shorts once they have been found -- otherwise they reappear against EVERY tested pin (because they are always low and I'm testing for low pins -- duh!). Anyway, it was showing way too many shorts, and that's why. Now I independently can find shorts between separate pins without getting flooded with the ground shorts too. Only thing that's missing is the VCC shorts, but I can't do that without pullups (to my knowledge)
I'm not completely done with the electrical test because it only counts errors right now. So I need to implement a framework to determine which pins are shorted rather than just counting them.
It does add some complexity to the code. I may be going through a chain of calls just to turn the CS pin on, for instance. Hopefully I'm not going too crazy with this.
Anyway, this means that I can control the ports from a SIMM electrical test routine using the same types of functions that the actual programming controlling code would use, without having to duplicate a bunch of port definitions and bit manipulation. I made sure to add all the functions I can think of needing to the ports module. We'll see if I got them all!
