Commit Graph

96 Commits

Author SHA1 Message Date
Doug Brown
bc9b0245ba Add README explaining the Nuvoton directory 2023-09-10 05:02:44 -07:00
Doug Brown
a4b17f6601 Initial commit of Nuvoton USBD driver 2023-09-10 05:02:44 -07:00
Doug Brown
81bba67ee3 Initial commit of register defines, CMSIS code from Nuvoton BSP 2023-09-10 05:02:44 -07:00
Doug Brown
8b1cd63210 Change license to GPLv3
I can't use GPLv2 as soon as I need to start using the Nuvoton sample
code which is licensed with an Apache 2.0 license.
2023-09-10 05:02:44 -07:00
Doug Brown
81b3d28ffb Add get firmware version command 2023-08-26 21:01:09 -07:00
Doug Brown
1e63f3aea4 Use erase sector layout from programmer software when erasing portion
This should result in much better erase performance on larger SIMMs.
2023-08-26 21:01:09 -07:00
Doug Brown
2c88900d11 Read sector layout from programmer software 2023-08-26 21:01:09 -07:00
Doug Brown
a113d4da0d Don't restrict to erasing the first 2 MB of a "2 MB" SIMM
The problem is that over time, the meaning of curChipType has changed.
It was originally meant to exactly map to chips (four SST39SF040 chips
or four M29F160FB5AN6E2 chips) but over time its meaning has shifted to
simply indicating whether the unlock address needs to be shifted or not.

When curChipType is ParallelFlash_SST39SF040_x4, sometimes the
programming size is 4 MB or 8 MB. So don't restrict it to 2 MB.

Note that the erase sector sizes are just plain wrong in this case. In
the future I should read the chip ID and keep a table of sector sizes
for each known chip ID.
2023-08-02 21:01:30 -07:00
Doug Brown
8f3c74a14e Update copyright date 2023-06-25 11:38:41 -07:00
Doug Brown
7851bb2d10 Update README with build instructions
This README contains an overall summary of the entire project, but it
was missing build instructions for the firmware. Add them now that cmake
is all set up.
2023-06-25 11:38:41 -07:00
Doug Brown
afeeb5bfe7 Ignore CMakeLists.txt.user generated by Qt Creator 2023-06-25 11:38:41 -07:00
Doug Brown
bf1031127d Set up CMake build
This allows building with CMake instead of Eclipse. The reasoning behind
this is to make the code more easily portable to other architectures,
and to move away from being dependent on Eclipse.
2023-06-25 11:38:41 -07:00
Doug Brown
174bcdb370 Add CMake toolchain for AVR compilation 2023-06-25 11:38:41 -07:00
Doug Brown
baf0937589 Switch to config header for LUFA
This eliminates the need for a bunch of extra defines added to the
compile command.
2023-06-25 11:38:41 -07:00
Doug Brown
b627ef9020 Move descriptors to RAM
This ensures they will work properly on the AT90USB128x, especially in
the bootloader where they will be in the upper 64 KB.
2023-05-28 19:34:02 -07:00
Doug Brown
3a8e006925 Manually control USB PLL
The 646 and 1286 have different required USB PLL values when you have a
16 MHz crystal. Detect the chip at runtime to set up the PLL correctly.
This requires taking over control of the PLL from LUFA.
2023-05-28 19:34:02 -07:00
Doug Brown
88e8f47bde Jump to correct bootloader address based on whether it's a 64x or 128x 2023-05-28 19:34:02 -07:00
Doug Brown
a7fe6d9b39 Add utility function for determining the AVR model
This is needed in order to handle slightly different functionality
between the AT90USB64x and AT90USB128x.
2023-05-28 19:34:02 -07:00
Doug Brown
14cf8505f7 Break out bootloader entry into HAL
For some reason, I didn't have this as part of the HAL, so the main
program still had AVR dependencies.
2023-05-28 19:34:02 -07:00
Doug Brown
8aec8807c9 Fix line endings
A whole bunch of files in this project had DOS line endings. This is due
to how I started working on it on a Windows machine with little Git
experience. Now it's inconsistent so I'm fixing it.
2023-05-28 19:34:02 -07:00
Doug Brown
82df6ea459 Fix a few minor issues
I noticed that after I implemented the SPI optimization of cycle
counting instead of polling on SPIF, the first "normal" SPI transaction
I tried would fail. This is because nothing was clearing the SPIF flag
anymore, and the normal SPI driver still looks at it. So it was thinking
that the latest transaction was already completed (it wasn't). Worked
around this by making sure we clear the flag in SPI_Assert. I'm not
concerned about performance impact here because the actual clean SPI
driver is not used in performance-bound situations.

Fixed an issue that identified the wrong pins as shorted to ground in
the electrical test functionality. Whoops!
2020-11-27 00:16:35 -08:00
Doug Brown
39f34d67c4 Fix some spaces that should have been tabs 2020-11-27 00:16:35 -08:00
Doug Brown
9e586339dd Insane SPI optimization
Wait a specific amount of time after each SPI transfer instead of
polling status. It works, and it saves about 21 seconds in total on an
8 MB SIMM!
2020-11-27 00:16:35 -08:00
Doug Brown
4394533d88 Small optimization to address calculation
Due to integer promotion, the calculation of what to write to PORTD was
inefficient. Based on my benchmarking, it didn't really matter though.
2020-11-27 00:16:35 -08:00
Doug Brown
9521494971 Optimize read/write cycle functions
If multiple read or write cycles are done in sequence, we'll no longer
needlessly update the data direction registers (which is a slow SPI
transaction). We can also skip updating the pullups on the AVR if
multiple read cycles occur in sequence.
2020-11-27 00:16:35 -08:00
Doug Brown
2943b80c42 Optimize reading of 1024 byte chunks
This was a suggestion from bigmessowires. Do a tight loop when reading
a chunk of 1024 bytes. It's faster.
2020-11-27 00:16:35 -08:00
Doug Brown
3df4c40f38 Add/update copyright
This just makes sure everything is up to date with copyrights.
2020-11-27 00:16:35 -08:00
Doug Brown
7425af761a Break out code into a HAL, optimize flash operations
This makes the code pretty easily portable to other architectures if someone
wants to make a more modern SIMM programmer. I also was pretty careful to split
responsibilities of the different components and give the existing components
better names. I'm pretty happy with the organization of the code now.

As part of this change I have also heavily optimized the code. In particular,
the read and write cycle routines are very important to the overall performance
of the programmer. In these routines I had to make some tradeoffs of code
performance versus prettiness, but the overall result is much faster
programming.

Some of these performance changes are the result of what I discovered when
I upgraded my AVR compiler. I discovered that it is smarter at looking at 32-bit
variables when I use a union instead of bitwise operations.

I also shaved off more CPU cycles by carefully making a few small tweaks. I
added a bypass for the "program only some chips" mask, because it was adding
unnecessary CPU cycles for a feature that is rarely used. I removed the
verification feature from the write routine, because we can always verify the
data after the write chunk is complete, which is more efficient. I also added
assumptions about the initial/final state of the CS/OE/WE pins, which allowed me
to remove more valuable CPU cycles from the read/write cycle routines.

There are also a few enormous performance optimizations I should have done a
long time ago:

1) The code was only handling one received byte per main loop iteration. Reading
   every byte available cut nearly a minute off of the 8 MB programming time.
2) The code wasn't taking advantage of the faster programming command available
   in the chips used on the 8 MB SIMM.

The end result of all of these optimizations is I have programming time of the
8 MB SIMM down to 3:31 (it used to be 8:43).

Another minor issue I fixed: the Micron SIMM chip identification wasn't working
properly. It was outputting the manufacturer ID again instead of the device ID.
2020-11-27 00:16:35 -08:00
Doug Brown
927c178671 Ignore local settings files. Get project compiling on my computer. 2020-11-27 00:16:35 -08:00
Doug Brown
2c3202af3b
Update README.md
Updating in preparation for latest release. Changed a few descriptions and removed some unrelated things.
2020-11-26 23:41:14 -08:00
Doug Brown
4e9ee40aaa Merge pull request #26 from steve-chamberlin/master
Added AVR Studio project file for SIMM Programmer firmware
2016-04-25 17:59:11 -07:00
steve-chamberlin
d1f80fe9c5 Added AVR Studio project file for SIMM Programmer firmware 2016-04-25 13:48:59 -07:00
Doug Brown
c10a164359 Merge pull request #25 from jpluimers/master
Wiki updates (images, links); added README.md to master branch; added downloads branch.
2015-10-11 13:26:40 -07:00
Jeroen Pluimers
1200bcae06 README as a starting point to the repositories and other documentation. 2015-10-10 17:30:55 +02:00
Doug Brown
e2963070bc Added ability to tell programmer firmware to selectively unlock chips. 2013-07-04 12:10:18 -07:00
Doug Brown
0ebb9d2281 Finished implementing protocols for reading/writing portions of the SIMM 2012-10-17 21:31:00 -07:00
Doug Brown
bf583bf65b Fixed a couple of bugs -- first, I was reading the wrong datasheet.
Second, I was doing a bitwise AND when I was trying to do a modulo.
The firmware is now tested for erasing only a portion of the SIMM.
2012-10-16 21:25:15 -07:00
Doug Brown
69f644e5ce Fixing programmer protocol enum I left out 2012-10-16 18:52:59 -07:00
Doug Brown
3252f66749 Added untested support for erasing a specific portion of the SIMM
(in 256 KB increments). Won't be able to test it until I implement it in
the control software as well, but I think it should work.
2012-10-16 18:36:55 -07:00
Doug Brown
7bbfc23c1a Added untested support for erasing a specific portion of the SIMM
(in 256 KB increments). Won't be able to test it until I implement it in
the control software as well, but I think it should work.
2012-10-15 22:00:29 -07:00
Doug Brown
d484d126e5 Got rid of my weird "inverse data" hack for verification and turned on
the pull-up resistors on every read instead. That's a better technique
and also makes other things more consistent -- e.g. reading back 0xFF
if a chip identification is attempted when a chip isn't installed.
2012-09-30 20:58:07 -07:00
Doug Brown
2c8e7e7184 Fixed the problem that caused no chip present to verify OK after a write
The problem was that the data bus would "remember" the last data I wrote
to it if a chip was not driving the data bus on a read, so it would
think that the chip had returned the correct data. I fixed it by writing
the opposite data to the data bus before a verification read.
2012-09-30 16:27:01 -07:00
Doug Brown
667c2c5a2d Added verify during write. It seems to mostly work except when the chip
is completely removed from the SIMM -- in that case, the verification
still passes for some reason. I'm still debugging this one. Maybe the
data I had just written is still essentially on the bus because of the
floating pins and it reads it too fast? Maybe turning on pull-ups would
help with that?
2012-09-30 14:41:22 -07:00
Doug Brown
ff1f213b6f Fixed maximum chip size allowed by firmware for compatibility with new
8 MB SIMM
2012-09-14 18:13:19 -07:00
Doug Brown
7acb3ffcc3 Added support for (untested yet) 8 MB ROM SIMM with chips that expect a
slightly different programming protocol.
2012-09-02 15:56:49 -07:00
Doug Brown
533813e949 Added LED toggle to write/read modes.
Read is so fast that you can't even see the blinking, but oh well.
I also added an "led.h" header file that I should have done long ago.
2012-05-27 15:41:16 -07:00
Doug Brown
4b2533b69f Added GPL license text file. 2012-05-25 22:41:15 -07:00
Doug Brown
145487d388 Added GPL header to all of my source files. 2012-05-25 20:21:04 -07:00
Doug Brown
ec2237ee21 Updated to LUFA 120219 (with later CDC deadlock patch too) 2012-05-25 19:20:38 -07:00
Doug Brown
e9da0905f0 Changed USB vendor/product IDs to use the ones I got. 2012-05-21 19:52:49 -07:00