124 Commits

Author SHA1 Message Date
joevt 7b1ea17fb8 ppcmmu: Fix compiler warning. 2024-12-17 18:46:53 -07:00
Maxim Poliakovski aa17bf06de ppcmmu: implement mem_write_dbg method. 2024-11-30 11:55:16 +01:00
Mihai Parparita bf92b04d6c debugger: Use a named constant when we don't have a current instruction 2024-11-29 18:33:22 +01:00
Mihai Parparita 564c43c907 Remove ppc_cur_instruction global variable
Replace it wth an explicit opcode parameter that is passed around. That
is both slightly easier to reason about (to trace where it comes from)
and slightly faster, since it can be read from a register.

On my machine takes booting to "Welcome to Macintosh" being output in
a verbose boot of Mac OS X 10.2.8 from 31.8s to 30.6s (average of 5
runs, measured using deterministic mode and looking at when execution
reaches PC 0x90004a88).
2024-11-28 23:41:38 +01:00
dingusdev 9d9e826bb3 More code clean-up 2024-09-08 13:19:07 -07:00
Rairii 8cc67b09c2 ppcmmu: Different expressions. 2024-09-03 06:09:45 -07:00
Mihai Parparita 76824fb602 ppcmmu: skip over mode 1 entries when doing PAT flushes
Mode 1 contains real addressing mode entries, which by definition cannot
be using segment registers. By skipping over them, we can shave off a
couple of seconds from the 10.2 boot time.
2024-07-31 23:08:36 -07:00
dingusdev 606c9dd9a8 More compiler warning fixes 2024-06-24 19:40:20 -07:00
joevt 30afcb6ddc ppcmmu: Allow map dma for last byte of region.
cur_dma_rgn->end is the last byte of a region. It is not the byte after the region. Therefore, subtract 1 from size before doing compare.

Also add more detail to the abort messages.
2024-04-24 06:50:53 -07:00
joevt ad45ce8499 ppcmmu: Make dummy pages two pages.
In case we need a write to span a page boundary.
2024-04-24 06:49:11 -07:00
joevt a8023bb41b ppcmmu: Remove last_dma_area.
DMA may happen on CPU and audio threads but update of last_dma_area is not thread safe.
2024-04-21 09:13:42 -07:00
dingusdev 2c94cfee03 Removing currently unneeded functions 2024-04-09 18:34:36 -07:00
joevt 3c16870f86 ppcmmu: Replace defines.
They may interfere with system headers.
2024-04-09 07:57:48 -07:00
joevt 9ed1a118e6 ppcmmu: Check sizeof(T) explicitly.
I don't know if the compiler is smart enough to figure out that ((guest_va & 0xFFF) + sizeof(T)) > 0x1000) is always false when sizeof(T) == 1 so we'll add a check for sizeof(T) > 1.
2024-04-07 08:59:05 -07:00
joevt d9b02ecd8d ppcmmu: Check 8 byte alignment spanning pages. 2024-03-28 07:53:03 -07:00
joevt c9d4cc3321 ppcmmu: Remove old and slow code. 2024-03-27 20:13:45 -07:00
joevt 0f8a464157 ppcmmu: Use MSR enums for calculating mmu_mode. 2024-03-27 18:44:59 -07:00
joevt e4a675babb ppcmmu: Remove line feed from log messages. 2024-03-27 18:44:42 -07:00
joevt bc5fd44172 ppcmmu: Don't log mmu_mode 1. 2024-03-24 18:52:49 -07:00
joevt bc5153dd4a ppcmmu: Make sure dummy page is 8 byte aligned. 2024-03-13 21:45:56 -07:00
joevt aed74479fd ppcmmu: Handle undefined mmu mode. 2024-03-13 21:38:26 -07:00
Mihai Parparita c7d2eb87ac Initialize MMU recently used regions in ppc_mmu_init
More encapsulated and allows re-initialization.
2024-03-07 23:31:56 -08:00
joevt de73a36399 ppcmmu: Move defines to the top. 2024-03-02 07:58:25 -07:00
joevt 318e035344 ppcmmu: Shorten tlb_flush_entries. 2024-03-02 07:56:26 -07:00
joevt cd097232cb ppcmmu: Shorten tlb_flush_entry.
Don't need a weird short loop.
2024-03-02 07:56:17 -07:00
joevt b7b783b6be ppcmmu: Shorten ppc_mmu_init.
Also, initialize all the fields.
2024-03-02 07:50:02 -07:00
joevt 3bea3ec3d8 ppcmmu: Fix compiler warnings. 2024-03-01 20:12:42 -07:00
joevt 0f66d454c1 ppcmmu: Cleanup the cleanup. 2024-03-01 20:05:10 -07:00
joevt 6738d7472e ppcmmu: Add a function to get phys address.
Since the function is for the debugger during stepping or disassembly, don't do extra logging.
2024-03-01 19:48:52 -07:00
joevt 500f38a496 ppcmmu: Add phys address to mmu_translate_imem.
For debugging.
2024-03-01 19:45:09 -07:00
joevt 3a5a70b56d ppcmmu: Allow convert virtual to physical address.
The TLBEntries allow converting virtual guest address to virtual host address but there's no easy way to get a guest physical address for debugging purposes.
Add a phys_tag field to fix that.
2024-03-01 19:42:25 -07:00
joevt ff5c43e6cb debugger: Add mregs command.
To dump more registers.
2024-02-29 21:46:44 -07:00
joevt cf4ce01ddd ppcopcodes: set DSISR for alignment exception. 2024-02-20 01:22:55 +01:00
dingusdev a5ce6a806f CPU clean-up 2024-01-07 17:04:51 -07:00
joevt c28e1fa0be ppcmmu: Fix write accesses to read-only memory. 2023-12-08 11:15:04 +01:00
Mihai Parparita 6582536591 Inline ppc_set_cur_instruction
It's used in the main emulator loop (ppc_exec_inner), and the function
call overhead adds up.

By inlining it, time to boot to the Finder using a 7.1.2 install CD
and a 6100 ROM goes from ~6700ms to ~6400ms (with clang 14 on a
M2 Max)
2023-12-02 15:12:02 -08:00
dingusdev 7835aec034 Further CPU cleanup 2023-11-21 08:06:50 -07:00
Mihai Parparita 35c86ad6bf Clean up #includes
Result of running IWYU (https://include-what-you-use.org/) and
applying most of the suggestions about unncessary includes and
forward declarations.

Was motivated by observing that <thread> was being included in
ppcopcodes.cpp even though it was unused (found while researching
the use of threads), but seems generally good to help with build
times and correctness.
2023-11-03 00:33:47 -07:00
joevt 5b366e592c Fix spelling. 2023-10-02 15:06:51 +02:00
Maxim Poliakovski a5fb124e69 pdmonboard: switch to mmu_map_dma_mem. 2023-10-02 15:00:12 +02:00
Maxim Poliakovski 8cf290c034 ppcmmu: add mmu_map_dma_mem method. 2023-10-02 02:20:42 +02:00
joevt 67146028bf ppcmmu: Add 64-bit accesses to I/O.
Also add an exception for unaligned 64 bit. 64 bit accesses require dword alignment.
2023-09-30 00:29:01 +02:00
joevt 8348370142 Add separate flags for instruction and data TLBs.
The same flag was being used for flushing both instruction and data TLBs so sometimes a flush for one TLB list would not occur if the flag was cleared when flushing the other TLB list.
2023-09-25 23:42:32 +02:00
joevt 6b3cdad877 ppcmmu: Fix BAT update.
Need to schedule flush of both BAT and PAT type TLBs because BAT takes precedence over PAT which means updating a BAT can invalidate a PAT.
2023-09-25 23:27:00 +02:00
joevt 6b40caf63a ppcmmu: fix setting of LRU bits. 2023-09-25 23:17:57 +02:00
Maxim Poliakovski c47cbb354d Add is_601 flag for selecting MPC601 specific behavior. 2023-09-18 21:20:59 +02:00
Maxim Poliakovski a69763c6de dbdma: noop incomplete LOAD_QUAD & STORE_QUAD. 2023-09-18 20:20:25 +02:00
dingusdev 5e32b599d6 Merge branch 'master' of https://github.com/dingusdev/dingusppc 2023-09-04 07:22:27 -07:00
Maxim Poliakovski 45528bfc6d ppcmmu: fix flushing of the secondary ITLB. 2023-08-22 23:36:48 +02:00
dingusdev a7ef177164 Preliminary DBDMA expansion 2023-08-13 16:38:15 -07:00