Commit Graph

127 Commits

Author SHA1 Message Date
joevt 5022ac89b4 ppcexec: Improve realtime. 2024-04-21 07:16:47 -07:00
joevt cb88bab67d ppcopcodes: Fixes for SPRs.
- Rename DEC to DEC_S and add DEC_U.
- MQ, RTCL_U, RTCU_U, and DEC_U should cause an illegal instruction program exception for non-MPC601 CPUs. The exception handler of classic Mac OS uses this to emulate the instruction.
- For mtspr, the SPRs RTCL_U, RTCU_U, and DEC_U are treated as no-op on MPC601.
- For debugging, use the supervisor instead of the user SPR number as the index for storing the values for RTC, TB, and DEC.
- For debugging, RTC, TB, and DEC should be updated after each access. Previously, mfspr and mtspr would only update the half of RTC and TB that was being accessed instead of both halves.
2024-04-10 07:21:54 -07:00
joevt 4f45d7de35 cpu: Add cpu options to ppc_cpu_init.
The first option is a flag that enables MPC601 (POWER) instructions for CPUs that are not MPC601.
This can be useful for the following reasons:
1) To produce results similar to classic Mac OS which emulates MPC601 instructions on CPUs that don't implement MPC601 instructions. This option is used to compare the risu traces produced in Mac OS 9 on a G3 or G4 with DPPC.
2) May increase performance in apps that use POWER instructions on emulated machines with CPUs that are not MPC601. It is not known if any such apps exist but there could be since Apple included MPC601 emulation in classic Mac OS.
2024-04-10 06:43:18 -07:00
joevt 3c16870f86 ppcmmu: Replace defines.
They may interfere with system headers.
2024-04-09 07:57:48 -07:00
Maxim Poliakovski 524daa45a5 ppcexec.cpp: fix compilation with Apple Clang 10. 2024-04-07 20:39:24 +02:00
dingusdev 43d87b4791 Temp revert for icnt_factor
We should, at minimum, make icnt_factor adjustable. That said, powermax is suggesting we develop a more sophisticated scheduler.
2024-03-31 14:13:45 -07:00
joevt 6267685920 ppcexec: Make EXEF_TIMER separate variable. 2024-03-31 12:15:48 -07:00
joevt 48882f3fec ppcexec: Adjust icnt_factor.
So that 1000 ms takes ≈ 1 second in Open Firmware on 4 GHz Intel CPU.
2024-03-31 11:51:04 -07:00
joevt 0ac54ea1ea ppcexec: Add host time option. 2024-03-31 11:50:55 -07:00
joevt 58ed5bb56e ppcexec: Opcode initialization to one function.
Move all opcode initialization to initialize_ppc_opcode_tables.
Some opcodes are illegal for some processors.
2024-03-28 07:35:57 -07:00
joevt 60a76e9348 ppcexec: Fix branch check in ppc_exec_single. 2024-03-28 07:17:13 -07:00
joevt 5b4ed01bec ppcexec: Make separate enum for shift instructions. 2024-03-27 18:43:46 -07:00
joevt 64df253053 ppcexec: Rename bool function enums.
Use "logical" since the functions deal with multiple bits instead of a single boolean value and because the 601 manual calls them Logical Instructions.
Use "ppc" for the enums because logical_and is defined elsewhere and because the original DPPC code used these names for those functions.
2024-03-27 18:43:35 -07:00
joevt d8129bd643 ppcexec: Add comments for macros. 2024-03-27 18:43:15 -07:00
Maxim Poliakovski 6aa54b8dda ppcexec: break long lines, improve indentation. 2024-03-27 13:55:05 +01:00
dingusdev ec56dffd19 Adding missing includes 2024-03-26 19:25:05 -07:00
dingusdev a09f2093b5 Optimize register initialization
Courtesy of joevt, adapted to fit the C++ standard
2024-03-26 18:52:56 -07:00
dingusdev b15d3be88a Moving is_601 up, so the opcodes get initialized correctly 2024-03-26 18:41:16 -07:00
joevt 224ae50e91 ppcexec: Make more instructions illegal for 601. 2024-03-26 06:50:33 -07:00
joevt 03d7728d46 ppcexec: Use macros to assign subopcode functions. 2024-03-26 06:50:17 -07:00
joevt 19ba15f2f1 ppc: Separate enums for separate fields. 2024-03-26 06:44:26 -07:00
dingusdev 9b76c9fe3e Fix for mffs in opcode table 2024-03-25 20:04:13 -07:00
joevt f08d9ba81e ppcexec: Fix templated lhzux. 2024-03-25 07:43:34 -07:00
joevt effe0198ce ppcexec: Fix bcctr templated parameters. 2024-03-25 07:36:46 -07:00
dingusdev c781820bf6 Continued table fixes 2024-03-24 17:43:14 -07:00
dingusdev 30802affd4 Continued fixes for tables 2024-03-24 17:24:36 -07:00
dingusdev 5631485465 Cleaning up templating 2024-03-24 14:06:07 -07:00
dingusdev c281b27220 Attempted templating for interpreter 2024-03-24 12:21:19 -07:00
joevt 1d5502dc3c ppcemu: Make flags atomic.
For flags that might be accessed by other threads.
2024-03-22 19:04:51 -07:00
joevt 833f74dce6 timemanager: Remove unnecessary parameter. 2024-03-16 11:36:41 -07:00
dingusdev daeecbe99e Clean-up bc and bcl
Using templating to make the code a touch more readable
2024-03-08 19:22:25 -07:00
dingusdev eb07a3c2f1 Templating bclr to match with bcctr 2024-03-07 20:44:36 -07:00
joevt 67bd47f11f ppcopcodes: Fixes for bcctr(l)?.
Add MPC601 variants. Variants that decrement and test the ctr are invalid bon't don't appear to trigger an exception. The manual says MPC601 can decrement the counter. Other CPUs do not decrement the counter but will branch based on the value.
2024-03-07 06:55:54 -07:00
joevt e44676e491 ppcfpopcodes: Template mffs variants. 2024-03-07 06:45:46 -07:00
Maxim Poliakovski 30c6cbefbd ppcexec: fix indentation, break long lines. 2024-03-06 23:28:40 +01:00
joevt 20b4a33c00 ppcexec: Remove EXHAUSTIVE_DEBUG. 2024-03-05 07:05:03 -07:00
joevt f61055ebc0 ppcexec: Convert if to switch for ppc_opcode19. 2024-03-05 07:03:16 -07:00
joevt 177098c957 debugger: Fix interrupt signal.
Typing Control-C in Terminal app causes an interrupt signal that should enter the DPPC debugger but this only worked once since the signal handler never returned. Even if the signal handler reenabled the signal somehow, it calls enter_debugger recursively which is strange since the earlier calls to enter_debugger would never return.

Now the signal handler just sets a flag (power_on) which can be used to exit any loop (emulator loops, stepping loops, disassembly loops, dumping loops).

Main always calls enter_debugger now which calls the ppc_exec loop. The power_on flag will exit the ppc_exec loop to return to the debugger. Recursion of enter_debugger is eliminated except for calls to loguru's ABORT_F.

An enum power_off_reason is used to indicate why the power_on flag is set to false and to determine what happens next.
2024-03-02 12:57:02 -07:00
joevt 7cd3aae753 debugger: Fix repeated until.
The loop needs to be do while instead of while do.
2024-02-29 18:57:11 -07:00
joevt 1903c8b557 debugger: Fix reg_op for floating point registers. 2024-02-29 18:48:59 -07:00
joevt 456a96042f debugger: Shorten try catch in reg_op.
Because SPGR0 matches SPR but stoul causes an exception.
2024-02-29 07:55:09 -07:00
joevt 888df0ac53 debugger: Add more register names for reg_op.
So the debugger can output their values.
2024-02-29 07:46:16 -07:00
joevt 4fcb357e2f ppcfpopcodes: add 601 variant of mffs. 2024-02-10 12:51:48 -07:00
joevt ddb5259464 ppcexec: Make illegal operations per CPU model. 2024-02-10 12:51:00 -07:00
Mihai Parparita e9bc8926ab Avoid some undefined behavior
The `SubOpcode31Grabber[1024] = { ppc_illegalop }` initializer only
populates the first entry with ppc_illegalop (at least on some compilers),
switch to explicitly initializing the entire array with std::fill_n.

Also fix a couple of sign and overflow issues flagged by the Xcode
undefined behavior sanitizer.
2023-12-07 23:59:49 -08:00
Maxim Poliakovski 6abb07e61b Add rounding control for the host FPU. 2023-11-30 12:06:44 +01:00
dingusdev 7835aec034 Further CPU cleanup 2023-11-21 08:06:50 -07:00
dingusdev d92ae6136a CPU code clean-up in progress
Happened to fix one case in the process.
2023-11-19 17:56:30 -07:00
Mihai Parparita 35c86ad6bf Clean up #includes
Result of running IWYU (https://include-what-you-use.org/) and
applying most of the suggestions about unncessary includes and
forward declarations.

Was motivated by observing that <thread> was being included in
ppcopcodes.cpp even though it was unused (found while researching
the use of threads), but seems generally good to help with build
times and correctness.
2023-11-03 00:33:47 -07:00
joevt acdb14a10a Recalculate execution block after RFI.
While booting Mac OS X 10.2 installer CD, a return from RFI didn't change the instruction address virtual memory page but did change the physical memory page so we must always recalculate the physical address after RFI.
Perhaps there are other cases where this may be required?
2023-09-26 00:13:11 +02:00