Commit Graph

97 Commits

Author SHA1 Message Date
dingusdev
daeecbe99e Clean-up bc and bcl
Using templating to make the code a touch more readable
2024-03-08 19:22:25 -07:00
dingusdev
eb07a3c2f1 Templating bclr to match with bcctr 2024-03-07 20:44:36 -07:00
joevt
67bd47f11f ppcopcodes: Fixes for bcctr(l)?.
Add MPC601 variants. Variants that decrement and test the ctr are invalid bon't don't appear to trigger an exception. The manual says MPC601 can decrement the counter. Other CPUs do not decrement the counter but will branch based on the value.
2024-03-07 06:55:54 -07:00
joevt
e44676e491 ppcfpopcodes: Template mffs variants. 2024-03-07 06:45:46 -07:00
Maxim Poliakovski
30c6cbefbd ppcexec: fix indentation, break long lines. 2024-03-06 23:28:40 +01:00
joevt
20b4a33c00 ppcexec: Remove EXHAUSTIVE_DEBUG. 2024-03-05 07:05:03 -07:00
joevt
f61055ebc0 ppcexec: Convert if to switch for ppc_opcode19. 2024-03-05 07:03:16 -07:00
joevt
177098c957 debugger: Fix interrupt signal.
Typing Control-C in Terminal app causes an interrupt signal that should enter the DPPC debugger but this only worked once since the signal handler never returned. Even if the signal handler reenabled the signal somehow, it calls enter_debugger recursively which is strange since the earlier calls to enter_debugger would never return.

Now the signal handler just sets a flag (power_on) which can be used to exit any loop (emulator loops, stepping loops, disassembly loops, dumping loops).

Main always calls enter_debugger now which calls the ppc_exec loop. The power_on flag will exit the ppc_exec loop to return to the debugger. Recursion of enter_debugger is eliminated except for calls to loguru's ABORT_F.

An enum power_off_reason is used to indicate why the power_on flag is set to false and to determine what happens next.
2024-03-02 12:57:02 -07:00
joevt
7cd3aae753 debugger: Fix repeated until.
The loop needs to be do while instead of while do.
2024-02-29 18:57:11 -07:00
joevt
1903c8b557 debugger: Fix reg_op for floating point registers. 2024-02-29 18:48:59 -07:00
joevt
456a96042f debugger: Shorten try catch in reg_op.
Because SPGR0 matches SPR but stoul causes an exception.
2024-02-29 07:55:09 -07:00
joevt
888df0ac53 debugger: Add more register names for reg_op.
So the debugger can output their values.
2024-02-29 07:46:16 -07:00
joevt
4fcb357e2f ppcfpopcodes: add 601 variant of mffs. 2024-02-10 12:51:48 -07:00
joevt
ddb5259464 ppcexec: Make illegal operations per CPU model. 2024-02-10 12:51:00 -07:00
Mihai Parparita
e9bc8926ab Avoid some undefined behavior
The `SubOpcode31Grabber[1024] = { ppc_illegalop }` initializer only
populates the first entry with ppc_illegalop (at least on some compilers),
switch to explicitly initializing the entire array with std::fill_n.

Also fix a couple of sign and overflow issues flagged by the Xcode
undefined behavior sanitizer.
2023-12-07 23:59:49 -08:00
Maxim Poliakovski
6abb07e61b Add rounding control for the host FPU. 2023-11-30 12:06:44 +01:00
dingusdev
7835aec034 Further CPU cleanup 2023-11-21 08:06:50 -07:00
dingusdev
d92ae6136a CPU code clean-up in progress
Happened to fix one case in the process.
2023-11-19 17:56:30 -07:00
Mihai Parparita
35c86ad6bf Clean up #includes
Result of running IWYU (https://include-what-you-use.org/) and
applying most of the suggestions about unncessary includes and
forward declarations.

Was motivated by observing that <thread> was being included in
ppcopcodes.cpp even though it was unused (found while researching
the use of threads), but seems generally good to help with build
times and correctness.
2023-11-03 00:33:47 -07:00
joevt
acdb14a10a Recalculate execution block after RFI.
While booting Mac OS X 10.2 installer CD, a return from RFI didn't change the instruction address virtual memory page but did change the physical memory page so we must always recalculate the physical address after RFI.
Perhaps there are other cases where this may be required?
2023-09-26 00:13:11 +02:00
joevt
dcd4384d46 Fix eb_end calculation.
- Subtract one so that it can't overflow to zero.
- Use page_start as the base so mask operation is not required.
- Recalculate it only when the page changes.
2023-09-26 00:04:07 +02:00
Maxim Poliakovski
c47cbb354d Add is_601 flag for selecting MPC601 specific behavior. 2023-09-18 21:20:59 +02:00
joevt
300965ab10 Decrementer exception changes. 2023-08-10 00:46:04 +02:00
Maxim Poliakovski
597c077b19 Implement PPC decrementer. 2023-02-15 02:36:40 +01:00
joevt
64fec88436 Fix compiler warnings: cast loses precision.
Use explicit cast when converting large integer types to smaller integer types when it is known that the most significant bytes are not required.
For pcidevice, check the ROM file size before casting to int. We'll allow expansion ROM sizes up to 4MB but usually they are 64K, sometimes 128K, rarely 256K.
for machinefactory, change the type to size_t so that it can correctly get the size of files that are larger than 4GB; it already checks the file size is 4MB before we need to cast to uint32_t.
For floppyimg, check the image size before casting to int. For raw images, only allow files up to 2MB. For DiskCopy42 images, it already checks the file size, so do the cast after that.
2023-01-11 01:17:12 -08:00
joevt
6f0d3b48ba Fix TBR range
Fixed an issue where TBR doesn't have full 64-bit range. The original calculation was 64 bit and ended with a ÷ 10^9. This means the max for the upper 32 bits is 2^32/10^9 = 4. The solution is to use a multiplication method that supports a 96 bit product. core/mathutils.h contains functions for that. TBR driving frequency is assumed to be less than 1 GHz. Some minor modification is required for future > 1 GHz support.
2022-09-15 21:22:37 -07:00
joevt
01d7d6bac3 Make accessing RTC or TBR not affect the other
Fixed an issue where the following would cause inconsistent results (tb in the left column would sometimes decrement instead of always incrementing):
2 0 do 2 0 do cr tb@ 8 u.r ." ." 8 u.r loop 2 0 do cr 12 spaces rtc@ 8 u.r ." ." 8 u.r loop 2 0 do cr tb@ 8 u.r ." ." 8 u.r space rtc@ 8 u.r ." ." 8 u.r loop loop

RTC and TBR could not be used simultaneously because they are both incremented by an amount based on the last time stamp but that time stamp can be changed by accessing either RTC or TBR. The solution is to have a different time stamp for each.
2022-09-15 20:21:54 -07:00
Maxim Poliakovski
b38d00ce2d cpu/ppc: improve support for external interrupts.
Support generating of external interrupt exception
in MTMSR and RFI when MSR[EE] is re-enabled and
external interrupt still pending.
2022-08-24 14:15:47 +02:00
joevt
b76bfedf4b Remove unnecessary linefeeds from log
To remove blank lines in the dingusppc.log file or in the console output when -d is used.
2022-08-14 05:26:56 -07:00
Maxim Poliakovski
b47de8b042 Implement MPC601 style RTC. 2022-05-21 14:51:27 +02:00
Maxim Poliakovski
d83fdd8866 ppcexec: remove old code. 2022-03-02 17:02:32 +01:00
Maxim Poliakovski
646880cbf2 Interpreter loop is now controlled by exec_flags. 2022-03-02 16:55:20 +01:00
Maxim Poliakovski
f1ed56ae9a debugger: a couple of cosmetic improvements. 2022-02-26 10:57:13 +01:00
Maxim Poliakovski
8f528184b8 Fix compilation with gcc, part 1. 2022-02-16 23:52:43 +01:00
Maxim Poliakovski
25a4fd1107 Allow adding timers from timer callbacks. 2022-02-05 17:10:57 +01:00
Maxim Poliakovski
d8c3cfc38e Fix next instruction address after external exceptions. 2022-01-20 01:38:41 +01:00
Maxim Poliakovski
aefc66d118 Fix external exception processing. 2022-01-10 17:56:24 +01:00
Maxim Poliakovski
339db4a078 Add timers management. 2022-01-10 17:56:24 +01:00
Maxim Poliakovski
087402290d Implement virtual time based on instruction counting. 2021-12-20 00:10:02 +01:00
Maxim Poliakovski
c0cd6eb38f Add missing licence headers, update license date. 2021-10-23 21:00:31 +02:00
dingusdev
e344b089b3 Floating point overhaul, part 1
Cleaned up formatting and reworked the INF/NAN checks
2021-10-09 15:08:53 -07:00
dingusdev
2106c4ca47 Fixed floating-point opcode table issues
fmuls, fmsubs, fmadds, fnmsubs, and fnmadds are all properly mapped now.
2021-10-06 18:36:23 -07:00
dingusdev
f605c484dd ecowx and eciwx added 2021-10-05 17:40:09 -07:00
Maxim Poliakovski
22827642e4 ppcmmu: implement 601-style BAT. 2021-09-27 12:37:35 +02:00
Maxim Poliakovski
e052eb4a87 Merge branch 'atirage-hacks'. 2021-09-25 23:16:38 +02:00
Maxim Poliakovski
501f24f0d3 ppcmmu: implement SoftTLB for instructions. 2021-09-25 19:13:40 +02:00
Maxim Poliakovski
84e111290f Fix includes for loguru and SDL. 2021-09-16 00:46:38 +02:00
Maxim Poliakovski
6f9ee10de5 Rework PPC CPU profiler. 2021-04-29 02:26:17 +02:00
Maxim Poliakovski
3189876d41 ppcfpopcodes: fix fmul emulation. 2021-01-24 04:53:19 +01:00
Maxim Poliakovski
42184213e9 ppcexec: fix RC flag for subgroup 63. 2021-01-23 03:21:50 +01:00