Commit Graph

73 Commits

Author SHA1 Message Date
joevt
c644d1609f PCI Expansion ROM size should be power of 2
The expansion rom base register indicates the size of the expansion rom by the number of bits that remain zero after code attempts to set them all to 1. For example, a result of fffe0000 means 128K. The 11 least significant bits are ignored in the size calculation, which means the minimum rom size is indicated by fffff800 = 2K.

Handle the case where an expansion rom file might not have a size that is a multiple of 2 or is not greater than 2K.
Bytes between the end of the file and the end of the calculated rom size are set to 0xff.
2022-08-22 17:16:22 -07:00
joevt
d843091a4d Allow setting PCI capabilities pointer
The capabilities pointer is usually a constant, but whatever the capabilities pointer points to has to be handled by the derived class.
2022-08-22 17:16:22 -07:00
joevt
6fad095730 Allow setting PCI status register
Don't always return 0 when reading it. The status register contains some bits that Open Firmware uses to set some properties.
A PCI device can set a default status register value to set those bits.
	this->status = 0x02B0; // 0000  0 01 0  1 0 1 1  0000 Capabilities List, 66 MHz, Fast Back-to-Back, DevSel Speed: Medium
2022-08-22 17:16:22 -07:00
joevt
6af8b52376 changes to pci logging
For invalid or unsupported PCI accesses, do the following:
- log a device's full pci address using pciutils setpci command format bb:dd.f @rr.s (bus:device:function @register+offset.size).
- report as read or write access.
- log value for writes.
- bus, device, function, and register values cannot be determined from Invalid IDSEL values so they will output as ??.
- for invalid IDSEL values, report the entire value of the config_addr.
- for valid IDSEL values, the bus number cannot be determined since IDSEL only specifies device number. It's probably bus 00 but we'll show ?? to indicate an IDSEL type access.

Add missing config type read access logging for chaos.
2022-08-22 17:16:17 -07:00
joevt
63248b0fa2 Set Bandit's HWComponent name
Bandit has two names:
- PCIDevice->pci_name
- PCIDevice:MMIODevice:HWComponent->name
The latter was not being set.
2022-08-22 17:07:50 -07:00
Maxim Poliakovski
e097b7a0a1 bandit: fix return value for empty slots. 2022-08-22 15:05:35 +02:00
Maxim Poliakovski
32b8c8ed43 pcidevice: fix expansion ROM mapping. 2022-08-20 12:51:08 +02:00
Maxim Poliakovski
56c54e4c8c pcihost: add attach_pci_device method. 2022-08-19 18:55:33 +02:00
joevt
b76bfedf4b Remove unnecessary linefeeds from log
To remove blank lines in the dingusppc.log file or in the console output when -d is used.
2022-08-14 05:26:56 -07:00
Maxim Poliakovski
e3900b9062 bandit: add Chaos support. 2022-08-06 19:29:45 +02:00
Maxim Poliakovski
ea0fb3b410 bandit: initialize address mask register. 2022-07-25 12:51:55 +02:00
Maxim Poliakovski
41a314d6d6 bandit: self-registration with the device registry. 2022-07-18 20:27:34 +02:00
Maxim Poliakovski
ed02a06bb8 pcidevice: loading of expansion ROMs from files. 2022-05-21 14:51:27 +02:00
Maxim Poliakovski
5b7e79b979 Bandit: implement I/O space transactions. 2022-05-21 14:51:27 +02:00
Maxim Poliakovski
bfd48eeeb2 Bandit: implement address mask register. 2022-05-21 14:51:27 +02:00
Maxim Poliakovski
d863fa0c80 Bandit: use common PCI configuration code. 2022-05-21 14:51:27 +02:00
Maxim Poliakovski
1f67a57d7b Common code for handling PCI config space. 2022-05-21 14:51:26 +02:00
Maxim Poliakovski
4b32e9bd30 Initial emulation of the Platinum Memory controller. 2022-05-21 14:51:26 +02:00
Maxim Poliakovski
23a046d889 Refine Bandit config address handling. 2022-05-21 14:51:26 +02:00
Maxim Poliakovski
cdb34032bc Initial emulation of the Bandit ARBus-to-PCI bridge. 2022-05-21 14:51:26 +02:00
Maxim Poliakovski
74f4dbd7e6 pcihost: pull common code from Grackle. 2022-05-21 14:51:26 +02:00
Maxim Poliakovski
c0cd6eb38f Add missing licence headers, update license date. 2021-10-23 21:00:31 +02:00
Maxim Poliakovski
9329d56d83 Move devices into dedicated subdirectories. 2021-10-23 20:17:47 +02:00