74 Commits

Author SHA1 Message Date
joevt
1166fda3e0 heathrow: Connect mesh. 2025-03-30 07:58:34 -07:00
joevt
20e7dfb0e1 macio: Log unsupported DMA channels once.
For debugging. No need to spam the log.
2025-03-25 21:39:49 -07:00
Maxim Poliakovski
bcb453e7ea Named constants for PCI IDs for MacIO ASICs. 2025-02-26 19:31:22 +01:00
joevt
101bb826f1 Make irq_id 64 bits.
- So that DMA and other interrupts can fit without overlap.
- To simplify conversion to interrupt mask.
- To reduce variables, defines, and code.
2025-02-10 06:49:39 -07:00
Rairii
662166d7c6 heathrow: Add Media Bay ID accessor.
So that a machine can override the mb_id.
2025-02-09 16:51:42 -07:00
joevt
2f30395d00 Break long lines.
Make them 130 characters or less.
2025-01-30 06:30:51 -07:00
joevt
f42b239713 heathrow: Use mask, not minus, for address decode. 2024-12-07 10:12:01 -07:00
joevt
bfc51b8967 heathrow: Add missing this. 2024-12-07 10:04:15 -07:00
joevt
9c66a56a65 heathrow: Replace res with value. 2024-12-07 09:58:55 -07:00
dingusdev
1c95619aa4 Assign ESCC B RCV DMA 2024-12-06 05:47:06 -07:00
dingusdev
81ebc40158 Add ESCC B RCV DMA
Diagnosing issues in booting up Mac OS 9.0.4 for Beige G3
2024-12-04 21:11:47 -07:00
joevt
1bf4073fa7 macio: Range check scc compatible register index.
Also, non-compatible registers don't begin until 0x60 for SCC compatible addressing.
2024-12-04 21:03:09 -07:00
joevt
e7eb1c8a66 Fix PCI interrupts and add devices.
- Use interrupt source instead of IRQ ID in the IrqMap.
- Add a get_interrupt_controller method to mirror the set_interrupt_controller method.
- Have PCI hosts use pcihost_device_postinit to add PCI devices. This was moved from bandit's device_postinit and allows for duplicate devices by appending the slot to the registered device name.
- Fix interrupts of Pippin.

Fix interrupts of cmd646
- Make it work like other PCI devices.
- IntDetails is built into the pcibase base class.
- IntDetails is initialized by calling pci_interrupt.
- pci_interrupt checks the "enable interrupts" flag before doing an interrupt.
2024-11-12 07:04:55 -07:00
joevt
e707d1f27a Remove slashes from PCI device names.
So they are not mistaken for path separators.
2024-11-11 21:28:51 -07:00
joevt
9a2303c495 pci: Replace pci_name with get_name.
It's redundant to have two names.
2024-11-11 21:28:23 -07:00
Maxim Poliakovski
64a5a17df0 heathrow: fix interrupt masking.
Use int_mask1/int_mask2 directly without changing int_events1/int_events2.
That permits interrupt generation on int_mask1/int_mask2 changes.
2024-09-28 23:17:14 +02:00
joevt
7007e002e6 macio: Make interrupt flags atomic.
So they can be modified by other threads.
2024-04-02 19:05:57 -07:00
joevt
1d9b0f7fa5 macio: Add MIO_AUX_CTRL enum. 2024-03-28 07:10:05 -07:00
joevt
052a47734f macio: Add DMA interrupts. 2024-03-06 21:19:04 -07:00
joevt
54767bf97d More interrupts.
- Add all the interrupts including DMA.
- Modify the Interrupt to IRQ_ID translation so the interrupts belonging to the first set of 32 interrupts don't need to be shifted.
2024-03-06 19:17:16 -07:00
joevt
e5bace03f7 Abort if register_dma_int.
Make register_dma_int cause Abort for heathrow and ohare like it does for amic.
2024-03-06 19:17:03 -07:00
joevt
c64fab6ecb heathrow: Align read/write messages. 2024-03-03 12:03:06 -07:00
joevt
569893861d heathrow: Don't set lat_timer.
It will be set by firmware.
2024-03-02 16:42:49 -07:00
joevt
1e78512c95 Rename Curio and Mesh. 2024-03-02 11:12:45 -07:00
joevt
b0dc893a05 dma: Add name to dma classes.
For logging purposes, each DMA channel should have a name.
2024-02-19 15:30:20 +01:00
Maxim Poliakovski
8ddbc9c427 Wire SCSI_MESH interrupt. 2024-02-12 01:46:21 +01:00
Maxim Poliakovski
fd92d86954 mesh: add MESH TNT variant. 2023-12-11 08:05:39 +01:00
Maxim Poliakovski
6cfde29f00 heathrow: implement native interrupt mode. 2023-09-25 12:22:17 +02:00
Maxim Poliakovski
c115a887d8 heathrow: fix processing of emulated interrupts. 2023-09-25 02:14:29 +02:00
Maxim Poliakovski
f4f7edcc28 heathrow: add Ethernet DBDMA channels. 2023-09-22 00:11:19 +02:00
Maxim Poliakovski
0ebcd15a3d heathrow: connect DMA channel for MESH. 2023-09-19 14:19:15 +02:00
Maxim Poliakovski
7bb7ff9f0f heathrow: human-readable DBDMA channel names. 2023-07-24 15:20:52 +02:00
Maxim Poliakovski
14c7d18bdb Revert "Prevents crashing for Big Mac"
This reverts commit 5787d49e9b.
2023-07-23 16:28:31 +02:00
dingusdev
5787d49e9b Prevents crashing for Big Mac
For some reason, on Windows, whether it be VS2022 or Clang, it will crash when trying to write to a Big Mac register if you don't specify the exact name of the component within Heathrow.

This commit fixes that.
2023-07-22 15:15:33 -07:00
Maxim Poliakovski
742003b6f3 Basic BigMac Ethernet controller emulation.
Emulates MII and some PHY configuration registers.
2023-07-08 01:27:01 +02:00
Maxim Poliakovski
f733859e28 heathrow: support for IDE interrupts. 2023-06-18 23:31:28 +02:00
Maxim Poliakovski
f809124a2e Improve SCSI bus registration. 2023-05-30 19:46:27 +02:00
Maxim Poliakovski
22798fe14e Fix compilation of the audio codec classes. 2023-04-23 21:04:24 +02:00
Maxim Poliakovski
44478b6937 heathrow: implement floppy DMA interrupts. 2023-04-22 22:53:20 +02:00
Maxim Poliakovski
03595c3940 Merge remote-tracking branch 'origin/machine-yosemite' 2023-04-21 12:49:58 +02:00
Maxim Poliakovski
cf0d361918 Merge 'hard-disks' branch. 2023-04-17 01:20:38 +02:00
Maxim Poliakovski
d76433f112 heathrow: properly relocate memory space. 2023-02-25 18:14:42 +01:00
Maxim Poliakovski
5d7450df90 heathrow: locate sound HW by type.
That allows using sound codecs other than Screamer with Heathrow.
2023-02-25 18:14:42 +01:00
Maxim Poliakovski
3234f21cab Overhaul audio codec classes. 2023-02-25 18:14:42 +01:00
Maxim Poliakovski
cc17035e67 pcidevice: improve BAR configuration. 2023-02-04 17:57:46 +01:00
joevt
2a64f547cc Add 64-bit BAR support.
While dingusppc only emulates 32-bit Macs (for now), it is possible for a 32-bit Power Mac to use a PCIe card that has 64-bit BARs.

finish_config_bars is added to scan the cfg values of the BARs and determine their type. The type is stored separately so that it does not need to be determined again.
The type can be I/O (16 or 32 bit) or Mem (20 or 32 or 64 bit). A 64 bit bar is two BARs, the second contains the most significant 32 bits.

set_bar_value uses the stored type instead of trying to determine the type itself. It is always called even when the firmware is doing sizing. For sizing, It does the job of setting the bar value so do_bar_sizing is now just a stub.

Every PCIDevice that has a BAR needs to call finish_config_bars after setting up the cfg values just as they need to setup the cfg values. Since they need to do both, maybe the cfg values should be arguments of finish_config_bars, then finish_config_bars() should be renamed config_bars().
2023-02-02 02:47:34 -08:00
Maxim Poliakovski
449cc96612 Basic MESH emulation. 2023-01-25 20:58:30 +01:00
Maxim Poliakovski
8002737124 Basic O'Hare I/O controller emulation. 2022-12-23 17:19:46 +01:00
Maxim Poliakovski
a892842b8f Refactor ATA/IDE classes. 2022-12-07 22:36:25 +01:00
dingusdev
58908621e6 IDE refinements 2022-12-05 08:42:51 -07:00